[U-Boot] [PATCH 00/11] tablebased pinmux for Tegra20
This series introduces tablebased pinmux to all Tegra20 boards and removes the old way of doing pinmux to avoid any possible conflicts in pin setup.
Patch 1 introduces a temporary CONFIG option for the new pinmux style to avoid breaking bisectability in the middle of the series. This option gets removed again in patch 10.
I have verified that all commits build without errors and tested the new pinmux on my Colibri T20 platform.
For all other boards I took the pinmux configuration from the Linux kernel, but only un-tristated the pads that are used by U-Boot. I can't test the other boards myself, so please everyone with the hardware give this a run and provide a tested-by or a bug report. The series is based denx.de/u-boot-tegra/next.
Patch 11 is more of a RFC and removes the old funcmux as after the switchover nothing uses it anymore. We are not doing real muxing in U-Boot, so there is no need to keep it. But I want to hear from other people if they see any reason to keep this.
Lucas Stach (11): tegra: introduce config option to do table based pinmux tegra20: add entry point and helper for tablebased pinmux tegra20: switch over colibri_t20 board to use tablebased pinmux tegra20: switch over tamonten platform to use tablebased pinmux tegra20: switch over harmony board to use tablebased pinmux tegra20: switch over seaboard and ventana to use tablebased pinmux tegra20: switch over whistler board to use tablebased pinmux tegra20: switch over paz00 board to use tablebased pinmux tegra20: switch over trimslice board to use tablebased pinmux tegra20: remove old pinmux setup tegra20: remove funcmux
arch/arm/cpu/tegra-common/board.c | 26 -- arch/arm/cpu/tegra20-common/Makefile | 2 +- arch/arm/cpu/tegra20-common/funcmux.c | 310 --------------------- arch/arm/include/asm/arch-tegra/board.h | 12 - arch/arm/include/asm/arch-tegra20/funcmux.h | 67 ----- arch/arm/include/asm/arch-tegra20/pinmux.h | 12 + board/avionic-design/common/tamonten.c | 133 +++++++-- board/compal/paz00/paz00.c | 149 +++++++--- board/compulab/trimslice/trimslice.c | 146 +++++++--- board/nvidia/common/board.c | 36 +-- board/nvidia/harmony/harmony.c | 143 ++++++++-- board/nvidia/seaboard/seaboard.c | 133 +++++++-- board/nvidia/whistler/whistler.c | 131 ++++++++- .../colibri_t20-common/colibri_t20-common.c | 132 +++++++-- board/toradex/colibri_t20_iris/colibri_t20_iris.c | 16 +- drivers/i2c/tegra_i2c.c | 9 - drivers/input/tegra-kbc.c | 4 +- drivers/mtd/nand/tegra_nand.c | 1 - drivers/video/tegra.c | 3 - include/configs/colibri_t20_iris.h | 1 - include/configs/trimslice.h | 1 - include/configs/whistler.h | 1 - 22 files changed, 814 insertions(+), 654 deletions(-) delete mode 100644 arch/arm/cpu/tegra20-common/funcmux.c delete mode 100644 arch/arm/include/asm/arch-tegra20/funcmux.h
This disables all pinmux entry points and instead calls pinmux_init() in early board init, allowing boards to set up the pinmux in one shot, like it's done with Tegra30.
This option is temporary and can go away once we switched over all boards to the new pinmux style.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/nvidia/common/board.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index a4af539..d9d0e59 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -132,7 +132,9 @@ int board_init(void) gpio_config_uart(); #endif #ifdef CONFIG_TEGRA_SPI +#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX pin_mux_spi(); +#endif spi_init(); #endif #ifdef CONFIG_PWM_TEGRA @@ -140,7 +142,9 @@ int board_init(void) debug("%s: Failed to init pwm\n", __func__); #endif #ifdef CONFIG_LCD +#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX pin_mux_display(); +#endif tegra_lcd_check_next_stage(gd->fdt_blob, 0); #endif /* boot param addr */ @@ -165,14 +169,16 @@ int board_init(void) #endif /* CONFIG_TEGRA_I2C */
#ifdef CONFIG_USB_EHCI_TEGRA +#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX pin_mux_usb(); +#endif board_usb_init(gd->fdt_blob); #endif #ifdef CONFIG_LCD tegra_lcd_check_next_stage(gd->fdt_blob, 0); #endif
-#ifdef CONFIG_TEGRA_NAND +#if defined(CONFIG_TEGRA_NAND) && !defined(CONFIG_TEGRA_TABLEBASED_PINMUX) pin_mux_nand(); #endif
@@ -196,7 +202,7 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
int board_early_init_f(void) { -#if defined(CONFIG_TEGRA30) +#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA_TABLEBASED_PINMUX) pinmux_init(); #endif board_init_uart_f();
Signed-off-by: Lucas Stach dev@lynxeye.de --- arch/arm/include/asm/arch-tegra20/pinmux.h | 12 ++++++++++++ 1 file changed, 12 insertions(+)
diff --git a/arch/arm/include/asm/arch-tegra20/pinmux.h b/arch/arm/include/asm/arch-tegra20/pinmux.h index a9b4eda..a167e48 100644 --- a/arch/arm/include/asm/arch-tegra20/pinmux.h +++ b/arch/arm/include/asm/arch-tegra20/pinmux.h @@ -350,4 +350,16 @@ void pinmux_set_tristate(enum pmux_pingrp pin, int enable); */ void pinmux_config_table(const struct pingroup_config *config, int len);
+/* Set a group of pins from a table */ +void pinmux_init(void); + +/* helper to fill pinmux table */ +#define PINMUX_ENTRY(_pingroup, _mux, _pull, _tri) \ + { \ + .pingroup = PINGRP_##_pingroup, \ + .func = PMUX_FUNC_##_mux, \ + .pull = PMUX_PULL_##_pull, \ + .tristate = PMUX_TRI_##_tri, \ + } + #endif /* PINMUX_H */
Init Colibri T20 pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- .../colibri_t20-common/colibri_t20-common.c | 132 +++++++++++++++++---- board/toradex/colibri_t20_iris/colibri_t20_iris.c | 16 +-- include/configs/colibri_t20_iris.h | 3 + 3 files changed, 115 insertions(+), 36 deletions(-)
diff --git a/board/toradex/colibri_t20-common/colibri_t20-common.c b/board/toradex/colibri_t20-common/colibri_t20-common.c index 6d5e47d..e5163f3 100644 --- a/board/toradex/colibri_t20-common/colibri_t20-common.c +++ b/board/toradex/colibri_t20-common/colibri_t20-common.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Lucas Stach + * Copyright (C) 2012-2013 Lucas Stach * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -14,31 +14,121 @@ */
#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/board.h>
#include "colibri_t20-common.h"
-#ifdef CONFIG_USB_EHCI_TEGRA -void colibri_t20_common_pin_mux_usb(void) -{ - /* module internal USB bus to connect ethernet chipset */ - funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); - /* ULPI reference clock output */ - pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); - pinmux_tristate_disable(PINGRP_CDEV2); - /* PHY reset GPIO */ - pinmux_tristate_disable(PINGRP_UAC); - /* VBus GPIO */ - pinmux_tristate_disable(PINGRP_DTE); -} -#endif +static struct pingroup_config colibri_t20_pinmux[] = { + PINMUX_ENTRY(ATA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* MMC */ + PINMUX_ENTRY(ATC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, NORMAL), /* ULPI REFCLK */ + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, RSVD1, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(DTF, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* MMC */ + PINMUX_ENTRY(GMB, IDE, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(GMC, UARTD, NORMAL, NORMAL), /* UART D */ + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* MMC 8bit */ + PINMUX_ENTRY(GPU, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, NORMAL), + PINMUX_ENTRY(IRRX, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(IRTX, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCA, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(KBCB, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(KBCC, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(KBCD, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(KBCE, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(KBCF, NAND, NORMAL, NORMAL), /* NAND */ + PINMUX_ENTRY(LCSN,RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD3, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD4, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD5, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD6, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD7, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD8, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD9, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD10, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD11, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD12, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD13, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD14, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD15, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD16, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD17, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDC, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM0, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LM1, RSVD3, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW0, DISPB, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW1, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPB, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC1, DISPB, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPB, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPB, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP0, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(OWC, OWR, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(SLXA, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(UAA, ULPI, NORMAL, NORMAL), /* ULPI */ + PINMUX_ENTRY(UAB, ULPI, NORMAL, NORMAL), /* ULPI */ + PINMUX_ENTRY(UAC, RSVD4, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, NORMAL), /* ULPI */ +};
-#ifdef CONFIG_TEGRA_NAND -void pin_mux_nand(void) +void pinmux_init(void) { - funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_NDFLASH_KBC_8_BIT); + pinmux_config_table(colibri_t20_pinmux, ARRAY_SIZE(colibri_t20_pinmux)); } -#endif diff --git a/board/toradex/colibri_t20_iris/colibri_t20_iris.c b/board/toradex/colibri_t20_iris/colibri_t20_iris.c index e40a986..8e099bf 100644 --- a/board/toradex/colibri_t20_iris/colibri_t20_iris.c +++ b/board/toradex/colibri_t20_iris/colibri_t20_iris.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2012 Lucas Stach + * Copyright (C) 2012-2013 Lucas Stach * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -16,29 +16,15 @@ #include <common.h> #include <asm/gpio.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/board.h> #include <asm/arch-tegra/mmc.h>
#include "../colibri_t20-common/colibri_t20-common.h"
-#ifdef CONFIG_USB_EHCI_TEGRA -void pin_mux_usb(void) -{ - colibri_t20_common_pin_mux_usb(); - - /* USB 1 aka Tegra USB port 3 VBus*/ - pinmux_tristate_disable(PINGRP_SPIG); -} -#endif - #ifdef CONFIG_TEGRA_MMC int board_mmc_init(bd_t *bd) { - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); - pinmux_tristate_disable(PINGRP_GMB); - tegra_mmc_init(0, 4, -1, GPIO_PC7);
return 0; diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 0e5f281..513a5ba 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -18,6 +18,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable FDT support */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-colibri_t20_iris #define CONFIG_OF_CONTROL
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/avionic-design/common/tamonten.c | 133 ++++++++++++++++++++++++++++----- include/configs/medcom-wide.h | 3 + include/configs/plutux.h | 3 + include/configs/tec.h | 3 + 4 files changed, 125 insertions(+), 17 deletions(-)
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c index e6a932e..f072407 100644 --- a/board/avionic-design/common/tamonten.c +++ b/board/avionic-design/common/tamonten.c @@ -3,6 +3,8 @@ * NVIDIA Corporation <www.nvidia.com> * (C) Copyright 2011-2012 * Avionic Design GmbH <www.avionic-design.de> + * (C) Copyright 2013 + * Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -28,7 +30,6 @@ #include <asm/io.h> #include <asm/gpio.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/board.h> @@ -50,28 +51,126 @@ void gpio_early_init(void) #endif
#ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); - /* for write-protect GPIO PI6 */ - pinmux_tristate_disable(PINGRP_ATA); - /* for CD GPIO PH2 */ - pinmux_tristate_disable(PINGRP_ATD); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { - /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - /* init dev 0, SD slot, with 4-bit bus */ tegra_mmc_init(0, 4, GPIO_PI6, GPIO_PH2);
return 0; } #endif + +static struct pingroup_config tamonten_pinmux[] = { + PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* MMC */ + PINMUX_ENTRY(ATC, NAND, NORMAL, TRISTATE), + PINMUX_ENTRY(ATD, GMI, NORMAL, NORMAL), /* GPIO */ + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* MMC */ + PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, UARTD, NORMAL, NORMAL), /* UART D */ + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* MMC */ + PINMUX_ENTRY(GPU, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTA, NORMAL, TRISTATE), + PINMUX_ENTRY(IRTX, UARTA, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD3, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD4, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD5, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD6, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD7, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD8, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD9, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD10, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD11, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD12, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD13, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD14, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD15, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD16, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD17, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(OWC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE), +}; + +void pinmux_init(void) +{ + pinmux_config_table(tamonten_pinmux, ARRAY_SIZE(tamonten_pinmux)); +} diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index bae4ba0..a2913ee 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -28,6 +28,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Medcom-Wide. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide #define CONFIG_OF_CONTROL diff --git a/include/configs/plutux.h b/include/configs/plutux.h index deee237..5a02c27 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -28,6 +28,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Plutux. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-plutux #define CONFIG_OF_CONTROL diff --git a/include/configs/tec.h b/include/configs/tec.h index caeb9cd..74c56d8 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -28,6 +28,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for TEC. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-tec #define CONFIG_OF_CONTROL
On 01/24/2013 08:48 AM, Lucas Stach wrote:
Init pinmux in one shot, in order to avoid any conflicts.
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
+static struct pingroup_config tamonten_pinmux[] = {
- PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO */
- PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* MMC */
...
I believe this initializes every single pingroup on the SoC to something. In order to prevent any behavior changes, wouldn't it be better to first fill in this table only with entries that achieve the same pinmux programming that used to be performed by the C code you're removing? Then, a separate later patch could fill in missing items in the pinmux table. I think that'd end up being much safer and easier to validate.
Am Freitag, den 25.01.2013, 14:04 -0800 schrieb Stephen Warren:
On 01/24/2013 08:48 AM, Lucas Stach wrote:
Init pinmux in one shot, in order to avoid any conflicts.
diff --git a/board/avionic-design/common/tamonten.c b/board/avionic-design/common/tamonten.c
+static struct pingroup_config tamonten_pinmux[] = {
- PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO */
- PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* MMC */
...
I believe this initializes every single pingroup on the SoC to something. In order to prevent any behavior changes, wouldn't it be better to first fill in this table only with entries that achieve the same pinmux programming that used to be performed by the C code you're removing? Then, a separate later patch could fill in missing items in the pinmux table. I think that'd end up being much safer and easier to validate.
As I wrote in the cover letter this initializes the pinmux to the same values the Linux kernel uses. I don't consider it a safer approach to pull out the old pinmux from the C Code and then later building a conflict free full muxtable out of this.
However I made sure to go through the C Code to see which pads need to be un-tristated. At that time I cross-checked the table with the functions used by the C Code. But as a human I'm not safe from mistakes.
Regards, Lucas
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/nvidia/harmony/harmony.c | 143 ++++++++++++++++++++++++++++++++--------- include/configs/harmony.h | 3 + 2 files changed, 116 insertions(+), 30 deletions(-)
diff --git a/board/nvidia/harmony/harmony.c b/board/nvidia/harmony/harmony.c index 93430ed..f6dc709 100644 --- a/board/nvidia/harmony/harmony.c +++ b/board/nvidia/harmony/harmony.c @@ -1,6 +1,8 @@ /* * (C) Copyright 2010,2011 * NVIDIA Corporation <www.nvidia.com> + * (C) Copyright 2013 + * Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -24,7 +26,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/mmc.h> @@ -35,34 +36,11 @@
#ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); - funcmux_select(PERIPH_ID_SDMMC2, FUNCMUX_SDMMC2_DTA_DTD_8BIT); - - /* For power GPIO PI6 */ - pinmux_tristate_disable(PINGRP_ATA); - /* For CD GPIO PH2 */ - pinmux_tristate_disable(PINGRP_ATD); - - /* For power GPIO PT3 */ - pinmux_tristate_disable(PINGRP_DTB); - /* For CD GPIO PI5 */ - pinmux_tristate_disable(PINGRP_ATC); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - debug("board_mmc_init: init SD slot J26\n"); /* init dev 0, SD slot J26, with 8-bit bus */ tegra_mmc_init(0, 8, GPIO_PI6, GPIO_PH2); @@ -75,11 +53,116 @@ int board_mmc_init(bd_t *bd) } #endif
-void pin_mux_usb(void) +static struct pingroup_config harmony_pinmux[] = { + PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO PI6*/ + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATC, NAND, NORMAL, NORMAL), /* NAND, GPIO PI5 */ + PINMUX_ENTRY(ATD, GMI, NORMAL, NORMAL), /* GPIO PH2 */ + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, NORMAL), /* ULPI REFCLK */ + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, SDIO2, NORMAL, NORMAL), /* SDMMC2 */ + PINMUX_ENTRY(DTB, RSVD1, NORMAL, NORMAL), /* GPIO PT3 */ + PINMUX_ENTRY(DTC, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, SDIO2, NORMAL, NORMAL), /* SDMMC2 */ + PINMUX_ENTRY(DTE, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GMB, GMI, NORMAL, NORMAL), /* GPIO PC7 */ + PINMUX_ENTRY(GMC, UARTD, NORMAL, NORMAL), /* UART D */ + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GPU, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU7, RTCK, NORMAL, TRISTATE), + PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(IRTX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD3, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD4, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD5, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD6, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD7, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD8, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD9, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD10, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD11, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD12, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD13, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD14, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD15, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD16, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD17, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(OWC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, NORMAL), /* ULPI */ + PINMUX_ENTRY(UAB, ULPI, NORMAL, NORMAL), /* ULPI */ + PINMUX_ENTRY(UAC, RSVD4, NORMAL, NORMAL), /* GPIO PV1 */ + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, NORMAL), /* ULPI */ +}; + +void pinmux_init(void) { - funcmux_select(PERIPH_ID_USB2, FUNCMUX_USB2_ULPI); - pinmux_set_func(PINGRP_CDEV2, PMUX_FUNC_PLLP_OUT4); - pinmux_tristate_disable(PINGRP_CDEV2); - /* USB2 PHY reset GPIO */ - pinmux_tristate_disable(PINGRP_UAC); + pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); } diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 8d1fd47..d64d501 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -27,6 +27,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony #define CONFIG_OF_CONTROL
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 3e33da0..b5b4b31 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -1,6 +1,8 @@ /* * (C) Copyright 2010,2011 * NVIDIA Corporation <www.nvidia.com> + * (C) Copyright 2013 + * Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -25,7 +27,6 @@ #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> @@ -47,29 +48,12 @@ void gpio_early_init_uart(void) #endif
#ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT); - funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT); - - /* For power GPIO PI6 */ - pinmux_tristate_disable(PINGRP_ATA); - /* For CD GPIO PI5 */ - pinmux_tristate_disable(PINGRP_ATC); -}
/* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 8-bit bus */ tegra_mmc_init(0, 8, -1, -1); @@ -87,3 +71,116 @@ void pin_mux_usb(void) /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ pinmux_tristate_disable(PINGRP_SLXK); } +static struct pingroup_config seaboard_pinmux[] = { + PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO PI6 */ + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATC, NAND, NORMAL, NORMAL), /* NAND, GPIO PI5 */ + PINMUX_ENTRY(ATD, GMI, NORMAL, NORMAL), /* NAND, GPIO PH1,PH3 */ + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, UARTD, NORMAL, NORMAL), /* UART D */ + PINMUX_ENTRY(GMD, SFLASH, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GPU, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(IRTX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCA, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(KBCB, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(KBCC, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(KBCD, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(KBCE, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(KBCF, KBC, UP, NORMAL), /* KBC */ + PINMUX_ENTRY(LCSN, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD3, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD4, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD5, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD6, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD7, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD8, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD9, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD10, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD11, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD12, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD13, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD14, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD15, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD16, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD17, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LDC, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LM0, RSVD4, NORMAL, NORMAL), /* GPIO PW0 */ + PINMUX_ENTRY(LM1, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LPW0, HDMI, NORMAL, NORMAL), /* GPIO PB2 */ + PINMUX_ENTRY(LPW1, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, HDMI, NORMAL, NORMAL), /* GPIO PC6 */ + PINMUX_ENTRY(LSC0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LSC1, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVP0, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(OWC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, SDIO3, NORMAL, NORMAL), /* SDMMC3 */ + PINMUX_ENTRY(SDC, SDIO3, NORMAL, NORMAL), /* SDMMC3 */ + PINMUX_ENTRY(SDD, SDIO3, NORMAL, NORMAL), /* SDMMC3 */ + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPDIF, NORMAL, NORMAL), /* GPIO PD4 */ + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE), +}; + +void pinmux_init(void) +{ + pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); +} diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index de0c777..4e3bf1c 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -35,6 +35,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard #define CONFIG_OF_CONTROL diff --git a/include/configs/ventana.h b/include/configs/ventana.h index b55ebc9..9a023b0 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -27,6 +27,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana #define CONFIG_OF_CONTROL
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
Also, how does this deal with drivers that want to support different configurations, such as 4/8 bit MMC, UART flow control, etc.? How does this fit with what the device tree pinmux specifies in the kernel, and why would we not move to using that?
Regards, Simon
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index 3e33da0..b5b4b31 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -1,6 +1,8 @@ /*
- (C) Copyright 2010,2011
- NVIDIA Corporation <www.nvidia.com>
- (C) Copyright 2013
- Lucas Stach
- See file CREDITS for list of people who contributed to this
- project.
@@ -25,7 +27,6 @@ #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> @@ -47,29 +48,12 @@ void gpio_early_init_uart(void) #endif
#ifdef CONFIG_TEGRA_MMC -/*
- Routine: pin_mux_mmc
- Description: setup the pin muxes/tristate values for the SDMMC(s)
- */
-static void pin_mux_mmc(void) -{
funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_4BIT);/* For power GPIO PI6 */pinmux_tristate_disable(PINGRP_ATA);/* For CD GPIO PI5 */pinmux_tristate_disable(PINGRP_ATC);-}
/* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n");
/* Enable muxes, etc. for SDMMC controllers */pin_mux_mmc();debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 8-bit bus */ tegra_mmc_init(0, 8, -1, -1);@@ -87,3 +71,116 @@ void pin_mux_usb(void) /* For USB's GPIO PD0. For now, since we have no pinmux in fdt */ pinmux_tristate_disable(PINGRP_SLXK); } +static struct pingroup_config seaboard_pinmux[] = {
PINMUX_ENTRY(ATA, IDE, NORMAL, NORMAL), /* GPIO PI6 */PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */PINMUX_ENTRY(ATC, NAND, NORMAL, NORMAL), /* NAND, GPIO PI5 */PINMUX_ENTRY(ATD, GMI, NORMAL, NORMAL), /* NAND, GPIO PH1,PH3 */PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE),PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE),PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE),PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE),PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE),PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE),PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE),PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE),PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE),PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE),PINMUX_ENTRY(DTA, VI, NORMAL, TRISTATE),PINMUX_ENTRY(DTB, VI, NORMAL, TRISTATE),PINMUX_ENTRY(DTC, VI, NORMAL, TRISTATE),PINMUX_ENTRY(DTD, VI, NORMAL, TRISTATE),PINMUX_ENTRY(DTE, VI, NORMAL, TRISTATE),PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE),PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE),PINMUX_ENTRY(GMC, UARTD, NORMAL, NORMAL), /* UART D */PINMUX_ENTRY(GMD, SFLASH, NORMAL, TRISTATE),PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* SDMMC4 */PINMUX_ENTRY(GPU, PWM, NORMAL, TRISTATE),PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE),PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE),PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE),PINMUX_ENTRY(IRRX, UARTB, NORMAL, TRISTATE),PINMUX_ENTRY(IRTX, UARTB, NORMAL, TRISTATE),PINMUX_ENTRY(KBCA, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(KBCB, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(KBCC, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(KBCD, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(KBCE, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(KBCF, KBC, UP, NORMAL), /* KBC */PINMUX_ENTRY(LCSN, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LD0, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD1, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD2, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD3, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD4, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD5, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD6, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD7, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD8, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD9, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD10, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD11, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD12, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD13, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD14, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD15, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD16, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LD17, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LDC, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LDI, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LHP0, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LHP1, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LHP2, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LHS, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LM0, RSVD4, NORMAL, NORMAL), /* GPIO PW0 */PINMUX_ENTRY(LM1, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LPP, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LPW0, HDMI, NORMAL, NORMAL), /* GPIO PB2 */PINMUX_ENTRY(LPW1, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LPW2, HDMI, NORMAL, NORMAL), /* GPIO PC6 */PINMUX_ENTRY(LSC0, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LSC1, HDMI, NORMAL, TRISTATE),PINMUX_ENTRY(LSCK, HDMI, NORMAL, TRISTATE),PINMUX_ENTRY(LSDA, HDMI, NORMAL, TRISTATE),PINMUX_ENTRY(LSDI, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LSPI, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LVP0, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(LVP1, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(LVS, DISPA, NORMAL, NORMAL), /* LCD */PINMUX_ENTRY(OWC, RSVD2, NORMAL, TRISTATE),PINMUX_ENTRY(PTA, RSVD4, NORMAL, TRISTATE),PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE),PINMUX_ENTRY(SDB, SDIO3, NORMAL, NORMAL), /* SDMMC3 */PINMUX_ENTRY(SDC, SDIO3, NORMAL, NORMAL), /* SDMMC3 */PINMUX_ENTRY(SDD, SDIO3, NORMAL, NORMAL), /* SDMMC3 */PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, TRISTATE),PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE),PINMUX_ENTRY(SLXC, SPDIF, NORMAL, TRISTATE),PINMUX_ENTRY(SLXD, SPDIF, NORMAL, NORMAL), /* GPIO PD4 */PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE),PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE),PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE),PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE),PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE),PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE),PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE),PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE),PINMUX_ENTRY(SPIF, SPI1, NORMAL, TRISTATE),PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE),PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE),PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE),PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE),PINMUX_ENTRY(UAC, RSVD2, NORMAL, TRISTATE),PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE),PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE),PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE),PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE),+};
+void pinmux_init(void) +{
pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux));+} diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index de0c777..4e3bf1c 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -35,6 +35,9 @@
#include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX
/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard #define CONFIG_OF_CONTROL diff --git a/include/configs/ventana.h b/include/configs/ventana.h index b55ebc9..9a023b0 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -27,6 +27,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX
/* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana
#define CONFIG_OF_CONTROL
1.8.0.2
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Also, how does this deal with drivers that want to support different configurations, such as 4/8 bit MMC, UART flow control, etc.? How does this fit with what the device tree pinmux specifies in the kernel, and why would we not move to using that?
This is just the pinmux. You have to make sure to match the pinmux with your driver configuration. This tablebased approach is the same thing as what is done with Tegra30 in U-Boot.
It's not as runtime flexible as the pinmux used in the Linux kernel, but also quite a fair bit simpler. I don't see any platform that would need anything other than the default configuration in U-Boot, so we don't need the muxing stuff provided by the pinmux framework in the kernel.
While running U-Boot we want to keep most of the pads in tristate and just enable the ones used by U-Boot itself (boot devices, GPIOs, LCD pins, etc.), so using the plain kernel pinmux config isn't going to work. So I think the table based approach is a good compromise between the need of having an comprehensively defined pinmux, simplicity and effort needed to define the pinmux.
Regards, Lucas
Hi Lucas,
On Fri, Jan 25, 2013 at 7:22 AM, Lucas Stach dev@lynxeye.de wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
I mean that the table is very similar for different boards, so looks like duplicated coded (133 very similar lines for each board).
Also, this seems to break FDT use. At present it is possible (I think) to boot the same U-Boot on any board, with the device tree specifying the config. With your change that is no longer possible, I think?
Looking ahead to T114 I see a similar problem. The funcmux approach was a compromise in that we could just select appropriate values for each function - there was no agreement on how to put this in the FDT though (my intention was that it would depend on the kernel binding, but that is now defined, so what excuse do we have for not implementing it in U-Boot?).
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Well yes, but we seem to be right back to where we started, with the FDT unable to describe a key feature of the boards (pinmux).
Also, how does this deal with drivers that want to support different configurations, such as 4/8 bit MMC, UART flow control, etc.? How does this fit with what the device tree pinmux specifies in the kernel, and why would we not move to using that?
This is just the pinmux. You have to make sure to match the pinmux with your driver configuration. This tablebased approach is the same thing as what is done with Tegra30 in U-Boot.
It's not as runtime flexible as the pinmux used in the Linux kernel, but also quite a fair bit simpler. I don't see any platform that would need anything other than the default configuration in U-Boot, so we don't need the muxing stuff provided by the pinmux framework in the kernel.
Fair enough, simple is good, but I'm not sure it will do the job. If we create different variants of a board, how exactly will we describe the differences other than by creating a new config, separate U-Boot build, etc.?
While running U-Boot we want to keep most of the pads in tristate and just enable the ones used by U-Boot itself (boot devices, GPIOs, LCD pins, etc.), so using the plain kernel pinmux config isn't going to work. So I think the table based approach is a good compromise between the need of having an comprehensively defined pinmux, simplicity and effort needed to define the pinmux.
OK. Can you think of a way to implement this so that we have:
board/nvidia/common/tegra20_dt.c
and the resulting image can run on all T20 boards (given an appropriate DT)?
Regards, Simon
Regards, Lucas
Hello Simon,
Am Samstag, den 26.01.2013, 10:20 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 7:22 AM, Lucas Stach dev@lynxeye.de wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
I mean that the table is very similar for different boards, so looks like duplicated coded (133 very similar lines for each board).
Also, this seems to break FDT use. At present it is possible (I think) to boot the same U-Boot on any board, with the device tree specifying the config. With your change that is no longer possible, I think?
Looking ahead to T114 I see a similar problem. The funcmux approach was a compromise in that we could just select appropriate values for each function - there was no agreement on how to put this in the FDT though (my intention was that it would depend on the kernel binding, but that is now defined, so what excuse do we have for not implementing it in U-Boot?).
That Tegra30 doesn't do so either. ;) But I agree, that's no valid excuse and we should resolve this before Tegra114 introduces more of this stuff. See below.
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Well yes, but we seem to be right back to where we started, with the FDT unable to describe a key feature of the boards (pinmux).
I see your point now. The obvious answer for now is: it's not regressing functionality, as we were never able to boot the same U-Boot image by just changing the DT.
But yes in the end we want to pack this information into the DT files. But even then it would be nice if people would test this pachset, as I imagine DT based pinmux is the same as tablebased pinmux, just in a slightly different flavour. ;) So if people test the tablebased config now, we can do the conversion to DT based with a lot more confidence.
I'll look into using the kernel pinmux binding minus the MUX stuff, as I think there's no real reason to have this in U-Boot.
Regards, Lucas
Hi Lucas,
On Sat, Jan 26, 2013 at 10:38 AM, Lucas Stach dev@lynxeye.de wrote:
Hello Simon,
Am Samstag, den 26.01.2013, 10:20 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 7:22 AM, Lucas Stach dev@lynxeye.de wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
I mean that the table is very similar for different boards, so looks like duplicated coded (133 very similar lines for each board).
Also, this seems to break FDT use. At present it is possible (I think) to boot the same U-Boot on any board, with the device tree specifying the config. With your change that is no longer possible, I think?
Looking ahead to T114 I see a similar problem. The funcmux approach was a compromise in that we could just select appropriate values for each function - there was no agreement on how to put this in the FDT though (my intention was that it would depend on the kernel binding, but that is now defined, so what excuse do we have for not implementing it in U-Boot?).
That Tegra30 doesn't do so either. ;) But I agree, that's no valid excuse and we should resolve this before Tegra114 introduces more of this stuff. See below.
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Well yes, but we seem to be right back to where we started, with the FDT unable to describe a key feature of the boards (pinmux).
I see your point now. The obvious answer for now is: it's not regressing functionality, as we were never able to boot the same U-Boot image by just changing the DT.
Well, kind of. In fact we were able to boot at 3 different T20 boards just by adding a 'funcmux' property to the device's node to select the required mux option for that driver. This code is no use on T30/T114, and was only a stop-gap anyway.
But yes in the end we want to pack this information into the DT files. But even then it would be nice if people would test this pachset, as I imagine DT based pinmux is the same as tablebased pinmux, just in a slightly different flavour. ;) So if people test the tablebased config now, we can do the conversion to DT based with a lot more confidence.
I'll look into using the kernel pinmux binding minus the MUX stuff, as I think there's no real reason to have this in U-Boot.
Well I would rather than we get that running than switch to table-driven mux, assuming it is not too big a job?
I imagine perhaps naively that a function could be written which parses the pinmux and sets it up in U-Boot - effectively using the FDT as the pinmux table.
Regards, Simon
Regards, Lucas
Am Samstag, den 26.01.2013, 10:49 +1300 schrieb Simon Glass: [...]
But yes in the end we want to pack this information into the DT files. But even then it would be nice if people would test this pachset, as I imagine DT based pinmux is the same as tablebased pinmux, just in a slightly different flavour. ;) So if people test the tablebased config now, we can do the conversion to DT based with a lot more confidence.
I'll look into using the kernel pinmux binding minus the MUX stuff, as I think there's no real reason to have this in U-Boot.
Well I would rather than we get that running than switch to table-driven mux, assuming it is not too big a job?
I imagine perhaps naively that a function could be written which parses the pinmux and sets it up in U-Boot - effectively using the FDT as the pinmux table.
That's my plan. But still even if we keep the binding the same, the actual pinmux config would differ between the kernel and U-Boot (a lot more pads kept in tristate in U-Boot). So as the FDT would effectively resemble the same tables I included in this patchset, some testing coverage of that would smoothen the transition.
Regards, Lucas
On 01/25/2013 01:57 PM, Lucas Stach wrote:
Am Samstag, den 26.01.2013, 10:49 +1300 schrieb Simon Glass: [...]
But yes in the end we want to pack this information into the DT files. But even then it would be nice if people would test this pachset, as I imagine DT based pinmux is the same as tablebased pinmux, just in a slightly different flavour. ;) So if people test the tablebased config now, we can do the conversion to DT based with a lot more confidence.
I'll look into using the kernel pinmux binding minus the MUX stuff, as I think there's no real reason to have this in U-Boot.
Well I would rather than we get that running than switch to table-driven mux, assuming it is not too big a job?
I imagine perhaps naively that a function could be written which parses the pinmux and sets it up in U-Boot - effectively using the FDT as the pinmux table.
That's my plan. But still even if we keep the binding the same, the actual pinmux config would differ between the kernel and U-Boot (a lot more pads kept in tristate in U-Boot). So as the FDT would effectively resemble the same tables I included in this patchset, some testing coverage of that would smoothen the transition.
Why wouldn't the pinmux tables in the FDT passed to U-Boot either be identical to (a) the kernel, or (b) the small subset of the pinmux options that U-Boot used to program via code? I don't see any reason for U-Boot to program all the pingroups to TRISTATE etc.; if it's programming those pingroups at all, it may as well just program the correct final value.
On 01/25/2013 01:49 PM, Simon Glass wrote:
Hi Lucas,
On Sat, Jan 26, 2013 at 10:38 AM, Lucas Stach dev@lynxeye.de wrote:
Hello Simon,
Am Samstag, den 26.01.2013, 10:20 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 7:22 AM, Lucas Stach dev@lynxeye.de wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
I mean that the table is very similar for different boards, so looks like duplicated coded (133 very similar lines for each board).
Also, this seems to break FDT use. At present it is possible (I think) to boot the same U-Boot on any board, with the device tree specifying the config. With your change that is no longer possible, I think?
Looking ahead to T114 I see a similar problem. The funcmux approach was a compromise in that we could just select appropriate values for each function - there was no agreement on how to put this in the FDT though (my intention was that it would depend on the kernel binding, but that is now defined, so what excuse do we have for not implementing it in U-Boot?).
That Tegra30 doesn't do so either. ;) But I agree, that's no valid excuse and we should resolve this before Tegra114 introduces more of this stuff. See below.
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Well yes, but we seem to be right back to where we started, with the FDT unable to describe a key feature of the boards (pinmux).
I see your point now. The obvious answer for now is: it's not regressing functionality, as we were never able to boot the same U-Boot image by just changing the DT.
Well, kind of. In fact we were able to boot at 3 different T20 boards just by adding a 'funcmux' property to the device's node to select the required mux option for that driver. This code is no use on T30/T114, and was only a stop-gap anyway.
??? I don't believe U-Boot supports any "funcmux" property in the device tree. Are you referring to some downstream U-Boot? Such a branch wouldn't be relevant to a patch for upstream U-Boot.
Hi Stephen,
On Sat, Jan 26, 2013 at 11:10 AM, Stephen Warren swarren@nvidia.com wrote:
On 01/25/2013 01:49 PM, Simon Glass wrote:
Hi Lucas,
On Sat, Jan 26, 2013 at 10:38 AM, Lucas Stach dev@lynxeye.de wrote:
Hello Simon,
Am Samstag, den 26.01.2013, 10:20 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 7:22 AM, Lucas Stach dev@lynxeye.de wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote: > Init pinmux in one shot, in order to avoid any conflicts. > > Signed-off-by: Lucas Stach dev@lynxeye.de > --- > board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ > include/configs/seaboard.h | 3 + > include/configs/ventana.h | 3 + > 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
I mean that the table is very similar for different boards, so looks like duplicated coded (133 very similar lines for each board).
Also, this seems to break FDT use. At present it is possible (I think) to boot the same U-Boot on any board, with the device tree specifying the config. With your change that is no longer possible, I think?
Looking ahead to T114 I see a similar problem. The funcmux approach was a compromise in that we could just select appropriate values for each function - there was no agreement on how to put this in the FDT though (my intention was that it would depend on the kernel binding, but that is now defined, so what excuse do we have for not implementing it in U-Boot?).
That Tegra30 doesn't do so either. ;) But I agree, that's no valid excuse and we should resolve this before Tegra114 introduces more of this stuff. See below.
Before this change we would leave some pads uninitialised in their (random) reset configuration. For example on the Colibri this leads to NAND not working as it's wired up to the KBC pads. If we only configure those, ATC will remain in it's reset state and would be also configured to the NAND function, which leads to fail. Having an explicit, known to be conflict free configuration for all pads avoids all those unpleasant surprises.
Well yes, but we seem to be right back to where we started, with the FDT unable to describe a key feature of the boards (pinmux).
I see your point now. The obvious answer for now is: it's not regressing functionality, as we were never able to boot the same U-Boot image by just changing the DT.
Well, kind of. In fact we were able to boot at 3 different T20 boards just by adding a 'funcmux' property to the device's node to select the required mux option for that driver. This code is no use on T30/T114, and was only a stop-gap anyway.
??? I don't believe U-Boot supports any "funcmux" property in the device tree. Are you referring to some downstream U-Boot? Such a branch wouldn't be relevant to a patch for upstream U-Boot.
Yes, downstream. In fact from memory only the UARTs and one i2c port actually cared on T20 - the rest just used default funcmux. But we did agree at the time to omit this 'funcmux' FDT binding from mainline since there was an expectation that the kernel would soon have FDT pinmux and we would use that in U-Boot. Now that it is available I think we should use the kernel's FDT binding instead of static table-based pinmux.
Regards, Simon
On 01/24/2013 10:22 AM, Lucas Stach wrote:
Am Freitag, den 25.01.2013, 06:54 +1300 schrieb Simon Glass:
Hi Lucas,
On Fri, Jan 25, 2013 at 5:48 AM, Lucas Stach dev@lynxeye.de wrote:
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de
board/nvidia/seaboard/seaboard.c | 133 +++++++++++++++++++++++++++++++++------ include/configs/seaboard.h | 3 + include/configs/ventana.h | 3 + 3 files changed, 121 insertions(+), 18 deletions(-)
This seems like a lot of code and presumably quite a bit of duplication between boards. What sort of conflicts does this avoid, and is it the only way of avoiding them?
I don't see it as duplication, but as explicitly spelling out how the pinmux configuration should be set up on a certain board.
Before this change we would leave some pads uninitialised in their (random) reset configuration.
Just being pedantic here, but I don't think the power-on-reset configuration is random; it's well defined but perhaps just not documented, and not always what is correct/best for any particular board design.
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/nvidia/whistler/whistler.c | 131 ++++++++++++++++++++++++++++++++++----- include/configs/whistler.h | 3 + 2 files changed, 119 insertions(+), 15 deletions(-)
diff --git a/board/nvidia/whistler/whistler.c b/board/nvidia/whistler/whistler.c index 592cd6b..56f066e 100644 --- a/board/nvidia/whistler/whistler.c +++ b/board/nvidia/whistler/whistler.c @@ -1,6 +1,8 @@ /* * (C) Copyright 2010-2012 * NVIDIA Corporation <www.nvidia.com> + * (C) Copyright 2013 + * Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -25,7 +27,6 @@ #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -34,17 +35,6 @@ #include <mmc.h> #endif
- -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC3, FUNCMUX_SDMMC3_SDB_SLXA_8BIT); - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATC_ATD_8BIT); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { @@ -70,9 +60,6 @@ int board_mmc_init(bd_t *bd) if (ret) printf("i2c_write 0 0x3c 0x44 failed: %d\n", ret);
- /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - /* init dev 0 (SDMMC4), (J29 "HSMMC") with 8-bit bus */ tegra_mmc_init(0, 8, -1, -1);
@@ -107,3 +94,117 @@ void pin_mux_usb(void) if (ret) printf("i2c_write 0 0x20 6 failed: %d\n", ret); } + +static struct pingroup_config whistler_pinmux[] = { + PINMUX_ENTRY(ATA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATC, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATD, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, OSC, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, DAP5, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, NORMAL), /* DVC */ + PINMUX_ENTRY(IRRX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(IRTX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD3, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD4, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD5, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD6, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD7, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD8, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD9, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD10, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD11, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD12, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD13, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD14, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD15, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD16, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD17, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(OWC, OWR, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, SDIO3, NORMAL, NORMAL), /* SDMMC3 */ + PINMUX_ENTRY(SDC, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SDD, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXA, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SLXC, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SLXD, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SLXK, SDIO3, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, SPI3, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, SPI2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(UAB, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(UAC, OWR, NORMAL, TRISTATE), + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, SPI1, NORMAL, TRISTATE), +}; + +void pinmux_init(void) +{ + pinmux_config_table(whistler_pinmux, ARRAY_SIZE(whistler_pinmux)); +} diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 1e554d8..d45fa44 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -27,6 +27,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-whistler #define CONFIG_OF_CONTROL
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/compal/paz00/paz00.c | 149 ++++++++++++++++++++++++++++++++++----------- include/configs/paz00.h | 3 + 2 files changed, 115 insertions(+), 37 deletions(-)
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c index 1447f47..b56ba41 100644 --- a/board/compal/paz00/paz00.c +++ b/board/compal/paz00/paz00.c @@ -1,5 +1,6 @@ /* * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * Copyright (c) 2013 Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -26,40 +27,11 @@
#ifdef CONFIG_TEGRA_MMC -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - /* SDMMC4: config 3, x8 on 2nd set of pins */ - pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATB); - pinmux_tristate_disable(PINGRP_GMA); - pinmux_tristate_disable(PINGRP_GME); - - /* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ - pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1); - - pinmux_tristate_disable(PINGRP_SDIO1); - - /* For power GPIO PV1 */ - pinmux_tristate_disable(PINGRP_UAC); - /* For CD GPIO PV5 */ - pinmux_tristate_disable(PINGRP_GPV); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - debug("board_mmc_init: init eMMC\n"); /* init dev 0, eMMC chip, with 8-bit bus */ tegra_mmc_init(0, 8, -1, -1); @@ -72,13 +44,116 @@ int board_mmc_init(bd_t *bd) } #endif
-#ifdef CONFIG_LCD -/* this is a weak define that we are overriding */ -void pin_mux_display(void) -{ - debug("init display pinmux\n"); +static struct pingroup_config paz00_pinmux[] = { + PINMUX_ENTRY(ATA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, PLLC_OUT1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, GMI, NORMAL, NORMAL), /* GPIO PA4 */ + PINMUX_ENTRY(DAP3, DAP3, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, RSVD1, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GMB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GMD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GME, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GPU, PWM, NORMAL, NORMAL), /* GPIO PU4 */ + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, NORMAL), /* GPIO PV5 */ + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(IRTX, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, SDIO2, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD3, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD4, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD5, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD6, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD7, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD8, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD9, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD10, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD11, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD12, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD13, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD14, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD15, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD16, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LD17, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, NORMAL), /* GPIO PM6 */ + PINMUX_ENTRY(LHP0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHP2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LHS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LM0, RSVD4, NORMAL, NORMAL), /* GPIO PW0 */ + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LPW0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LSC0, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(LVS, DISPA, NORMAL, NORMAL), /* LCD */ + PINMUX_ENTRY(OWC, OWR, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, TWC, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, NORMAL), /* SDIO1 */ + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SPI4, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, RSVD4, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAC, RSVD4, NORMAL, NORMAL), /* GPIO PV1 */ + PINMUX_ENTRY(UAD, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE), +};
- /* EN_VDD_PANEL GPIO A4 */ - pinmux_tristate_disable(PINGRP_DAP2); +void pinmux_init(void) +{ + pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); } -#endif diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 2edb4aa..8acd65b 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -20,6 +20,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 #define CONFIG_OF_CONTROL
Init pinmux in one shot, in order to avoid any conflicts.
Signed-off-by: Lucas Stach dev@lynxeye.de --- board/compulab/trimslice/trimslice.c | 146 +++++++++++++++++++++++++++-------- include/configs/trimslice.h | 3 + 2 files changed, 118 insertions(+), 31 deletions(-)
diff --git a/board/compulab/trimslice/trimslice.c b/board/compulab/trimslice/trimslice.c index 8f4dd09..9af7ca6 100644 --- a/board/compulab/trimslice/trimslice.c +++ b/board/compulab/trimslice/trimslice.c @@ -1,6 +1,8 @@ /* * (C) Copyright 2010-2012 * NVIDIA Corporation <www.nvidia.com> + * (C) Copyright 2013 + * Lucas Stach * * See file CREDITS for list of people who contributed to this * project. @@ -25,7 +27,6 @@ #include <asm/io.h> #include <asm/arch/tegra.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/mmc.h> #include <asm/gpio.h> @@ -34,41 +35,11 @@ #include <mmc.h> #endif
-void pin_mux_usb(void) -{ - /* - * USB1 internal/external mux GPIO, which masquerades as a VBUS GPIO - * in the current device tree. - */ - pinmux_tristate_disable(PINGRP_UAC); -} - -void pin_mux_spi(void) -{ - funcmux_select(PERIPH_ID_SPI1, FUNCMUX_SPI1_GMC_GMD); -} - -/* - * Routine: pin_mux_mmc - * Description: setup the pin muxes/tristate values for the SDMMC(s) - */ -static void pin_mux_mmc(void) -{ - funcmux_select(PERIPH_ID_SDMMC1, FUNCMUX_SDMMC1_SDIO1_4BIT); - funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_4_BIT); - - /* For CD GPIO PP1 */ - pinmux_tristate_disable(PINGRP_DAP3); -} - /* this is a weak define that we are overriding */ int board_mmc_init(bd_t *bd) { debug("board_mmc_init called\n");
- /* Enable muxes, etc. for SDMMC controllers */ - pin_mux_mmc(); - /* init dev 0 (SDMMC4), (micro-SD slot) with 4-bit bus */ tegra_mmc_init(0, 4, -1, GPIO_PP1);
@@ -77,3 +48,116 @@ int board_mmc_init(bd_t *bd)
return 0; } +static struct pingroup_config trimslice_pinmux[] = { + PINMUX_ENTRY(ATA, IDE, NORMAL, TRISTATE), + PINMUX_ENTRY(ATB, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(ATC, NAND, NORMAL, TRISTATE), + PINMUX_ENTRY(ATD, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(ATE, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV1, PLLA_OUT, NORMAL, TRISTATE), + PINMUX_ENTRY(CDEV2, PLLP_OUT4, NORMAL, TRISTATE), + PINMUX_ENTRY(CRTP, CRT, NORMAL, TRISTATE), + PINMUX_ENTRY(CSUS, VI_SENSOR_CLK, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP1, DAP1, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP2, DAP2, NORMAL, TRISTATE), + PINMUX_ENTRY(DAP3, DAP3, NORMAL, NORMAL), /* GPIO PP1 */ + PINMUX_ENTRY(DAP4, DAP4, NORMAL, TRISTATE), + PINMUX_ENTRY(DDC, I2C2, NORMAL, TRISTATE), + PINMUX_ENTRY(DTA, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTB, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTC, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTD, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTE, VI, NORMAL, TRISTATE), + PINMUX_ENTRY(DTF, I2C3, NORMAL, TRISTATE), + PINMUX_ENTRY(GMA, SDIO4, NORMAL, NORMAL), /* SDMMC4 */ + PINMUX_ENTRY(GMB, NAND, NORMAL, TRISTATE), + PINMUX_ENTRY(GMC, SFLASH, NORMAL, NORMAL), /* SPI1 */ + PINMUX_ENTRY(GMD, SFLASH, NORMAL, NORMAL), /* SPI1 */ + PINMUX_ENTRY(GME, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(GPU, UARTA, NORMAL, NORMAL), /* UART A */ + PINMUX_ENTRY(GPU7, RTCK, NORMAL, NORMAL), /* JTAG RTCK */ + PINMUX_ENTRY(GPV, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(HDINT, HDMI, NORMAL, TRISTATE), + PINMUX_ENTRY(I2CP, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(IRRX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(IRTX, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCA, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCB, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCC, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCD, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCE, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(KBCF, KBC, NORMAL, TRISTATE), + PINMUX_ENTRY(LCSN, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD3, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD4, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD5, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD6, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD7, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD8, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD9, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD10, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD11, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD12, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD13, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD14, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD15, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD16, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LD17, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDC, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHP2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LHS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LM1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPP, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LPW2, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSC1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSCK, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDA, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSDI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LSPI, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP0, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVP1, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(LVS, DISPA, NORMAL, TRISTATE), + PINMUX_ENTRY(OWC, RSVD2, NORMAL, TRISTATE), + PINMUX_ENTRY(PTA, GMI, NORMAL, TRISTATE), + PINMUX_ENTRY(RM, I2C, NORMAL, TRISTATE), + PINMUX_ENTRY(SDB, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDC, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDD, PWM, NORMAL, TRISTATE), + PINMUX_ENTRY(SDIO1, SDIO1, NORMAL, NORMAL), /* SDMMC1 */ + PINMUX_ENTRY(SLXA, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXC, SDIO3, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXD, SDIO3, NORMAL, TRISTATE), + PINMUX_ENTRY(SLXK, PCIE, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDI, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SPDO, SPDIF, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIA, SPI2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIB, SPI2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIC, SPI2, NORMAL, TRISTATE), + PINMUX_ENTRY(SPID, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIE, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIF, SPI1, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIG, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(SPIH, SPI2_ALT, NORMAL, TRISTATE), + PINMUX_ENTRY(UAA, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAB, ULPI, NORMAL, TRISTATE), + PINMUX_ENTRY(UAC, RSVD2, NORMAL, NORMAL), /* GPIO PV2 */ + PINMUX_ENTRY(UAD, UARTB, NORMAL, TRISTATE), + PINMUX_ENTRY(UCA, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UCB, UARTC, NORMAL, TRISTATE), + PINMUX_ENTRY(UDA, ULPI, NORMAL, TRISTATE), +}; + +void pinmux_init(void) +{ + pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); +} diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index 334d3a3..c581717 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -27,6 +27,9 @@ #include <asm/sizes.h> #include "tegra20-common.h"
+/* Enable tablebased pinmux */ +#define CONFIG_TEGRA_TABLEBASED_PINMUX + /* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice #define CONFIG_OF_CONTROL
All boards are converted to the new tablebased pinmux setup. Get rid of the old method.
Signed-off-by: Lucas Stach dev@lynxeye.de --- arch/arm/cpu/tegra-common/board.c | 25 -------------------- arch/arm/include/asm/arch-tegra/board.h | 12 ---------- board/nvidia/common/board.c | 41 +-------------------------------- drivers/i2c/tegra_i2c.c | 9 -------- drivers/input/tegra-kbc.c | 4 +--- drivers/video/tegra.c | 3 --- include/configs/colibri_t20_iris.h | 4 ---- include/configs/harmony.h | 3 --- include/configs/medcom-wide.h | 3 --- include/configs/paz00.h | 3 --- include/configs/plutux.h | 3 --- include/configs/seaboard.h | 3 --- include/configs/tec.h | 3 --- include/configs/trimslice.h | 4 ---- include/configs/ventana.h | 3 --- include/configs/whistler.h | 4 ---- 16 files changed, 2 insertions(+), 125 deletions(-)
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index 1ec6c06..bb6a035 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -102,30 +102,6 @@ int checkboard(void) } #endif /* CONFIG_DISPLAY_BOARDINFO */
-static int uart_configs[] = { -#if defined(CONFIG_TEGRA20) - #if defined(CONFIG_TEGRA_UARTA_UAA_UAB) - FUNCMUX_UART1_UAA_UAB, - #elif defined(CONFIG_TEGRA_UARTA_GPU) - FUNCMUX_UART1_GPU, - #elif defined(CONFIG_TEGRA_UARTA_SDIO1) - FUNCMUX_UART1_SDIO1, - #else - FUNCMUX_UART1_IRRX_IRTX, - #endif - FUNCMUX_UART2_UARTB, - -1, - FUNCMUX_UART4_GMC, - -1, -#else /* Tegra30 */ - FUNCMUX_UART1_ULPI, /* UARTA */ - -1, - -1, - -1, - -1, -#endif -}; - /** * Set up the specified uarts * @@ -145,7 +121,6 @@ static void setup_uarts(int uart_ids) if (uart_ids & (1 << i)) { enum periph_id id = id_for_uart[i];
- funcmux_select(id, uart_configs[i]); clock_ll_start_uart(id); } } diff --git a/arch/arm/include/asm/arch-tegra/board.h b/arch/arm/include/asm/arch-tegra/board.h index 3db0d93..fffd55e 100644 --- a/arch/arm/include/asm/arch-tegra/board.h +++ b/arch/arm/include/asm/arch-tegra/board.h @@ -34,16 +34,4 @@ void board_init_uart_f(void); /* Set up any early GPIOs the board might need for proper operation */ void gpio_early_init(void); /* overrideable GPIO config */
-/* - * Hooks to allow boards to set up the pinmux for a specific function. - * Has to be implemented in the board files as we don't yet support pinmux - * setup from FTD. If a board file does not implement one of those functions - * an empty stub function will be called. - */ - -void pin_mux_usb(void); /* overrideable USB pinmux setup */ -void pin_mux_spi(void); /* overrideable SPI pinmux setup */ -void pin_mux_nand(void); /* overrideable NAND pinmux setup */ -void pin_mux_display(void); /* overrideable DISPLAY pinmux setup */ - #endif diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index d9d0e59..c76791c 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -69,18 +69,6 @@ int timer_init(void) } #endif
-void __pin_mux_usb(void) -{ -} - -void pin_mux_usb(void) __attribute__((weak, alias("__pin_mux_usb"))); - -void __pin_mux_spi(void) -{ -} - -void pin_mux_spi(void) __attribute__((weak, alias("__pin_mux_spi"))); - void __gpio_early_init_uart(void) { } @@ -88,19 +76,6 @@ void __gpio_early_init_uart(void) void gpio_early_init_uart(void) __attribute__((weak, alias("__gpio_early_init_uart")));
-void __pin_mux_nand(void) -{ - funcmux_select(PERIPH_ID_NDFLASH, FUNCMUX_DEFAULT); -} - -void pin_mux_nand(void) __attribute__((weak, alias("__pin_mux_nand"))); - -void __pin_mux_display(void) -{ -} - -void pin_mux_display(void) __attribute__((weak, alias("__pin_mux_display"))); - /* * Routine: power_det_init * Description: turn off power detects @@ -132,9 +107,6 @@ int board_init(void) gpio_config_uart(); #endif #ifdef CONFIG_TEGRA_SPI -#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX - pin_mux_spi(); -#endif spi_init(); #endif #ifdef CONFIG_PWM_TEGRA @@ -142,9 +114,6 @@ int board_init(void) debug("%s: Failed to init pwm\n", __func__); #endif #ifdef CONFIG_LCD -#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX - pin_mux_display(); -#endif tegra_lcd_check_next_stage(gd->fdt_blob, 0); #endif /* boot param addr */ @@ -169,19 +138,12 @@ int board_init(void) #endif /* CONFIG_TEGRA_I2C */
#ifdef CONFIG_USB_EHCI_TEGRA -#ifndef CONFIG_TEGRA_TABLEBASED_PINMUX - pin_mux_usb(); -#endif board_usb_init(gd->fdt_blob); #endif #ifdef CONFIG_LCD tegra_lcd_check_next_stage(gd->fdt_blob, 0); #endif
-#if defined(CONFIG_TEGRA_NAND) && !defined(CONFIG_TEGRA_TABLEBASED_PINMUX) - pin_mux_nand(); -#endif - #ifdef CONFIG_TEGRA_LP0 /* save Sdram params to PMC 2, 4, and 24 for WB0 */ warmboot_save_sdram_params(); @@ -202,9 +164,8 @@ void gpio_early_init(void) __attribute__((weak, alias("__gpio_early_init")));
int board_early_init_f(void) { -#if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA_TABLEBASED_PINMUX) pinmux_init(); -#endif + board_init_uart_f();
/* Initialize periph GPIOs */ diff --git a/drivers/i2c/tegra_i2c.c b/drivers/i2c/tegra_i2c.c index efc77fa..6a6157d 100644 --- a/drivers/i2c/tegra_i2c.c +++ b/drivers/i2c/tegra_i2c.c @@ -27,7 +27,6 @@ #include <i2c.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/gpio.h> #include <asm/arch/pinmux.h> #include <asm/arch-tegra/clk_rst.h> @@ -42,7 +41,6 @@ struct i2c_bus { int id; enum periph_id periph_id; int speed; - int pinmux_config; struct i2c_control *control; struct i2c_ctlr *regs; int is_dvc; /* DVC type, rather than I2C */ @@ -99,8 +97,6 @@ static void i2c_init_controller(struct i2c_bus *i2c_bus)
setbits_le32(&dvc->ctrl3, DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK); } - - funcmux_select(i2c_bus->periph_id, i2c_bus->pinmux_config); }
static void send_packet_headers( @@ -322,11 +318,6 @@ static int i2c_get_config(const void *blob, int node, struct i2c_bus *i2c_bus) { i2c_bus->regs = (struct i2c_ctlr *)fdtdec_get_addr(blob, node, "reg");
- /* - * We don't have a binding for pinmux yet. Leave it out for now. So - * far no one needs anything other than the default. - */ - i2c_bus->pinmux_config = FUNCMUX_DEFAULT; i2c_bus->speed = fdtdec_get_int(blob, node, "clock-frequency", 0); i2c_bus->periph_id = clock_decode_periph_id(blob, node);
diff --git a/drivers/input/tegra-kbc.c b/drivers/input/tegra-kbc.c index 88471d3..9d980a4 100644 --- a/drivers/input/tegra-kbc.c +++ b/drivers/input/tegra-kbc.c @@ -29,7 +29,6 @@ #include <tegra-kbc.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch-tegra/timer.h> #include <linux/input.h>
@@ -348,8 +347,7 @@ static int init_tegra_keyboard(void) #error "Tegra keyboard driver requires FDT definitions" #endif
- /* Set up pin mux and enable the clock */ - funcmux_select(PERIPH_ID_KBC, FUNCMUX_DEFAULT); + /* enable the clock */ clock_enable(PERIPH_ID_KBC); config_kbc_gpio(config.kbc);
diff --git a/drivers/video/tegra.c b/drivers/video/tegra.c index afcb008..1ebefb6 100644 --- a/drivers/video/tegra.c +++ b/drivers/video/tegra.c @@ -27,7 +27,6 @@ #include <asm/gpio.h>
#include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/pwm.h> #include <asm/arch/display.h> @@ -275,8 +274,6 @@ static int handle_stage(const void *blob) * variable. */
- funcmux_select(PERIPH_ID_DISP1, FUNCMUX_DEFAULT); - fdtdec_setup_gpio(&config.panel_vdd); fdtdec_setup_gpio(&config.lvds_shutdown); fdtdec_setup_gpio(&config.backlight_vdd); diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 513a5ba..6b68ebf 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -18,9 +18,6 @@
#include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable FDT support */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-colibri_t20_iris #define CONFIG_OF_CONTROL @@ -32,7 +29,6 @@
/* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_SDIO1 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/harmony.h b/include/configs/harmony.h index d64d501..8d1fd47 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -27,9 +27,6 @@ #include <asm/sizes.h> #include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony #define CONFIG_OF_CONTROL diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index a2913ee..bae4ba0 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -28,9 +28,6 @@
#include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Medcom-Wide. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide #define CONFIG_OF_CONTROL diff --git a/include/configs/paz00.h b/include/configs/paz00.h index 8acd65b..2edb4aa 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -20,9 +20,6 @@ #include <asm/sizes.h> #include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 #define CONFIG_OF_CONTROL diff --git a/include/configs/plutux.h b/include/configs/plutux.h index 5a02c27..deee237 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -28,9 +28,6 @@
#include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Plutux. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-plutux #define CONFIG_OF_CONTROL diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index 4e3bf1c..de0c777 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -35,9 +35,6 @@
#include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard #define CONFIG_OF_CONTROL diff --git a/include/configs/tec.h b/include/configs/tec.h index 74c56d8..caeb9cd 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -28,9 +28,6 @@
#include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for TEC. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-tec #define CONFIG_OF_CONTROL diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index c581717..32c9cf6 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -27,9 +27,6 @@ #include <asm/sizes.h> #include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice #define CONFIG_OF_CONTROL @@ -41,7 +38,6 @@
/* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_GPU #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_TRIMSLICE diff --git a/include/configs/ventana.h b/include/configs/ventana.h index 9a023b0..b55ebc9 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -27,9 +27,6 @@ #include <asm/sizes.h> #include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana #define CONFIG_OF_CONTROL diff --git a/include/configs/whistler.h b/include/configs/whistler.h index d45fa44..3f9553a 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -27,9 +27,6 @@ #include <asm/sizes.h> #include "tegra20-common.h"
-/* Enable tablebased pinmux */ -#define CONFIG_TEGRA_TABLEBASED_PINMUX - /* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */ #define CONFIG_DEFAULT_DEVICE_TREE tegra20-whistler #define CONFIG_OF_CONTROL @@ -41,7 +38,6 @@
/* Board-specific serial config */ #define CONFIG_TEGRA_ENABLE_UARTA -#define CONFIG_TEGRA_UARTA_UAA_UAB #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_WHISTLER
On 01/24/2013 08:48 AM, Lucas Stach wrote:
All boards are converted to the new tablebased pinmux setup. Get rid of the old method.
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
@@ -145,7 +121,6 @@ static void setup_uarts(int uart_ids) if (uart_ids & (1 << i)) { enum periph_id id = id_for_uart[i];
funcmux_select(id, uart_configs[i]); clock_ll_start_uart(id);
Doesn't the debug UART get set up very early, in the SPL, before any table-based pinmux could be activated?
If so, I think we need to leave this one funcmux API call in place, so that the debug UART always works nice and early.
If not, how much does this series increase the binary of the SPL?
Am Freitag, den 25.01.2013, 14:12 -0800 schrieb Stephen Warren:
On 01/24/2013 08:48 AM, Lucas Stach wrote:
All boards are converted to the new tablebased pinmux setup. Get rid of the old method.
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
@@ -145,7 +121,6 @@ static void setup_uarts(int uart_ids) if (uart_ids & (1 << i)) { enum periph_id id = id_for_uart[i];
funcmux_select(id, uart_configs[i]); clock_ll_start_uart(id);Doesn't the debug UART get set up very early, in the SPL, before any table-based pinmux could be activated?
If so, I think we need to leave this one funcmux API call in place, so that the debug UART always works nice and early.
If not, how much does this series increase the binary of the SPL?
Ah right, I forgot about SPL debug. If we go for FDT based pinmux, we have to init UART in some explicit way, as DT and SPL don't mix.
But even then I would like to get rid of the funcmux style and rather let the boards provide a minimal UART pinmux init table, as funcmux doesn't map too well onto the plethora of config options Tegra30 provides for the pinmux.
Regards, Lucas
On 01/25/2013 02:19 PM, Lucas Stach wrote:
Am Freitag, den 25.01.2013, 14:12 -0800 schrieb Stephen Warren:
On 01/24/2013 08:48 AM, Lucas Stach wrote:
All boards are converted to the new tablebased pinmux setup. Get rid of the old method.
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c
@@ -145,7 +121,6 @@ static void setup_uarts(int uart_ids) if (uart_ids & (1 << i)) { enum periph_id id = id_for_uart[i];
funcmux_select(id, uart_configs[i]); clock_ll_start_uart(id);Doesn't the debug UART get set up very early, in the SPL, before any table-based pinmux could be activated?
If so, I think we need to leave this one funcmux API call in place, so that the debug UART always works nice and early.
If not, how much does this series increase the binary of the SPL?
Ah right, I forgot about SPL debug. If we go for FDT based pinmux, we have to init UART in some explicit way, as DT and SPL don't mix.
But even then I would like to get rid of the funcmux style and rather let the boards provide a minimal UART pinmux init table, as funcmux doesn't map too well onto the plethora of config options Tegra30 provides for the pinmux.
Yes, that's perhaps true.
For reference, I recently worked out all the possible locations of each logical signal (well, only RX/TX/RTS/CTS for Tegra30) for each UART. I put the table below for reference in case it's interesting.
Tegra20:
(sets of pingroups that create a complete UART)
- UART A:
0: unspecified
1: irrx, irtx
2: gpu
3: sdb, sdd
4: sdio1
5: uaa
6: irrx, irtx, uad
7: irrx, irtx, uad, uab
8: sdb, sdd, uad
9: sdb, sdd, uad, uab
10: uaa, uab
- UART B:
0: unspecified
1: uad
2: uad, irrx, irtx
- UART C:
0: unspecified
1: uca
2: uca, ucb
- UART D:
0: unspecified
1: gmc
2: uda
- UART E:
0: unspecified
1: gma
2: sdio1
Tegra30:
(possible locations for each signal on each UART)
- UART CTS pin
- UART A:
0: unspecified
1: uart2_rxd
2: ulpi_data2
3: gpio_pu2
- UART B:
0: unspecified
1: uart2_cts_n
- UART C:
0: unspecified
1: uart3_cts_n
- UART D:
0: unspecified
1: gmi_a18
2: ulpi_nxt
- UART E:
0: unspecified
1: sdmmc1_dat1
2: sdmmc4_dat2
- UART RTS pin
- UART A:
0: unspecified
1: uart2_txd
2: ulpi_data3
3: gpio_pu3
- UART B:
0: unspecified
1: uart2_rts_n
- UART C:
0: unspecified
1: uart3_rts_n
- UART D:
0: unspecified
1: gmi_a19
2: ulpi_stp
- UART E:
0: unspecified
1: sdmmc1_dat0
2: sdmmc4_dat3
- UART TXD pin
- UART A:
0: unspecified
1: sdmmc3_clk
2: uart2_rts_n
3: ulpi_data0
4: gpio_pu0
- UART B:
0: unspecified
1: uart2_txd
- UART C:
0: unspecified
1: uart3_txd
- UART D:
0: unspecified
1: gmi_a16
2: ulpi_clk
- UART E:
0: unspecified
1: sdmmc1_dat3
2: sdmmc4_dat0
- UART RXD pin
- UART A:
0: unspecified
1: sdmmc3_cmd
2: uart2_cts_n
3: ulpi_data1
4: gpio_pu1
- UART B:
0: unspecified
1: uart2_rxd
- UART C:
0: unspecified
1: uart3_rxd
- UART D:
0: unspecified
1: gmi_a17
2: ulpi_dir
- UART E:
0: unspecified
1: sdmmc1_dat2
2: sdmmc4_dat1
It's not used by anything anymore, now that all boards are using tablebased pinmux.
Signed-off-by: Lucas Stach dev@lynxeye.de --- arch/arm/cpu/tegra-common/board.c | 1 - arch/arm/cpu/tegra20-common/Makefile | 2 +- arch/arm/cpu/tegra20-common/funcmux.c | 310 ---------------------------- arch/arm/include/asm/arch-tegra20/funcmux.h | 67 ------ board/nvidia/common/board.c | 1 - drivers/mtd/nand/tegra_nand.c | 1 - 6 files changed, 1 insertion(+), 381 deletions(-) delete mode 100644 arch/arm/cpu/tegra20-common/funcmux.c delete mode 100644 arch/arm/include/asm/arch-tegra20/funcmux.h
diff --git a/arch/arm/cpu/tegra-common/board.c b/arch/arm/cpu/tegra-common/board.c index bb6a035..073da3a 100644 --- a/arch/arm/cpu/tegra-common/board.c +++ b/arch/arm/cpu/tegra-common/board.c @@ -24,7 +24,6 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch/tegra.h> #include <asm/arch-tegra/board.h> #include <asm/arch-tegra/pmc.h> diff --git a/arch/arm/cpu/tegra20-common/Makefile b/arch/arm/cpu/tegra20-common/Makefile index 8184e5e..142786f 100644 --- a/arch/arm/cpu/tegra20-common/Makefile +++ b/arch/arm/cpu/tegra20-common/Makefile @@ -31,7 +31,7 @@ CFLAGS_arch/arm/cpu/tegra20-common/warmboot_avp.o += -march=armv4t
LIB = $(obj)lib$(SOC)-common.o
-COBJS-y += clock.o funcmux.o pinmux.o +COBJS-y += clock.o pinmux.o COBJS-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o COBJS-$(CONFIG_TEGRA_PMU) += pmu.o diff --git a/arch/arm/cpu/tegra20-common/funcmux.c b/arch/arm/cpu/tegra20-common/funcmux.c deleted file mode 100644 index a1c55a6..0000000 --- a/arch/arm/cpu/tegra20-common/funcmux.c +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Tegra20 high-level function multiplexing */ -#include <common.h> -#include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> -#include <asm/arch/pinmux.h> - -/* - * The PINMUX macro is used to set up pinmux tables. - */ -#define PINMUX(grp, mux, pupd, tri) \ - {PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri} - -static const struct pingroup_config disp1_default[] = { - PINMUX(LDI, DISPA, NORMAL, NORMAL), - PINMUX(LHP0, DISPA, NORMAL, NORMAL), - PINMUX(LHP1, DISPA, NORMAL, NORMAL), - PINMUX(LHP2, DISPA, NORMAL, NORMAL), - PINMUX(LHS, DISPA, NORMAL, NORMAL), - PINMUX(LM0, RSVD4, NORMAL, NORMAL), - PINMUX(LPP, DISPA, NORMAL, NORMAL), - PINMUX(LPW0, DISPA, NORMAL, NORMAL), - PINMUX(LPW2, DISPA, NORMAL, NORMAL), - PINMUX(LSC0, DISPA, NORMAL, NORMAL), - PINMUX(LSPI, DISPA, NORMAL, NORMAL), - PINMUX(LVP1, DISPA, NORMAL, NORMAL), - PINMUX(LVS, DISPA, NORMAL, NORMAL), - PINMUX(SLXD, SPDIF, NORMAL, NORMAL), -}; - - -int funcmux_select(enum periph_id id, int config) -{ - int bad_config = config != FUNCMUX_DEFAULT; - - switch (id) { - case PERIPH_ID_UART1: - switch (config) { - case FUNCMUX_UART1_IRRX_IRTX: - pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA); - pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA); - pinmux_tristate_disable(PINGRP_IRRX); - pinmux_tristate_disable(PINGRP_IRTX); - break; - case FUNCMUX_UART1_UAA_UAB: - pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA); - pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA); - pinmux_tristate_disable(PINGRP_UAA); - pinmux_tristate_disable(PINGRP_UAB); - bad_config = 0; - break; - case FUNCMUX_UART1_GPU: - pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA); - pinmux_tristate_disable(PINGRP_GPU); - bad_config = 0; - break; - case FUNCMUX_UART1_SDIO1: - pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_UARTA); - pinmux_tristate_disable(PINGRP_SDIO1); - bad_config = 0; - break; - } - if (!bad_config) { - /* - * Tegra appears to boot with function UARTA pre- - * selected on mux group SDB. If two mux groups are - * both set to the same function, it's unclear which - * group's pins drive the RX signals into the HW. - * For UARTA, SDB certainly overrides group IRTX in - * practice. To solve this, configure some alternative - * function on SDB to avoid the conflict. Also, tri- - * state the group to avoid driving any signal onto it - * until we know what's connected. - */ - pinmux_tristate_enable(PINGRP_SDB); - pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); - } - break; - - case PERIPH_ID_UART2: - if (config == FUNCMUX_UART2_UARTB) { - pinmux_set_func(PINGRP_UAD, PMUX_FUNC_UARTB); - pinmux_tristate_disable(PINGRP_UAD); - } - break; - - case PERIPH_ID_UART4: - if (config == FUNCMUX_UART4_GMC) { - pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD); - pinmux_tristate_disable(PINGRP_GMC); - } - break; - - case PERIPH_ID_DVC_I2C: - /* there is only one selection, pinmux_config is ignored */ - if (config == FUNCMUX_DVC_I2CP) { - pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C); - pinmux_tristate_disable(PINGRP_I2CP); - } - break; - - case PERIPH_ID_I2C1: - /* support pinmux_config of 0 for now, */ - if (config == FUNCMUX_I2C1_RM) { - pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C); - pinmux_tristate_disable(PINGRP_RM); - } - break; - case PERIPH_ID_I2C2: /* I2C2 */ - switch (config) { - case FUNCMUX_I2C2_DDC: /* DDC pin group, select I2C2 */ - pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2); - /* PTA to HDMI */ - pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI); - pinmux_tristate_disable(PINGRP_DDC); - break; - case FUNCMUX_I2C2_PTA: /* PTA pin group, select I2C2 */ - pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2); - /* set DDC_SEL to RSVDx (RSVD2 works for now) */ - pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2); - pinmux_tristate_disable(PINGRP_PTA); - bad_config = 0; - break; - } - break; - case PERIPH_ID_I2C3: /* I2C3 */ - /* support pinmux_config of 0 for now */ - if (config == FUNCMUX_I2C3_DTF) { - pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3); - pinmux_tristate_disable(PINGRP_DTF); - } - break; - - case PERIPH_ID_SDMMC1: - if (config == FUNCMUX_SDMMC1_SDIO1_4BIT) { - pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1); - pinmux_tristate_disable(PINGRP_SDIO1); - } - break; - - case PERIPH_ID_SDMMC2: - if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) { - pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2); - pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2); - - pinmux_tristate_disable(PINGRP_DTA); - pinmux_tristate_disable(PINGRP_DTD); - } - break; - - case PERIPH_ID_SDMMC3: - switch (config) { - case FUNCMUX_SDMMC3_SDB_SLXA_8BIT: - pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3); - - pinmux_tristate_disable(PINGRP_SLXA); - pinmux_tristate_disable(PINGRP_SLXC); - pinmux_tristate_disable(PINGRP_SLXD); - pinmux_tristate_disable(PINGRP_SLXK); - /* fall through */ - - case FUNCMUX_SDMMC3_SDB_4BIT: - pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3); - pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3); - - pinmux_tristate_disable(PINGRP_SDB); - pinmux_tristate_disable(PINGRP_SDC); - pinmux_tristate_disable(PINGRP_SDD); - bad_config = 0; - break; - } - break; - - case PERIPH_ID_SDMMC4: - switch (config) { - case FUNCMUX_SDMMC4_ATC_ATD_8BIT: - pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATC); - pinmux_tristate_disable(PINGRP_ATD); - break; - - case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT: - pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); - pinmux_tristate_disable(PINGRP_GME); - /* fall through */ - - case FUNCMUX_SDMMC4_ATB_GMA_4_BIT: - pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); - pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); - - pinmux_tristate_disable(PINGRP_ATB); - pinmux_tristate_disable(PINGRP_GMA); - bad_config = 0; - break; - } - break; - - case PERIPH_ID_KBC: - if (config == FUNCMUX_DEFAULT) { - enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB, - PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE, - PINGRP_KBCF}; - int i; - - for (i = 0; i < ARRAY_SIZE(grp); i++) { - pinmux_tristate_disable(grp[i]); - pinmux_set_func(grp[i], PMUX_FUNC_KBC); - pinmux_set_pullupdown(grp[i], PMUX_PULL_UP); - } - } - break; - - case PERIPH_ID_USB2: - if (config == FUNCMUX_USB2_ULPI) { - pinmux_set_func(PINGRP_UAA, PMUX_FUNC_ULPI); - pinmux_set_func(PINGRP_UAB, PMUX_FUNC_ULPI); - pinmux_set_func(PINGRP_UDA, PMUX_FUNC_ULPI); - - pinmux_tristate_disable(PINGRP_UAA); - pinmux_tristate_disable(PINGRP_UAB); - pinmux_tristate_disable(PINGRP_UDA); - } - break; - - case PERIPH_ID_SPI1: - if (config == FUNCMUX_SPI1_GMC_GMD) { - pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH); - pinmux_set_func(PINGRP_GMD, PMUX_FUNC_SFLASH); - - pinmux_tristate_disable(PINGRP_GMC); - pinmux_tristate_disable(PINGRP_GMD); - } - break; - - case PERIPH_ID_NDFLASH: - switch (config) { - case FUNCMUX_NDFLASH_ATC: - pinmux_set_func(PINGRP_ATC, PMUX_FUNC_NAND); - pinmux_tristate_disable(PINGRP_ATC); - break; - case FUNCMUX_NDFLASH_KBC_8_BIT: - pinmux_set_func(PINGRP_KBCA, PMUX_FUNC_NAND); - pinmux_set_func(PINGRP_KBCC, PMUX_FUNC_NAND); - pinmux_set_func(PINGRP_KBCD, PMUX_FUNC_NAND); - pinmux_set_func(PINGRP_KBCE, PMUX_FUNC_NAND); - pinmux_set_func(PINGRP_KBCF, PMUX_FUNC_NAND); - - pinmux_tristate_disable(PINGRP_KBCA); - pinmux_tristate_disable(PINGRP_KBCC); - pinmux_tristate_disable(PINGRP_KBCD); - pinmux_tristate_disable(PINGRP_KBCE); - pinmux_tristate_disable(PINGRP_KBCF); - - bad_config = 0; - break; - } - break; - case PERIPH_ID_DISP1: - if (config == FUNCMUX_DEFAULT) { - int i; - - for (i = PINGRP_LD0; i <= PINGRP_LD17; i++) { - pinmux_set_func(i, PMUX_FUNC_DISPA); - pinmux_tristate_disable(i); - pinmux_set_pullupdown(i, PMUX_PULL_NORMAL); - } - pinmux_config_table(disp1_default, - ARRAY_SIZE(disp1_default)); - } - break; - - default: - debug("%s: invalid periph_id %d", __func__, id); - return -1; - } - - if (bad_config) { - debug("%s: invalid config %d for periph_id %d", __func__, - config, id); - return -1; - } - - return 0; -} diff --git a/arch/arm/include/asm/arch-tegra20/funcmux.h b/arch/arm/include/asm/arch-tegra20/funcmux.h deleted file mode 100644 index 963f021..0000000 --- a/arch/arm/include/asm/arch-tegra20/funcmux.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* Tegra20 high-level function multiplexing */ - -#ifndef _TEGRA20_FUNCMUX_H_ -#define _TEGRA20_FUNCMUX_H_ - -#include <asm/arch-tegra/funcmux.h> - -/* Configs supported by the func mux */ -enum { - FUNCMUX_DEFAULT = 0, /* default config */ - - /* UART configs */ - FUNCMUX_UART1_IRRX_IRTX = 0, - FUNCMUX_UART1_UAA_UAB, - FUNCMUX_UART1_GPU, - FUNCMUX_UART1_SDIO1, - FUNCMUX_UART2_UARTB = 0, - FUNCMUX_UART4_GMC = 0, - - /* I2C configs */ - FUNCMUX_DVC_I2CP = 0, - FUNCMUX_I2C1_RM = 0, - FUNCMUX_I2C2_DDC = 0, - FUNCMUX_I2C2_PTA, - FUNCMUX_I2C3_DTF = 0, - - /* SDMMC configs */ - FUNCMUX_SDMMC1_SDIO1_4BIT = 0, - FUNCMUX_SDMMC2_DTA_DTD_8BIT = 0, - FUNCMUX_SDMMC3_SDB_4BIT = 0, - FUNCMUX_SDMMC3_SDB_SLXA_8BIT, - FUNCMUX_SDMMC4_ATC_ATD_8BIT = 0, - FUNCMUX_SDMMC4_ATB_GMA_4_BIT, - FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT, - - /* USB configs */ - FUNCMUX_USB2_ULPI = 0, - - /* Serial Flash configs */ - FUNCMUX_SPI1_GMC_GMD = 0, - - /* NAND flags */ - FUNCMUX_NDFLASH_ATC = 0, - FUNCMUX_NDFLASH_KBC_8_BIT, -}; -#endif /* _TEGRA20_FUNCMUX_H_ */ diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c index c76791c..9e408e4 100644 --- a/board/nvidia/common/board.c +++ b/board/nvidia/common/board.c @@ -29,7 +29,6 @@ #ifdef CONFIG_LCD #include <asm/arch/display.h> #endif -#include <asm/arch/funcmux.h> #include <asm/arch/pinmux.h> #include <asm/arch/pmu.h> #ifdef CONFIG_PWM_TEGRA diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 4d94cc6..8c1d0f4 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -27,7 +27,6 @@ #include <asm/io.h> #include <nand.h> #include <asm/arch/clock.h> -#include <asm/arch/funcmux.h> #include <asm/arch-tegra/clk_rst.h> #include <asm/errno.h> #include <asm/gpio.h>
participants (4)
-
Lucas Stach -
Simon Glass -
Stephen Warren -
Stephen Warren