[PATCH] usb: dwc2: Add small delay after reset

In Cyclone 5 SoC platform, the first USB probing is failed but second probing is success. DWC2 driver read gsnpsid register right after de-assert reset, but controller is not ready yet and it returns gsnpsid 0. Adding small delay after de-assert reset solve the issue.
Retry with this fix more than 10 times without issue.
=> usb reset resetting USB... Bus usb@ffb40000: usb probe SNPSID invalid (not DWC2 OTG device): 00000000 Port not available. => usb reset resetting USB... Bus usb@ffb40000: usb probe scanning bus usb@ffb40000 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found
Signed-off-by: Ley Foon Tan ley.foon.tan@intel.com --- drivers/usb/host/dwc2.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index b9c56f763b..cbbef19201 100644 --- a/drivers/usb/host/dwc2.c +++ b/drivers/usb/host/dwc2.c @@ -1153,6 +1153,11 @@ static int dwc2_reset(struct udevice *dev) return ret; }
+ /* Certain controller takes some time to complete the reset, + * add small delay before access it. + */ + udelay(5); + return 0; }

On 12/23/19 9:07 AM, Ley Foon Tan wrote:
In Cyclone 5 SoC platform, the first USB probing is failed but second probing is success. DWC2 driver read gsnpsid register right after de-assert reset, but controller is not ready yet and it returns gsnpsid 0. Adding small delay after de-assert reset solve the issue.
Retry with this fix more than 10 times without issue.
=> usb reset resetting USB... Bus usb@ffb40000: usb probe SNPSID invalid (not DWC2 OTG device): 00000000 Port not available. => usb reset resetting USB... Bus usb@ffb40000: usb probe scanning bus usb@ffb40000 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found
Can't you poll for the readiness of the IP somehow instead of using arbitrary delay ?

-----Original Message----- From: Marek Vasut marex@denx.de Sent: Monday, December 23, 2019 7:59 PM To: Tan, Ley Foon ley.foon.tan@intel.com; u-boot@lists.denx.de Cc: Ley Foon Tan lftan.linux@gmail.com; See, Chin Liang chin.liang.see@intel.com; Chee, Tien Fong tien.fong.chee@intel.com Subject: Re: [PATCH] usb: dwc2: Add small delay after reset
On 12/23/19 9:07 AM, Ley Foon Tan wrote:
In Cyclone 5 SoC platform, the first USB probing is failed but second probing is success. DWC2 driver read gsnpsid register right after de-assert reset, but controller is not ready yet and it returns gsnpsid 0. Adding small delay after de-assert reset solve the issue.
Retry with this fix more than 10 times without issue.
=> usb reset resetting USB... Bus usb@ffb40000: usb probe SNPSID invalid (not DWC2 OTG device): 00000000 Port not available. => usb reset resetting USB... Bus usb@ffb40000: usb probe scanning bus usb@ffb40000 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found
Can't you poll for the readiness of the IP somehow instead of using arbitrary delay ?
One way we can do is calling to reset_status() to read back reset status. Will change that.
Regards Ley Foon
participants (3)
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Ley Foon Tan
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Marek Vasut
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Tan, Ley Foon