Hi,

Anyone has any comments on this? Please share your thoughts.

Thanks and best regards, Codrin

-----Original Message----- From: Codrin Ciubotariu [mailto:codrin.ciubotariu@freescale.com] Sent: Friday, February 13, 2015 2:48 PM To: u-boot@lists.denx.de Cc: Sun York-R58495; Ciubotariu Codrin Constantin-B43658 Subject: [PATCH] net/phy/realtek: Disable interrupt on Realtek Ethernet PHY drivers

Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have interrupts enabled by default. If the interrupt is not treated later by the OS and the PHY's interrupt line is enabled and shared with other interrupts, the system will get an interrupt storm. This patch disables the interrupt for PHY devices that use one of the current Realtek Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L) have the interrupt masked. In this case, the functionality of the PHY should not be afected since this patch brings INER and INSR registers to their default values.

Signed-off-by: Codrin Ciubotariu codrin.ciubotariu@freescale.com Change-Id: Ic5e353da24f8fec335e446098ed863991a655554

---

drivers/net/phy/realtek.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index a3ace68..ee97079 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -3,7 +3,7 @@

• SPDX-License-Identifier: GPL-2.0+

• • Copyright 2010-2011 Freescale Semiconductor, Inc.

• • Copyright 2010-2011, 2015 Freescale Semiconductor, Inc.
  • author Andy Fleming
  */

#include <config.h> @@ -21,12 +21,28 @@ #define MIIM_RTL8211x_PHYSTAT_SPDDONE 0x0800 #define MIIM_RTL8211x_PHYSTAT_LINK 0x0400

+/* RTL8211x PHY Interrupt Enable Register */ +#define MIIM_RTL8211x_PHY_INER 0x12 +#define MIIM_RTL8211x_PHY_INTR_ENA 0x9f01 +#define MIIM_RTL8211x_PHY_INTR_DIS 0x0000

+/* RTL8211x PHY Interrupt Status Register */ +#define MIIM_RTL8211x_PHY_INSR 0x13

/* RealTek RTL8211x */ static int rtl8211x_config(struct phy_device *phydev) { phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);

• /* mask interrupt at init; if the interrupt is

• * needed indeed, it should be explicitly enabled
  

• */
  

• phy_write(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER,

•   MIIM_RTL8211x_PHY_INTR_DIS);
  

• /* read interrupt status just to clear it */

• phy_read(phydev, MDIO_DEVAD_NONE, MIIM_RTL8211x_PHY_INER);

• genphy_config_aneg(phydev);

  return 0;

-- 1.7.11.7