RE: Need help with IDE/PCI config on unknown board(was: [U-Boot-Users] (no subject))
Thank you for your help. In answer to your questions:
Can you "see" the PCI IDE controller at this address? What's the
output of:
=> md.b e80001f0 10
I believe not because => md.b e8000000 10 e8000000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
What's the output of: => pci long
=> pci long Scanning PCI devices on bus 0
Found PCI device 00.00.00: vendor ID = 0x1014 device ID = 0x0156 command register = 0x0006 status register = 0x2210 revision ID = 0x01 class code = 0x06 (Bridge device) sub class code = 0x00 programming interface = 0x00 cache line = 0x00 latency time = 0x07 header type = 0x00 BIST = 0x00 base address 0 = 0x00000000 base address 1 = 0x00000008 base address 2 = 0x00000000 base address 3 = 0x00000000 base address 4 = 0x00000000 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x10e8 sub system ID = 0xcafe expansion ROM base address = 0x00000000 interrupt line = 0x00 interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00
Found PCI device 00.04.00: vendor ID = 0x105a device ID = 0x0d30 command register = 0x0004 status register = 0x0210 revision ID = 0x02 class code = 0x01 (Mass storage controller) sub class code = 0x01 programming interface = 0x8a cache line = 0x00 latency time = 0x40 header type = 0x00 BIST = 0x00 base address 0 = 0x000001f1 base address 1 = 0x000003f5 base address 2 = 0x00000171 base address 3 = 0x00000375 base address 4 = 0x00006801 base address 5 = 0x00000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x105a sub system ID = 0x4d33 expansion ROM base address = 0x000dc000 interrupt line = 0x1d interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 =>
I suppose that the oxFF bytes are not correct for the contents of the ide controller registers. What should I look for?
I used 0xE8000000 (apparently incorrectly) because it was reported in the following messages when initializing with the PPBBoot firmware: PCI_Scan:Device 4 is present Bus Func 2000 ClassCode 101 IDE device found: PCI_Config_Device:Read Base Addr Reg 0 = 0x000001f1 ***PCI I/O space = 0x10 bytes 0 IDE-Just Set CFG_ATA_BASE_ADDR to e8000000^M PCI_Config_Device:Read Base Addr Reg 1 = 0x000003f5 ***PCI I/O space = 0x4 bytes 10 PCI_Config_Device:Read Base Addr Reg 2 = 0x00000171 ***PCI I/O space = 0x10 bytes 20 PCI_Config_Device:Read Base Addr Reg 3 = 0x00000375 ***PCI I/O space = 0x4 bytes 30 PCI_Config_Device:Read Base Addr Reg 4 = 0xffffffc1 ***PCI I/O space = 0x40 bytes 40 PCI_Config_Device:Read Base Addr Reg 5 = 0xfffe0000 ***PCI Memory space = 0x20000 bytes Hardcode address e80001f0
PS: Please use a subject next time!
Done - see subject.
Hi Jerry,
On Thursday, 2. March 2006 04:43, Jerry K. Schieffer wrote:
Thank you for your help. In answer to your questions:
Can you "see" the PCI IDE controller at this address? What's the
output of:
=> md.b e80001f0 10
I believe not because => md.b e8000000 10 e8000000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
Correct. That's _not_ the IDE controller.
Found PCI device 00.04.00: vendor ID = 0x105a device ID = 0x0d30 command register = 0x0004
Hmmm. I/O access is not enabled. So any access to the I/O spaces will fail.
status register = 0x0210 revision ID = 0x02 class code = 0x01 (Mass storage controller) sub class code = 0x01 programming interface = 0x8a cache line = 0x00 latency time = 0x40 header type = 0x00 BIST = 0x00 base address 0 = 0x000001f1
Also strange. I would expect the BAR's to be assigned to something like:
base address 0 = 0x008001f1
Then you could access this I/O space at 0xe88001f0. Here a dump from our Walnut with a PCI IDE controller:
Found PCI device 00.01.00: vendor ID = 0x1191 device ID = 0x0009 command register = 0x0007 status register = 0x02b0 revision ID = 0x10 class code = 0x01 (Mass storage controller) sub class code = 0x80 programming interface = 0x00 cache line = 0x08 latency time = 0x80 header type = 0x00 BIST = 0x00 base address 0 = 0x00800001 base address 1 = 0x00800009 base address 2 = 0x00800011 base address 3 = 0x00800019 base address 4 = 0x00800081 base address 5 = 0x80000000 cardBus CIS pointer = 0x00000000 sub system vendor ID = 0x1191 sub system ID = 0x0009 expansion ROM base address = 0x40000000 interrupt line = 0x1e interrupt pin = 0x01 min Grant = 0x0b max Latency = 0x04 => md.b e8800010 10 e8800010: 7f 7f 7f 7f 7f 7f 7f 7f ff ff 7f ff ff ff ff ff ................
Do you use the same PCI config setup as the Walnut in your board config file? Do you use the lastest U-Boot version (current GIT or CVS version)?
Best regards, Stefan
participants (2)
-
Jerry K. Schieffer -
Stefan Roese