[U-Boot] [PATCH v4 1/2] arm: sunxi: Allwinner A10 SPI driver
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev stefan@olimex.com --- Changes for v4: - Sync patch with u-boot-sunxi (80719938c9f901cc6b90b85d8065d084a03c06ae) - Change wait_for_bits() to wait_for_bits_le32() - Change CCTL register modification - Some coding style changes - Add flash subnode in the DT - Disable spl build of sf_probe - Enable CONFIG_DM_SPI_FLASH - Set enviroment in spi flash
Changes for v3: - Add required changes in dts and defeconfig file for testing
Changes for v2: - Updated copyright including original owners - Remove write/read register function. They are replaced with direct opts - Some coding style changes
drivers/spi/Kconfig | 5 + drivers/spi/Makefile | 1 + drivers/spi/sun4i_spi.c | 456 ++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 462 insertions(+) create mode 100644 drivers/spi/sun4i_spi.c
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 1e95dc4..bb9f800 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -148,6 +148,11 @@ config STM32_QSPI used to access the SPI NOR flash chips on platforms embedding this ST IP core.
+config SUN4I_SPI + bool "Allwinner A10 SoCs SPI controller" + help + SPI driver for Allwinner sun4i, sun5i and sun7i SoCs + config TEGRA114_SPI bool "nVidia Tegra114 SPI driver" help diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 4b6000f..794e70c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -44,6 +44,7 @@ obj-$(CONFIG_SANDBOX_SPI) += sandbox_spi.o obj-$(CONFIG_SH_SPI) += sh_spi.o obj-$(CONFIG_SH_QSPI) += sh_qspi.o obj-$(CONFIG_STM32_QSPI) += stm32_qspi.o +obj-$(CONFIG_SUN4I_SPI) += sun4i_spi.o obj-$(CONFIG_TEGRA114_SPI) += tegra114_spi.o obj-$(CONFIG_TEGRA20_SFLASH) += tegra20_sflash.o obj-$(CONFIG_TEGRA20_SLINK) += tegra20_slink.o diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c new file mode 100644 index 0000000..b86b5a0 --- /dev/null +++ b/drivers/spi/sun4i_spi.c @@ -0,0 +1,456 @@ +/* + * (C) Copyright 2017 Whitebox Systems / Northend Systems B.V. + * S.J.R. van Schaik stephan@whiteboxsystems.nl + * M.B.W. Wajer merlijn@whiteboxsystems.nl + * + * (C) Copyright 2017 Olimex Ltd.. + * Stefan Mavrodiev stefan@olimex.com + * + * Based on linux spi driver. Original copyright follows: + * linux/drivers/spi/spi-sun4i.c + * + * Copyright (C) 2012 - 2014 Allwinner Tech + * Pan Nan pannan@allwinnertech.com + * + * Copyright (C) 2014 Maxime Ripard + * Maxime Ripard maxime.ripard@free-electrons.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <spi.h> +#include <errno.h> +#include <fdt_support.h> +#include <wait_bit.h> + +#include <asm/bitops.h> +#include <asm/gpio.h> +#include <asm/io.h> + +#include <asm/arch/clock.h> + +#define SUN4I_FIFO_DEPTH 64 + +#define SUN4I_RXDATA_REG 0x00 + +#define SUN4I_TXDATA_REG 0x04 + +#define SUN4I_CTL_REG 0x08 +#define SUN4I_CTL_ENABLE BIT(0) +#define SUN4I_CTL_MASTER BIT(1) +#define SUN4I_CTL_CPHA BIT(2) +#define SUN4I_CTL_CPOL BIT(3) +#define SUN4I_CTL_CS_ACTIVE_LOW BIT(4) +#define SUN4I_CTL_LMTF BIT(6) +#define SUN4I_CTL_TF_RST BIT(8) +#define SUN4I_CTL_RF_RST BIT(9) +#define SUN4I_CTL_XCH_MASK 0x0400 +#define SUN4I_CTL_XCH BIT(10) +#define SUN4I_CTL_CS_MASK 0x3000 +#define SUN4I_CTL_CS(cs) (((cs) << 12) & SUN4I_CTL_CS_MASK) +#define SUN4I_CTL_DHB BIT(15) +#define SUN4I_CTL_CS_MANUAL BIT(16) +#define SUN4I_CTL_CS_LEVEL BIT(17) +#define SUN4I_CTL_TP BIT(18) + +#define SUN4I_INT_CTL_REG 0x0c +#define SUN4I_INT_CTL_RF_F34 BIT(4) +#define SUN4I_INT_CTL_TF_E34 BIT(12) +#define SUN4I_INT_CTL_TC BIT(16) + +#define SUN4I_INT_STA_REG 0x10 + +#define SUN4I_DMA_CTL_REG 0x14 + +#define SUN4I_WAIT_REG 0x18 + +#define SUN4I_CLK_CTL_REG 0x1c +#define SUN4I_CLK_CTL_CDR2_MASK 0xff +#define SUN4I_CLK_CTL_CDR2(div) ((div) & SUN4I_CLK_CTL_CDR2_MASK) +#define SUN4I_CLK_CTL_CDR1_MASK 0xf +#define SUN4I_CLK_CTL_CDR1(div) (((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8) +#define SUN4I_CLK_CTL_DRS BIT(12) + +#define SUN4I_MAX_XFER_SIZE 0xffffff + +#define SUN4I_BURST_CNT_REG 0x20 +#define SUN4I_BURST_CNT(cnt) ((cnt) & SUN4I_MAX_XFER_SIZE) + +#define SUN4I_XMIT_CNT_REG 0x24 +#define SUN4I_XMIT_CNT(cnt) ((cnt) & SUN4I_MAX_XFER_SIZE) + +#define SUN4I_FIFO_STA_REG 0x28 +#define SUN4I_FIFO_STA_RF_CNT_MASK 0x7f +#define SUN4I_FIFO_STA_RF_CNT_BITS 0 +#define SUN4I_FIFO_STA_TF_CNT_MASK 0x7f +#define SUN4I_FIFO_STA_TF_CNT_BITS 16 + +#define SUN4I_SPI_MAX_RATE 24000000 +#define SUN4I_SPI_MIN_RATE 3000 +#define SUN4I_SPI_DEFAULT_RATE 1000000 +#define SUN4I_SPI_TIMEOUT_US 1000000 + +/* sun4i spi register set */ +struct sun4i_spi_regs { + u32 rxdata; + u32 txdata; + u32 ctl; + u32 intctl; + u32 st; + u32 dmactl; + u32 wait; + u32 cctl; + u32 bc; + u32 tc; + u32 fifo_sta; +}; + +struct sun4i_spi_platdata { + u32 base_addr; + u32 max_hz; +}; + +struct sun4i_spi_priv { + struct sun4i_spi_regs *regs; + u32 freq; + u32 mode; + + const u8 *tx_buf; + u8 *rx_buf; +}; + +DECLARE_GLOBAL_DATA_PTR; + +static inline void sun4i_spi_drain_fifo(struct sun4i_spi_priv *priv, int len) +{ + u8 byte; + + while (len--) { + byte = readb(&priv->regs->rxdata); + *priv->rx_buf++ = byte; + } +} + +static inline void sun4i_spi_fill_fifo(struct sun4i_spi_priv *priv, int len) +{ + u8 byte; + + while (len--) { + byte = priv->tx_buf ? *priv->tx_buf++ : 0; + writeb(byte, &priv->regs->txdata); + } +} + +static void sun4i_spi_set_cs(struct udevice *bus, u8 cs, bool enable) +{ + struct sun4i_spi_priv *priv = dev_get_priv(bus); + u32 reg; + + reg = readl(&priv->regs->ctl); + + reg &= ~SUN4I_CTL_CS_MASK; + reg |= SUN4I_CTL_CS(cs); + + if (enable) + reg &= ~SUN4I_CTL_CS_LEVEL; + else + reg |= SUN4I_CTL_CS_LEVEL; + + writel(reg, &priv->regs->ctl); +} + +static int sun4i_spi_parse_pins(struct udevice *dev) +{ + const void *fdt = gd->fdt_blob; + const char *pin_name; + const fdt32_t *list; + u32 phandle; + int drive, pull = 0, pin, i; + int offset; + int size; + + list = fdt_getprop(fdt, dev_of_offset(dev), "pinctrl-0", &size); + if (!list) { + printf("WARNING: sun4i_spi: cannot find pinctrl-0 node\n"); + return -EINVAL; + } + + while (size) { + phandle = fdt32_to_cpu(*list++); + size -= sizeof(*list); + + offset = fdt_node_offset_by_phandle(fdt, phandle); + if (offset < 0) + return offset; + + drive = fdt_getprop_u32_default_node(fdt, offset, 0, + "drive-strength", 0); + if (drive) { + if (drive <= 10) + drive = 0; + else if (drive <= 20) + drive = 1; + else if (drive <= 30) + drive = 2; + else + drive = 3; + } else { + drive = fdt_getprop_u32_default_node(fdt, offset, 0, + "allwinner,drive", + 0); + drive = min(drive, 3); + } + + if (fdt_get_property(fdt, offset, "bias-disable", NULL)) + pull = 0; + else if (fdt_get_property(fdt, offset, "bias-pull-up", NULL)) + pull = 1; + else if (fdt_get_property(fdt, offset, "bias-pull-down", NULL)) + pull = 2; + else + pull = fdt_getprop_u32_default_node(fdt, offset, 0, + "allwinner,pull", + 0); + pull = min(pull, 2); + + for (i = 0; ; i++) { + pin_name = fdt_stringlist_get(fdt, offset, + "pins", i, NULL); + if (!pin_name) { + pin_name = fdt_stringlist_get(fdt, offset, + "allwinner,pins", + i, NULL); + if (!pin_name) + break; + } + + pin = name_to_gpio(pin_name); + if (pin < 0) + break; + + sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SPI0); + sunxi_gpio_set_drv(pin, drive); + sunxi_gpio_set_pull(pin, pull); + } + } + return 0; +} + +static inline void sun4i_spi_enable_clock(void) +{ + struct sunxi_ccm_reg *const ccm = + (struct sunxi_ccm_reg *const)SUNXI_CCM_BASE; + + setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_SPI0)); + writel((1 << 31), &ccm->spi0_clk_cfg); +} + +static int sun4i_spi_ofdata_to_platdata(struct udevice *bus) +{ + struct sun4i_spi_platdata *plat = dev_get_platdata(bus); + int node = dev_of_offset(bus); + + plat->base_addr = devfdt_get_addr(bus); + plat->max_hz = fdtdec_get_int(gd->fdt_blob, node, + "spi-max-frequency", + SUN4I_SPI_DEFAULT_RATE); + + if (plat->max_hz > SUN4I_SPI_MAX_RATE) + plat->max_hz = SUN4I_SPI_MAX_RATE; + + return 0; +} + +static int sun4i_spi_probe(struct udevice *bus) +{ + struct sun4i_spi_platdata *plat = dev_get_platdata(bus); + struct sun4i_spi_priv *priv = dev_get_priv(bus); + + sun4i_spi_enable_clock(); + sun4i_spi_parse_pins(bus); + + priv->regs = (struct sun4i_spi_regs *)(uintptr_t)plat->base_addr; + priv->freq = plat->max_hz; + + return 0; +} + +static int sun4i_spi_claim_bus(struct udevice *dev) +{ + struct sun4i_spi_priv *priv = dev_get_priv(dev->parent); + + writel(SUN4I_CTL_ENABLE | SUN4I_CTL_MASTER | SUN4I_CTL_TP | + SUN4I_CTL_CS_MANUAL | SUN4I_CTL_CS_ACTIVE_LOW, + &priv->regs->ctl); + return 0; +} + +static int sun4i_spi_release_bus(struct udevice *dev) +{ + struct sun4i_spi_priv *priv = dev_get_priv(dev->parent); + u32 reg; + + reg = readl(&priv->regs->ctl); + reg &= ~SUN4I_CTL_ENABLE; + writel(reg, &priv->regs->ctl); + + return 0; +} + +static int sun4i_spi_xfer(struct udevice *dev, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *bus = dev->parent; + struct sun4i_spi_priv *priv = dev_get_priv(bus); + struct dm_spi_slave_platdata *slave_plat = dev_get_parent_platdata(dev); + + u32 len = bitlen / 8; + u32 reg; + u8 nbytes; + int ret; + + priv->tx_buf = dout; + priv->rx_buf = din; + + if (bitlen % 8) { + debug("%s: non byte-aligned SPI transfer.\n", __func__); + return -ENAVAIL; + } + + if (flags & SPI_XFER_BEGIN) + sun4i_spi_set_cs(bus, slave_plat->cs, true); + + reg = readl(&priv->regs->ctl); + + /* Reset FIFOs */ + writel(reg | SUN4I_CTL_RF_RST | SUN4I_CTL_TF_RST, &priv->regs->ctl); + + while (len) { + /* Setup the transfer now... */ + nbytes = min(len, (u32)(SUN4I_FIFO_DEPTH - 1)); + + /* Setup the counters */ + writel(SUN4I_BURST_CNT(nbytes), &priv->regs->bc); + writel(SUN4I_XMIT_CNT(nbytes), &priv->regs->tc); + + /* Fill the TX FIFO */ + sun4i_spi_fill_fifo(priv, nbytes); + + /* Start the transfer */ + reg = readl(&priv->regs->ctl); + writel(reg | SUN4I_CTL_XCH, &priv->regs->ctl); + + /* Wait transfer to complete */ + ret = wait_for_bit_le32(&priv->regs->ctl, SUN4I_CTL_XCH_MASK, + false, SUN4I_SPI_TIMEOUT_US, false); + if (ret) { + printf("ERROR: sun4i_spi: Timeout transferring data\n"); + sun4i_spi_set_cs(bus, slave_plat->cs, false); + return ret; + } + + /* Drain the RX FIFO */ + sun4i_spi_drain_fifo(priv, nbytes); + + len -= nbytes; + } + + if (flags & SPI_XFER_END) + sun4i_spi_set_cs(bus, slave_plat->cs, false); + + return 0; +} + +static int sun4i_spi_set_speed(struct udevice *dev, uint speed) +{ + struct sun4i_spi_platdata *plat = dev_get_platdata(dev); + struct sun4i_spi_priv *priv = dev_get_priv(dev); + unsigned int div; + u32 reg; + + if (speed > plat->max_hz) + speed = plat->max_hz; + + if (speed < SUN4I_SPI_MIN_RATE) + speed = SUN4I_SPI_MIN_RATE; + /* + * Setup clock divider. + * + * We have two choices there. Either we can use the clock + * divide rate 1, which is calculated thanks to this formula: + * SPI_CLK = MOD_CLK / (2 ^ (cdr + 1)) + * Or we can use CDR2, which is calculated with the formula: + * SPI_CLK = MOD_CLK / (2 * (cdr + 1)) + * Whether we use the former or the latter is set through the + * DRS bit. + * + * First try CDR2, and if we can't reach the expected + * frequency, fall back to CDR1. + */ + + div = SUN4I_SPI_MAX_RATE / (2 * speed); + reg = readl(&priv->regs->cctl); + + if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { + if (div > 0) + div--; + + reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS); + reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; + } else { + div = __ilog2(SUN4I_SPI_MAX_RATE) - __ilog2(speed); + reg &= ~((SUN4I_CLK_CTL_CDR1_MASK << 8) | SUN4I_CLK_CTL_DRS); + reg |= SUN4I_CLK_CTL_CDR1(div); + } + + priv->freq = speed; + writel(reg, &priv->regs->cctl); + + return 0; +} + +static int sun4i_spi_set_mode(struct udevice *dev, uint mode) +{ + struct sun4i_spi_priv *priv = dev_get_priv(dev); + u32 reg; + + reg = readl(&priv->regs->ctl); + reg &= ~(SUN4I_CTL_CPOL | SUN4I_CTL_CPHA); + + if (mode & SPI_CPOL) + reg |= SUN4I_CTL_CPOL; + + if (mode & SPI_CPHA) + reg |= SUN4I_CTL_CPHA; + + priv->mode = mode; + writel(reg, &priv->regs->ctl); + + return 0; +} + +static const struct dm_spi_ops sun4i_spi_ops = { + .claim_bus = sun4i_spi_claim_bus, + .release_bus = sun4i_spi_release_bus, + .xfer = sun4i_spi_xfer, + .set_speed = sun4i_spi_set_speed, + .set_mode = sun4i_spi_set_mode, +}; + +static const struct udevice_id sun4i_spi_ids[] = { + { .compatible = "allwinner,sun4i-a10-spi" }, + { } +}; + +U_BOOT_DRIVER(sun4i_spi) = { + .name = "sun4i_spi", + .id = UCLASS_SPI, + .of_match = sun4i_spi_ids, + .ops = &sun4i_spi_ops, + .ofdata_to_platdata = sun4i_spi_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct sun4i_spi_platdata), + .priv_auto_alloc_size = sizeof(struct sun4i_spi_priv), + .probe = sun4i_spi_probe, +};
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are: - Exposing spi0 alternative pins in the dts file - Add alias node, enabling driver probing - Add flash sub-node of spi - Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
# Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps
# Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
=> md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53 .M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK
=> cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the same
Signed-off-by: Stefan Mavrodiev stefan@olimex.com --- arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0; + spi0 = &spi0; };
chosen { @@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
+ spi0_pins_b: spi0@1 { + allwinner,pins = "PC0", "PC1", "PC2"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + + spi0_cs0_pins_b: spi0_cs0@1 { + allwinner,pins = "PC23"; + allwinner,function = "spi0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in"; @@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; + status = "okay"; + + flash: w25q128@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash"; + reg = <0>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 1edc844..da5ca34 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -30,3 +30,14 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_DM_SPI=y +CONFIG_SUN4I_SPI=y +# CONFIG_ENV_IS_IN_FAT is not set +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index fcda023..d4a5fbd 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,9 +10,11 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o +else +obj-$(CONFIG_SPI_FLASH) += sf_probe.o endif
-obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o spi_flash_ids.o sf.o +obj-$(CONFIG_SPI_FLASH) += spi_flash.o spi_flash_ids.o sf.o obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 9b3944a..64fd3f9 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -165,6 +165,8 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #endif #define CONFIG_SYS_MMC_MAX_DEVICE 4 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_SECT_SIZE (128 << 10) #elif defined(CONFIG_ENV_IS_NOWHERE) #define CONFIG_ENV_SIZE (128 << 10) #endif
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are:
- Exposing spi0 alternative pins in the dts file
- Add alias node, enabling driver probing
- Add flash sub-node of spi
- Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
How did this resolved w/o sspi?
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
# Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps
# Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
=> md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53 .M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK
=> cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the same
Signed-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {
Was it sync from Linux?
I think as per binding docs
[label:] node-name[@unit-address] vendor: subsys-nane[@0] w25q128: spi-nor@0 {
#address-cells = <1>;#size-cells = <1>;compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";reg = <0>;spi-max-frequency = <20000000>;status = "okay";};+};
&uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>; diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 1edc844..da5ca34 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -30,3 +30,14 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_DM_SPI=y +CONFIG_SUN4I_SPI=y +# CONFIG_ENV_IS_IN_FAT is not set +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index fcda023..d4a5fbd 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,9 +10,11 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o +else +obj-$(CONFIG_SPI_FLASH) += sf_probe.o endif
This will break SPL build with sf_probe.c and even we can unnecessary build other SPI_FLASH files.
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are:
- Exposing spi0 alternative pins in the dts file
- Add alias node, enabling driver probing
- Add flash sub-node of spi
- Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI
U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
# Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps
# Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
=> md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53 .M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK
=> cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the same
Signed-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
I think as per binding docs
[label:] node-name[@unit-address] vendor: subsys-nane[@0] w25q128: spi-nor@0 {
#address-cells = <1>;#size-cells = <1>;compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";reg = <0>;spi-max-frequency = <20000000>;status = "okay";};+};
- &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>;
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 1edc844..da5ca34 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -30,3 +30,14 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_DM_SPI=y +CONFIG_SUN4I_SPI=y +# CONFIG_ENV_IS_IN_FAT is not set +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index fcda023..d4a5fbd 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,9 +10,11 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o +else +obj-$(CONFIG_SPI_FLASH) += sf_probe.o endif
This will break SPL build with sf_probe.c and even we can unnecessary build other SPI_FLASH files.
Yes, but if both DM and legacy drivers are enabled u-boot won't build. From what I can understand, sf-uclass is some kind of wrapper of sf_probe. Maybe sf_probe needs some rework, because it uses functions not available during spl build. Thats why I exclude it during spl, because after all this is test case, not actual patch.
Regards, Stefan Mavrodiev
On Wed, Feb 7, 2018 at 12:00 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are:
- Exposing spi0 alternative pins in the dts file
- Add alias node, enabling driver probing
- Add flash sub-node of spi
- Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI
U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
# Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps
# Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK
=> md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53 .M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK
=> cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the same
Signed-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
I think as per binding docs
[label:] node-name[@unit-address] vendor: subsys-nane[@0] w25q128: spi-nor@0 {
#address-cells = <1>;#size-cells = <1>;compatible = "winbond,w25q128", "jedec,spi-nor","spi-flash";
reg = <0>;spi-max-frequency = <20000000>;status = "okay";};+};
- &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>;
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 1edc844..da5ca34 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -30,3 +30,14 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_DM_SPI=y +CONFIG_SUN4I_SPI=y +# CONFIG_ENV_IS_IN_FAT is not set +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index fcda023..d4a5fbd 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,9 +10,11 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o +else +obj-$(CONFIG_SPI_FLASH) += sf_probe.o endif
This will break SPL build with sf_probe.c and even we can unnecessary build other SPI_FLASH files.
Yes, but if both DM and legacy drivers are enabled u-boot won't build. From what I can understand, sf-uclass is some kind of wrapper of sf_probe. Maybe sf_probe needs some rework, because it uses functions not available during spl build. Thats why I exclude it during spl, because after all this is test case, not actual patch.
That isn't true exactly, sunxi_spi_spl.c need drivers/mtd during SPL and If SPI_FLASH is built because if defined. Technically sunxi_spi_spl doesn't use either SPI or SPL_FLASH subsystem. So I've moved this into arch area, try this [1]
On 02/07/2018 08:39 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:00 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are: - Exposing spi0 alternative pins in the dts file - Add alias node, enabling driver probing - Add flash sub-node of spi - Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07+0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI
U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 +0200)Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with pagesize 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB,total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK # Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps # Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK => md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53.M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK => cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the sameSigned-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
I think as per binding docs
[label:] node-name[@unit-address] vendor: subsys-nane[@0] w25q128: spi-nor@0 {
#address-cells = <1>;#size-cells = <1>;compatible = "winbond,w25q128", "jedec,spi-nor","spi-flash";
reg = <0>;spi-max-frequency = <20000000>;status = "okay";};+};
- &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pins_a>;
diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig index 1edc844..da5ca34 100644 --- a/configs/A20-OLinuXino-Lime2_defconfig +++ b/configs/A20-OLinuXino-Lime2_defconfig @@ -30,3 +30,14 @@ CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y +CONFIG_CMD_SF=y +CONFIG_CMD_SF_TEST=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPL_SPI_SUNXI=y +CONFIG_DM_SPI=y +CONFIG_SUN4I_SPI=y +# CONFIG_ENV_IS_IN_FAT is not set +# CONFIG_ENV_IS_IN_MMC is not set +CONFIG_ENV_IS_IN_SPI_FLASH=y diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index fcda023..d4a5fbd 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -10,9 +10,11 @@ obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o ifdef CONFIG_SPL_BUILD obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o obj-$(CONFIG_SPL_SPI_SUNXI) += sunxi_spi_spl.o +else +obj-$(CONFIG_SPI_FLASH) += sf_probe.o endif
This will break SPL build with sf_probe.c and even we can unnecessary build other SPI_FLASH files.
Yes, but if both DM and legacy drivers are enabled u-boot won't build. From what I can understand, sf-uclass is some kind of wrapper of sf_probe. Maybe sf_probe needs some rework, because it uses functions not available during spl build. Thats why I exclude it during spl, because after all this is test case, not actual patch.
That isn't true exactly, sunxi_spi_spl.c need drivers/mtd during SPL and If SPI_FLASH is built because if defined. Technically sunxi_spi_spl doesn't use either SPI or SPL_FLASH subsystem. So I've moved this into arch area, try this [1]
I'll try it.
On Wed, Feb 7, 2018 at 12:35 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 08:39 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:00 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are: - Exposing spi0 alternative pins in the dts file - Add alias node, enabling driver probing - Add flash sub-node of spi - Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07+0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI
U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07+0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv withpage size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB,total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK # Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps # Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK => md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53.M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK => cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the sameSigned-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 ++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
On 02/07/2018 09:25 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:35 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 08:39 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:00 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Driver testing is done with A20-OLinuXino-Lime2. Testing requirements are: - Exposing spi0 alternative pins in the dts file - Add alias node, enabling driver probing - Add flash sub-node of spi - Enable spi flash related options in the defconfig file
The testing log is:
U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07+0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200)Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv with pagesize 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07+0200) Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv withpage size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot: 0
# Probe device => sf probe SF: Detected w25q128bv with page size 256 Bytes, erase size 4 KiB,total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
# Erase => sf erase 0x1000 0x100 SF: 256 bytes @ 0x1000 Erased: ERROR => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK # Test => sf test 0 100000 SPI flash test: 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps Test passed 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps # Try write/read => sf erase 0x1000 0x1000 SF: 4096 bytes @ 0x1000 Erased: OK => md.b 0x50000000 0x100 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53.M.h.Hi..x..3f.S 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc .S.y.3y......... 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb ...S..f......s.. 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf .K.......S.}.8o. 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb ...^.......v.... 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 .._............. 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 .n._.zb..f.m..G. 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db ................ 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 ......./........ 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee <../.^o../+.?... 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 o^..;Q...@N....w 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 ..}.TJh.}.S..... 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f s.<.........=... 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf .I.......z...z{. 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 ...?............ 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f ....!.Z.z}..1.?o
=> sf write 0x50000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Written: OK => sf read 0x51000000 0x1000 0x100 device 0 offset 0x1000, size 0x100 SF: 256 bytes @ 0x1000 Read: OK => cmp.b 0x50000000 0x51000000 0x100 Total of 256 byte(s) were the sameSigned-off-by: Stefan Mavrodiev stefan@olimex.com
arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30++++++++++++++++++++++++++++++ configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ drivers/mtd/spi/Makefile | 4 +++- include/configs/sunxi-common.h | 2 ++ 4 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts index d5c796c..a6ee87c 100644 --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts @@ -54,6 +54,7 @@
aliases { serial0 = &uart0;
spi0 = &spi0; }; chosen {@@ -215,6 +216,20 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; };
spi0_pins_b: spi0@1 {allwinner,pins = "PC0", "PC1", "PC2";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;};spi0_cs0_pins_b: spi0_cs0@1 {allwinner,pins = "PC23";allwinner,function = "spi0";allwinner,drive = <SUN4I_PINCTRL_10_MA>;allw inner,pull = <SUN4I_PINCTRL_NO_PULL>;};usb0_id_detect_pin: usb0_id_detect_pin@0 { allwinner,pins = "PH4"; allwinner,function = "gpio_in";@@ -257,6 +272,21 @@ status = "okay"; };
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
OK, I'll do this.
In the next revision, how to implement your patch [1]? As part of the series or mentioned somehow?
On Wed, Feb 7, 2018 at 2:54 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 09:25 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:35 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 08:39 AM, Jagan Teki wrote:
On Wed, Feb 7, 2018 at 12:00 PM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/06/2018 06:48 PM, Jagan Teki wrote:
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote: > > Driver testing is done with A20-OLinuXino-Lime2. Testing > requirements are: > - Exposing spi0 alternative pins in the dts file > - Add alias node, enabling driver probing > - Add flash sub-node of spi > - Enable spi flash related options in the defconfig file > > The testing log is: > > U-Boot SPL 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - > 14:40:07 > +0200) > DRAM: 1024 MiB > CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 > Trying to boot from FEL
Why FEL? can't it boot from SPI-FLASH?
Because I previously erased the flash during testing. Here is same, booting from SPI:
U-Boot SPL 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07+0200) DRAM: 1024 MiB CPU: 912000000Hz, AXI/AHB/APB: 3/2/2 Trying to boot from sunxi SPI
U-Boot 2018.03-rc1-00075-g61ce225 (Feb 07 2018 - 08:21:07 +0200)Allwinner Technology
CPU: Allwinner A20 (SUN7I) Model: Olimex A20-OLinuXino-LIME2 I2C: ready DRAM: 1 GiB MMC: SUNXI SD/MMC: 0 Loading Environment from SPI Flash... SF: Detected w25q128bv withpage size 256 Bytes, erase size 4 KiB, total 16 MiB OK In: serial Out: serial Err: serial Allwinner mUSB OTG (Peripheral) SCSI: SATA link 0 timeout. AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode flags: ncq stag pm led clo only pmp pio slum part ccc apst Net: No ethernet found. starting USB... USB0: USB EHCI 1.00 USB1: USB OHCI 1.0 USB2: USB EHCI 1.00 USB3: USB OHCI 1.0 scanning bus 0 for devices... 1 USB Device(s) found scanning bus 2 for devices... 1 USB Device(s) found scanning usb for storage devices... 0 Storage Device(s) found Hit any key to stop autoboot:
> U-Boot 2018.03-rc1-00075-g35a689a-dirty (Feb 06 2018 - 14:40:07 > +0200) > Allwinner Technology > > CPU: Allwinner A20 (SUN7I) > Model: Olimex A20-OLinuXino-LIME2 > I2C: ready > DRAM: 1 GiB > MMC: SUNXI SD/MMC: 0 > Loading Environment from SPI Flash... SF: Detected w25q128bv > with > page > size 256 Bytes, erase size 4 KiB, total 16 MiB > OK > In: serial > Out: serial > Err: serial > Allwinner mUSB OTG (Peripheral) > SCSI: SATA link 0 timeout. > AHCI 0001.0100 32 slots 1 ports 3 Gbps 0x1 impl SATA mode > flags: ncq stag pm led clo only pmp pio slum part ccc apst > Net: No ethernet found. > starting USB... > USB0: USB EHCI 1.00 > USB1: USB OHCI 1.0 > USB2: USB EHCI 1.00 > USB3: USB OHCI 1.0 > scanning bus 0 for devices... 1 USB Device(s) found > scanning bus 2 for devices... 1 USB Device(s) found > scanning usb for storage devices... 0 Storage Device(s) > found > Hit any key to stop autoboot: 0 > > # Probe device > => sf probe > SF: Detected w25q128bv with page size 256 Bytes, erase size 4 > KiB, > total 16 MiB
How did this resolved w/o sspi?
I enabled both CONFIG_SPI_FLASH and CONFIG_DM_SPI_FLASH. The driver-model search for "spi-flash" compatible string, probe it and bind it to the spi driver.
> # Erase > => sf erase 0x1000 0x100 > SF: 256 bytes @ 0x1000 Erased: ERROR > => sf erase 0x1000 0x1000 > SF: 4096 bytes @ 0x1000 Erased: OK > > # Test > => sf test 0 100000 > SPI flash test: > 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps > 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps > 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps > 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps > Test passed > 0 erase: 12104 ticks, 84 KiB/s 0.672 Mbps > 1 check: 8881 ticks, 115 KiB/s 0.920 Mbps > 2 write: 10824 ticks, 94 KiB/s 0.752 Mbps > 3 read: 8872 ticks, 115 KiB/s 0.920 Mbps > > # Try write/read > => sf erase 0x1000 0x1000 > SF: 4096 bytes @ 0x1000 Erased: OK > > => md.b 0x50000000 0x100 > 50000000: a9 4d b7 68 d2 48 69 c3 09 78 fa d3 33 66 e9 53 > .M.h.Hi..x..3f.S > 50000010: b0 53 af 79 ad 33 79 b1 f1 e3 1d 09 2e ba dd dc > .S.y.3y......... > 50000020: 8c eb eb 53 f4 ef 66 89 b5 e9 f6 fb af 73 7f cb > ...S..f......s.. > 50000030: b6 4b bf de c3 fd de bb 9a 53 ad 7d ef 38 6f bf > .K.......S.}.8o. > 50000040: fd fb e7 5e e9 db fc 0c fc f7 be 76 ad b9 fd eb > ...^.......v.... > 50000050: f3 ed 5f b5 bb bd ba 8f ff df 1f bf f3 ff fb d7 > .._............. > 50000060: b7 6e 9e 5f af 7a 62 ed 7f 66 1b 6d fd fb 47 f7 > .n._.zb..f.m..G. > 50000070: b7 fa f4 db d5 b6 d5 ff 81 e6 f5 d9 8f ef ff db > ................ > 50000080: b7 dd bd fb f3 1d 9d 2f f6 db c8 7f fb cf b9 f3 > ......./........ > 50000090: 3c ee da 2f b7 5e 6f bc f1 2f 2b cf 3f f2 fb ee > <../.^o../+.?... > 500000a0: 6f 5e 99 c3 3b 51 bd d4 be 40 4e db ab ed f9 77 > o^..;Q...@N....w > 500000b0: 9f f6 7d ed 54 4a 68 f8 7d ee 53 9b ff ae ef e4 > ..}.TJh.}.S..... > 500000c0: 73 ff 3c c7 f7 df f6 be bf 0f 97 96 3d 9b 9e 9f > s.<.........=... > 500000d0: e4 49 ca ff be fa ff df f7 7a cf ab 7f 7a 7b cf > .I.......z...z{. > 500000e0: bb c7 9f 3f c1 99 f2 f2 bf ee cf fb d5 b9 e2 e8 > ...?............ > 500000f0: ec e8 b2 bd 21 1f 5a ef 7a 7d 9d ad 31 89 3f 6f > ....!.Z.z}..1.?o > > => sf write 0x50000000 0x1000 0x100 > device 0 offset 0x1000, size 0x100 > SF: 256 bytes @ 0x1000 Written: OK > => sf read 0x51000000 0x1000 0x100 > device 0 offset 0x1000, size 0x100 > SF: 256 bytes @ 0x1000 Read: OK > > => cmp.b 0x50000000 0x51000000 0x100 > Total of 256 byte(s) were the same > > Signed-off-by: Stefan Mavrodiev stefan@olimex.com > --- > arch/arm/dts/sun7i-a20-olinuxino-lime2.dts | 30 > ++++++++++++++++++++++++++++++ > configs/A20-OLinuXino-Lime2_defconfig | 11 +++++++++++ > drivers/mtd/spi/Makefile | 4 +++- > include/configs/sunxi-common.h | 2 ++ > 4 files changed, 46 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts > b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts > index d5c796c..a6ee87c 100644 > --- a/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts > +++ b/arch/arm/dts/sun7i-a20-olinuxino-lime2.dts > @@ -54,6 +54,7 @@ > > aliases { > serial0 = &uart0; > + spi0 = &spi0; > }; > > chosen { > @@ -215,6 +216,20 @@ > allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > }; > > + spi0_pins_b: spi0@1 { > + allwinner,pins = "PC0", "PC1", "PC2"; > + allwinner,function = "spi0"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > + spi0_cs0_pins_b: spi0_cs0@1 { > + allwinner,pins = "PC23"; > + allwinner,function = "spi0"; > + allwinner,drive = <SUN4I_PINCTRL_10_MA>; > + allw inner,pull = <SUN4I_PINCTRL_NO_PULL>; > + }; > + > usb0_id_detect_pin: usb0_id_detect_pin@0 { > allwinner,pins = "PH4"; > allwinner,function = "gpio_in"; > @@ -257,6 +272,21 @@ > status = "okay"; > }; > > +&spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; > + status = "okay"; > + > + flash: w25q128@0 {
Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
OK, I'll do this.
In the next revision, how to implement your patch [1]? As part of the series or mentioned somehow?
Add your patches on top of this.
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
+&spi0 {
pinctrl-names = "default";pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>;status = "okay";flash: w25q128@0 {Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Maxime
On 02/07/2018 07:19 PM, Maxime Ripard wrote:
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
> +&spi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; > + status = "okay"; > + > + flash: w25q128@0 { Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Maxime
Sorry, but I'm really confused. In the first patch Jagan said to make separate patch "just to test" the driver. Then I've made patch "just to test", and it's turn out it wasn't not OK, because it should be compatible with linux, u-boot and etc. What's the point since it's just for testing...?
Sorry again, but can someone explain to me, that to do? I'm not trying to pick on you guys. Just want to do the right thing.
Best regards, Stefan Mavrodiev
On Thu, Feb 8, 2018 at 11:54 AM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 07:19 PM, Maxime Ripard wrote:
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
>> >> +&spi0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; >> + status = "okay"; >> + >> + flash: w25q128@0 { > > Was it sync from Linux?
No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Maxime
Sorry, but I'm really confused. In the first patch Jagan said to make separate patch "just to test" the driver. Then I've made patch "just to test", and it's turn out it wasn't not OK, because it should be compatible with linux, u-boot and etc. What's the point since it's just for testing...?
Sorry again, but can someone explain to me, that to do? I'm not trying to pick on you guys. Just want to do the right thing.
I think we're in out-of-sync for some reason.
Here is my suggestion: Since it is "optional feature however similar boards of this type could not have it"?
How about separate defconfig file? A20-OLinuXino-Lime2-spinor_defconfig and have same dts file with
/* Disable SPI NOR by default: it optional on A20-OLinuXino-Lime2 boards */ status = "disabled";
But the dts should accept by Linux as well.
On 02/08/2018 09:03 AM, Jagan Teki wrote:
On Thu, Feb 8, 2018 at 11:54 AM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 07:19 PM, Maxime Ripard wrote:
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
>>> +&spi0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; >>> + status = "okay"; >>> + >>> + flash: w25q128@0 { >> Was it sync from Linux? > No, this isn't in the linux dts. But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Maxime
Sorry, but I'm really confused. In the first patch Jagan said to make separate patch "just to test" the driver. Then I've made patch "just to test", and it's turn out it wasn't not OK, because it should be compatible with linux, u-boot and etc. What's the point since it's just for testing...?
Sorry again, but can someone explain to me, that to do? I'm not trying to pick on you guys. Just want to do the right thing.
I think we're in out-of-sync for some reason.
Here is my suggestion: Since it is "optional feature however similar boards of this type could not have it"?
How about separate defconfig file? A20-OLinuXino-Lime2-spinor_defconfig and have same dts file with
/* Disable SPI NOR by default: it optional on A20-OLinuXino-Lime2 boards */ status = "disabled";
But the dts should accept by Linux as well.
Already tried this [1] and got rejected.
On Thu, Feb 08, 2018 at 12:33:37PM +0530, Jagan Teki wrote:
On Thu, Feb 8, 2018 at 11:54 AM, Stefan Mavrodiev stefan.mavrodiev@gmail.com wrote:
On 02/07/2018 07:19 PM, Maxime Ripard wrote:
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
>>> >>> +&spi0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; >>> + status = "okay"; >>> + >>> + flash: w25q128@0 { >> >> Was it sync from Linux? > > No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Sorry, but I'm really confused. In the first patch Jagan said to make separate patch "just to test" the driver. Then I've made patch "just to test", and it's turn out it wasn't not OK, because it should be compatible with linux, u-boot and etc. What's the point since it's just for testing...?
Sorry again, but can someone explain to me, that to do? I'm not trying to pick on you guys. Just want to do the right thing.
I think we're in out-of-sync for some reason.
Here is my suggestion: Since it is "optional feature however similar boards of this type could not have it"?
How about separate defconfig file? A20-OLinuXino-Lime2-spinor_defconfig and have same dts file with
/* Disable SPI NOR by default: it optional on A20-OLinuXino-Lime2 boards */ status = "disabled";
But the dts should accept by Linux as well.
We won't merge it in Linux. And I still don't really get why you want it to be enabled by default in U-Boot either. That patch has been introduced by Stefan as a patch not intended to be merged but just showing how his driver was useful.
Can't we just merge the SPI driver and be done with it?
Maxime
Hi,
On Thu, Feb 08, 2018 at 08:24:37AM +0200, Stefan Mavrodiev wrote:
On 02/07/2018 07:19 PM, Maxime Ripard wrote:
On Wed, Feb 07, 2018 at 12:55:54PM +0530, Jagan Teki wrote:
> > +&spi0 { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&spi0_pins_b>, <&spi0_cs0_pins_b>; > > + status = "okay"; > > + > > + flash: w25q128@0 { > Was it sync from Linux? No, this isn't in the linux dts.
But we have to, please send it to Linux first.
We've already commented this issue. In the v2 [1], I've explained that this won't go mainline, since it's optional feature. Rather it will be managed with overlays.
Thought this was already in ML, and ready to merge. So this never go to Linux tree since it's optional? then add u-boot.dtsi for this atleast since we always sync dts from Linux.
This is an optional feature on that board. We should be making it as easy as possible to enable it, but a defconfig is a *default* configuration, and if the board doesn't have it by default, it shouldn't be enabled in the defconfig.
Sorry, but I'm really confused. In the first patch Jagan said to make separate patch "just to test" the driver. Then I've made patch "just to test", and it's turn out it wasn't not OK, because it should be compatible with linux, u-boot and etc. What's the point since it's just for testing...?
Sorry if we're not on the same page, that patch definitely looks good as a demonstration on how it could be used. Thanks for doing it, it makes things clearer :)
Sorry again, but can someone explain to me, that to do? I'm not trying to pick on you guys. Just want to do the right thing.
I guess we need to sync with Jagan on this.
Let's do it in the rest of the discussion.
Maxime
On Tue, Feb 6, 2018 at 6:44 PM, Stefan Mavrodiev stefan@olimex.com wrote:
Add spi driver for sun4i, sun5i and sun7i SoCs. The driver is adapted from mailine kernel.
Signed-off-by: Stefan Mavrodiev stefan@olimex.com
Applied to u-boot-spi/master
participants (4)
-
Jagan Teki -
Maxime Ripard -
Stefan Mavrodiev -
Stefan Mavrodiev