[U-Boot] [PATCH] rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de --- drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 552a71a..a028b8b 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; }
+static int rk3288_clk_enable(struct clk *clk) +{ + switch (clk->id) { + case HCLK_USBHOST0: + case HCLK_HSIC: + return 0; + } + + debug("%s: unsupported clk %ld\n", __func__, clk->id); + return -ENOENT; +} + static struct clk_ops rk3288_clk_ops = { .get_rate = rk3288_clk_get_rate, .set_rate = rk3288_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3288_clk_set_parent, #endif + .enable = rk3288_clk_enable, };
static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
Hi Wadim,
On 03/19/2018 11:39 PM, Wadim Egorov wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
Does ehci driver update this feature recently? I think the driver works for me before without clk_enable().
BTW, I don't think we add this kind of no use call back in clock driver is an good idea.
Thanks, - Kever
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 552a71a..a028b8b 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; }
+static int rk3288_clk_enable(struct clk *clk) +{
- switch (clk->id) {
- case HCLK_USBHOST0:
- case HCLK_HSIC:
return 0;- }
- debug("%s: unsupported clk %ld\n", __func__, clk->id);
- return -ENOENT;
+}
static struct clk_ops rk3288_clk_ops = { .get_rate = rk3288_clk_get_rate, .set_rate = rk3288_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3288_clk_set_parent, #endif
- .enable = rk3288_clk_enable,
};
static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
Kever,
Am 20.03.2018 um 15:46 schrieb Kever Yang:
Hi Wadim,
On 03/19/2018 11:39 PM, Wadim Egorov wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
Does ehci driver update this feature recently? I think the driver works for me before without clk_enable().
are you sure it worked for you on a rk3288 and not rk3399?
There is a similar patch for 3399, commit 2f01a2b2149c rockchip: clk: rk3399: add clk_enable function and support USB HOST0/1
Regards, Wadim
BTW, I don't think we add this kind of no use call back in clock driver is an good idea.
Thanks,
- Kever
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index 552a71a..a028b8b 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -893,12 +893,25 @@ static int __maybe_unused rk3288_clk_set_parent(struct clk *clk, struct clk *par return -ENOENT; }
+static int rk3288_clk_enable(struct clk *clk) +{
- switch (clk->id) {
- case HCLK_USBHOST0:
- case HCLK_HSIC:
return 0;- }
- debug("%s: unsupported clk %ld\n", __func__, clk->id);
- return -ENOENT;
+}
static struct clk_ops rk3288_clk_ops = { .get_rate = rk3288_clk_get_rate, .set_rate = rk3288_clk_set_rate, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) .set_parent = rk3288_clk_set_parent, #endif
- .enable = rk3288_clk_enable,
};
static int rk3288_clk_ofdata_to_platdata(struct udevice *dev)
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
This change broke Ethernet on tinker-rk3288.
U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: failed to enable clock 0 No ethernet found.
After reverting it:
U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: eth0: ethernet@ff290000 Hit any key to stop autoboot: 0
If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it would work given the changes that were made last time this broke.
commit 1693a577be14a92e61563bad306aa11a359757f5 Author: Eugeniy Paltsev Eugeniy.Paltsev@synopsys.com Date: Tue Feb 6 17:12:09 2018 +0300
NET: designware: fix clock enable
Looks like the designware GMAC driver is trying to enable a clock and can’t deal with the -ENOENT. Could you try to see which clock it is requesting and add the necessary entries in the clock-enable function?
If you have a patch, I’ll try to prioritise it, so we get these regressions cleaned up quickly (note that these had all been in rc3—if we’d known earlier, I could have reverted them out for the release).
@Wadim: could you please also look into this, as your board should have similar problems (unless your device-tree is very different).
Thanks, Philipp.
On 8 May 2018, at 09:51, Jonathan Gray jsg@jsg.id.au wrote:
On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
This change broke Ethernet on tinker-rk3288.
U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: failed to enable clock 0 No ethernet found.
After reverting it:
U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: eth0: ethernet@ff290000 Hit any key to stop autoboot: 0
If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it would work given the changes that were made last time this broke.
commit 1693a577be14a92e61563bad306aa11a359757f5 Author: Eugeniy Paltsev Eugeniy.Paltsev@synopsys.com Date: Tue Feb 6 17:12:09 2018 +0300
NET: designware: fix clock enable
Hi,
Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
Looks like the designware GMAC driver is trying to enable a clock and can’t deal with the -ENOENT. Could you try to see which clock it is requesting and add the necessary entries in the clock-enable function?
If you have a patch, I’ll try to prioritise it, so we get these regressions cleaned up quickly (note that these had all been in rc3—if we’d known earlier, I could have reverted them out for the release).
@Wadim: could you please also look into this, as your board should have similar problems (unless your device-tree is very different).
unfortunately I am not able to test ethernet on our board right now, because there are a few things missing in the designware/gmac part. But someone is working on it right now :)
Anyway, it looks like Jonathan fixed the problem, right?
Regards, Wadim
Thanks, Philipp.
On 8 May 2018, at 09:51, Jonathan Gray jsg@jsg.id.au wrote:
On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
This change broke Ethernet on tinker-rk3288.
U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: failed to enable clock 0 No ethernet found.
After reverting it:
U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: eth0: ethernet@ff290000 Hit any key to stop autoboot: 0
If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it would work given the changes that were made last time this broke.
commit 1693a577be14a92e61563bad306aa11a359757f5 Author: Eugeniy Paltsev Eugeniy.Paltsev@synopsys.com Date: Tue Feb 6 17:12:09 2018 +0300
NET: designware: fix clock enable
On Mon, May 14, 2018 at 11:28:38AM +0200, Wadim Egorov wrote:
Hi,
Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
Looks like the designware GMAC driver is trying to enable a clock and can???t deal with the -ENOENT. Could you try to see which clock it is requesting and add the necessary entries in the clock-enable function?
If you have a patch, I???ll try to prioritise it, so we get these regressions cleaned up quickly (note that these had all been in rc3???if we???d known earlier, I could have reverted them out for the release).
@Wadim: could you please also look into this, as your board should have similar problems (unless your device-tree is very different).
unfortunately I am not able to test ethernet on our board right now, because there are a few things missing in the designware/gmac part. But someone is working on it right now :)
Anyway, it looks like Jonathan fixed the problem, right?
Regards, Wadim
The patch I sent out works for me. Hasn't landed in u-boot-rockchip or master yet though.
Thanks, Philipp.
On 8 May 2018, at 09:51, Jonathan Gray jsg@jsg.id.au wrote:
On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
This change broke Ethernet on tinker-rk3288.
U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: failed to enable clock 0 No ethernet found.
After reverting it:
U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: eth0: ethernet@ff290000 Hit any key to stop autoboot: 0
If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it would work given the changes that were made last time this broke.
commit 1693a577be14a92e61563bad306aa11a359757f5 Author: Eugeniy Paltsev Eugeniy.Paltsev@synopsys.com Date: Tue Feb 6 17:12:09 2018 +0300
NET: designware: fix clock enable
U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
On 14 May 2018, at 12:42, Jonathan Gray jsg@jsg.id.au wrote:
On Mon, May 14, 2018 at 11:28:38AM +0200, Wadim Egorov wrote:
Hi,
Am 08.05.2018 um 10:05 schrieb Dr. Philipp Tomsich:
Looks like the designware GMAC driver is trying to enable a clock and can???t deal with the -ENOENT. Could you try to see which clock it is requesting and add the necessary entries in the clock-enable function?
If you have a patch, I???ll try to prioritise it, so we get these regressions cleaned up quickly (note that these had all been in rc3???if we???d known earlier, I could have reverted them out for the release).
@Wadim: could you please also look into this, as your board should have similar problems (unless your device-tree is very different).
unfortunately I am not able to test ethernet on our board right now, because there are a few things missing in the designware/gmac part. But someone is working on it right now :)
Anyway, it looks like Jonathan fixed the problem, right?
Regards, Wadim
The patch I sent out works for me. Hasn't landed in u-boot-rockchip or master yet though.
I had been waiting for Wadim to also take a look. I’ll take his remark as a “can’t test” and will move it along.
I plan to request a pull into master, once we have all these regression fixes collected (I hope this is the last one).
Thanks, Philipp.
On 8 May 2018, at 09:51, Jonathan Gray jsg@jsg.id.au wrote:
On Thu, Apr 26, 2018 at 09:05:33AM +0200, Philipp Tomsich wrote:
The generic ehci-driver (ehci-generic.c) will try to enable the clocks listed in the DTSI. If this fails (e.g. due to clk_enable not being implemented in a driver and -ENOSYS being returned by the clk-uclass), the driver will bail our and print an error message.
This implements a minimal clk_enable for the RK3288 and supports the clocks mandatory for the EHCI controllers; as these are enabled by default we simply return success.
Signed-off-by: Wadim Egorov w.egorov@phytec.de Acked-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com Reviewed-by: Philipp Tomsich philipp.tomsich@theobroma-systems.com
drivers/clk/rockchip/clk_rk3288.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Applied to u-boot-rockchip, thanks!
This change broke Ethernet on tinker-rk3288.
U-Boot 2018.05-00002-g6ea9f3dd70 (May 08 2018 - 17:21:32 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: failed to enable clock 0 No ethernet found.
After reverting it:
U-Boot 2018.05-00003-g338bfe2fbf (May 08 2018 - 17:40:09 +1000)
Model: Tinker-RK3288 DRAM: 2 GiB MMC: dwmmc@ff0c0000: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment
Failed (-5) In: serial Out: serial Err: serial Model: Tinker-RK3288 Net: eth0: ethernet@ff290000 Hit any key to stop autoboot: 0
If the default case returned ENOSYS or ENOTSUPP instead of ENOENT it would work given the changes that were made last time this broke.
commit 1693a577be14a92e61563bad306aa11a359757f5 Author: Eugeniy Paltsev Eugeniy.Paltsev@synopsys.com Date: Tue Feb 6 17:12:09 2018 +0300
NET: designware: fix clock enable
U-Boot mailing list U-Boot@lists.denx.de mailto:U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot https://lists.denx.de/listinfo/u-boot
participants (5)
-
Dr. Philipp Tomsich -
Jonathan Gray -
Kever Yang -
Philipp Tomsich
-
Wadim Egorov