[U-Boot-Users] TEXT_BASE question
Hi all,
I see that many boards use, and that TEXT_BASE is often defined in config.mk . In my 85xx case, I have:
TEXT_BASE = 0xfff80000
However, some of my registers are using TEXT_BASE + DATA that don't seem right. In the bdi I get:
ATUM>rd ivor15 ivor15 : 0x00000f00 3840
That seems out of range of my 4K stack before relocation, could that be a problem or am I simply reading this wrong?
Thanks, Robert
From: robert lazarski
ATUM>rd ivor15 ivor15 : 0x00000f00 3840
That seems out of range of my 4K stack before relocation, could that be a problem or am I simply reading this wrong?
Check ivpr, they work together.
It is only used for the debugger - so it only has to point to a fetchable memory location so the cpu can halt under debugger control.
-ELS
On 9/27/07, Swarthout Edward L-SWARTHOU ed.swarthout@freescale.com wrote:
From: robert lazarski
ATUM>rd ivor15 ivor15 : 0x00000f00 3840
That seems out of range of my 4K stack before relocation, could that be a problem or am I simply reading this wrong?
Check ivpr, they work together.
It is only used for the debugger - so it only has to point to a fetchable memory location so the cpu can halt under debugger control.
-ELS
Indeed, one of my problems is that the bdi is giving me a 'core is stopped' while debugging - a clear indication of a problem reading ivor15. My understanding is that on 85xx, special 63 is ivpr and ivor15 is 415. When I set a breakpoint early in the u-boot code, yet after those registers have been initialized and before my TLB's crash, I get:
ATUM>rdspr 415 SPR 415 : 0x00000f00 3840 ATUM>rdspr 63 SPR 63 : 0xfff80000 - 524288
0xfff80000 + f00 == 0xfff80f00 . In the bdi config I have tried:
WSPR 63 0xfff80000 WSPR 415 0x00000f00
Yet I still get 'core is stopped' while debugging. I may be lacking a L2 entry of some sort. L2CAM shows:
ATUM>l2cam 0 0xf IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS 0 : 00 fffff000 4KB V 0 -> 0_fffff000 0000 -I--- ---RWX 1 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 2 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 3 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 4 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 5 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 6 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 7 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 8 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 9 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 10 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 11 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 12 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 13 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 14 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------ 15 : 00 00000000 1KB - 0 -> 0_00000000 0000 ----- ------
If I get debugging working it may be a critical piece in finding my problems. Any ideas on what is preventing me from debugging? Thanks! Robert
participants (2)
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robert lazarski -
Swarthout Edward L-SWARTHOU