The below issues are fixed 1)Fix the read issue for 4byte address width as read_len is getting zero. 2)Fix the spi_nor_erase function by passing the correct offset when it is configured as dual parallel. 3)Update the write_bar() only if the address width is 3byte for spi_nor_erase() function.

ZynqMP> sf read 0x4000000 0 100000 device 0 offset 0x0, size 0x100000 SF: 1048576 bytes @ 0x0 Read: ERROR -5

Fixes: 5d40b3d384 ("mtd: spi-nor: Add parallel and stacked memories support") Signed-off-by: Venkatesh Yadav Abbarapu venkatesh.abbarapu@amd.com --- drivers/mtd/spi/spi-nor-core.c | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index f5c9868bbc..2034d84251 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -1141,11 +1141,14 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) nor->spi->flags &= ~SPI_XFER_U_PAGE; } } + if (nor->addr_width == 3) { #ifdef CONFIG_SPI_FLASH_BAR - ret = write_bar(nor, addr); - if (ret < 0) - goto erase_err; + ret = write_bar(nor, offset); + if (ret < 0) + goto erase_err; #endif + } + ret = write_enable(nor); if (ret < 0) goto erase_err; @@ -1154,7 +1157,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { ret = spi_nor_erase_chip(nor); } else { - ret = spi_nor_erase_sector(nor, addr); + ret = spi_nor_erase_sector(nor, offset); } if (ret < 0) goto erase_err; @@ -1582,6 +1585,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, loff_t offset = from; u32 read_len = 0; u32 rem_bank_len = 0; + u32 stack_shift = 0; u8 bank; bool is_ofst_odd = false;

@@ -1608,6 +1612,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, offset = from;

if (nor->flags & SNOR_F_HAS_STACKED) { + stack_shift = 1; if (offset >= (mtd->size / 2)) { offset = offset - (mtd->size / 2); nor->spi->flags |= SPI_XFER_U_PAGE; @@ -1616,6 +1621,10 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, } }

+ if (nor->addr_width == 4) + rem_bank_len = (mtd->size >> stack_shift) - + offset; + if (nor->flags & SNOR_F_HAS_PARALLEL) offset /= 2;