Add pwm control registers fields defines into imx-regs.h:

- prescaler - dozeen - waiten - dbgen - clksrc_ipg_high - clksrc_ipg, en field

References: - iMX8MMRM.pdf p 3884

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 8 ++++++++ 1 file changed, 8 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 11389a0f4d..57a95de1b8 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -351,6 +351,14 @@ struct src { u32 ddr2_rcr; };

+#define PWMCR_PRESCALER(x) (((x - 1) & 0xFFF) << 4) +#define PWMCR_DOZEEN (1 << 24) +#define PWMCR_WAITEN (1 << 23) +#define PWMCR_DBGEN (1 << 22) +#define PWMCR_CLKSRC_IPG_HIGH (2 << 16) +#define PWMCR_CLKSRC_IPG (1 << 16) +#define PWMCR_EN (1 << 0) + #define WDOG_WDT_MASK BIT(3) #define WDOG_WDZST_MASK BIT(0) struct wdog_regs {

Add pwm_regs struct for i.MX8MM SOC

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- arch/arm/include/asm/arch-imx8m/imx-regs.h | 9 +++++++++ 1 file changed, 9 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h index 57a95de1b8..f31f54ad0c 100644 --- a/arch/arm/include/asm/arch-imx8m/imx-regs.h +++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h @@ -359,6 +359,15 @@ struct src { #define PWMCR_CLKSRC_IPG (1 << 16) #define PWMCR_EN (1 << 0)

+struct pwm_regs { + u32 cr; + u32 sr; + u32 ir; + u32 sar; + u32 pr; + u32 cnr; +}; + #define WDOG_WDT_MASK BIT(3) #define WDOG_WDZST_MASK BIT(0) struct wdog_regs {

Add clocks support for the PWM controllers. This is ported from Linux v5.17-rc8.

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- drivers/clk/imx/clk-imx8mm.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+)

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 3aa8c641f9..964a778934 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -116,6 +116,18 @@ static const char *imx8mm_i2c3_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_ static const char *imx8mm_i2c4_sels[] = {"clock-osc-24m", "sys_pll1_160m", "sys_pll2_50m", "sys_pll3_out", "audio_pll1_out", "video_pll1_out", "audio_pll2_out", "sys_pll1_133m", };

+static const char *imx8mm_pwm1_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", + "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; + +static const char *imx8mm_pwm2_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", + "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", }; + +static const char *imx8mm_pwm3_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", + "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; + +static const char *imx8mm_pwm4_sels[] = {"clock-osc-24m", "sys_pll2_100m", "sys_pll1_160m", "sys_pll1_40m", + "sys_pll3_out", "clk_ext2", "sys_pll1_80m", "video_pll1_out", }; + static const char *imx8mm_wdog_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_160m", "vpu_pll_out", "sys_pll2_125m", "sys_pll3_out", "sys_pll1_80m", "sys_pll2_166m", };

@@ -391,6 +403,14 @@ static int imx8mm_clk_probe(struct udevice *dev) imx8m_clk_composite("i2c3", imx8mm_i2c3_sels, base + 0xae00)); clk_dm(IMX8MM_CLK_I2C4, imx8m_clk_composite("i2c4", imx8mm_i2c4_sels, base + 0xae80)); + clk_dm(IMX8MM_CLK_PWM1, + imx8m_clk_composite("pwm1", imx8mm_pwm1_sels, base + 0xb380)); + clk_dm(IMX8MM_CLK_PWM2, + imx8m_clk_composite("pwm2", imx8mm_pwm2_sels, base + 0xb400)); + clk_dm(IMX8MM_CLK_PWM3, + imx8m_clk_composite("pwm3", imx8mm_pwm3_sels, base + 0xb480)); + clk_dm(IMX8MM_CLK_PWM4, + imx8m_clk_composite("pwm4", imx8mm_pwm4_sels, base + 0xb500)); clk_dm(IMX8MM_CLK_WDOG, imx8m_clk_composite("wdog", imx8mm_wdog_sels, base + 0xb900)); clk_dm(IMX8MM_CLK_USDHC3, @@ -425,6 +445,14 @@ static int imx8mm_clk_probe(struct udevice *dev) imx_clk_gate4("i2c4_root_clk", "i2c4", base + 0x41a0, 0)); clk_dm(IMX8MM_CLK_OCOTP_ROOT, imx_clk_gate4("ocotp_root_clk", "ipg_root", base + 0x4220, 0)); + clk_dm(IMX8MM_CLK_PWM1_ROOT, + imx_clk_gate4("pwm1_root_clk", "pwm1", base + 0x4280, 0)); + clk_dm(IMX8MM_CLK_PWM2_ROOT, + imx_clk_gate4("pwm2_root_clk", "pwm2", base + 0x4290, 0)); + clk_dm(IMX8MM_CLK_PWM3_ROOT, + imx_clk_gate4("pwm3_root_clk", "pwm3", base + 0x42a0, 0)); + clk_dm(IMX8MM_CLK_PWM4_ROOT, + imx_clk_gate4("pwm4_root_clk", "pwm4", base + 0x42b0, 0)); clk_dm(IMX8MM_CLK_USDHC1_ROOT, imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0)); clk_dm(IMX8MM_CLK_USDHC2_ROOT,

Move pwm_imx_get_parms, pwm_id_to_reg functions into pwm-imx.c and drop off pwm-imx-util.c

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- drivers/pwm/Makefile | 2 +- drivers/pwm/pwm-imx-util.c | 80 -------------------------------------- drivers/pwm/pwm-imx-util.h | 15 ------- drivers/pwm/pwm-imx.c | 67 ++++++++++++++++++++++++++++++- 4 files changed, 67 insertions(+), 97 deletions(-) delete mode 100644 drivers/pwm/pwm-imx-util.c delete mode 100644 drivers/pwm/pwm-imx-util.h

diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile index 55f2bc081d..5d696ec49c 100644 --- a/drivers/pwm/Makefile +++ b/drivers/pwm/Makefile @@ -13,7 +13,7 @@ obj-$(CONFIG_DM_PWM) += pwm-uclass.o obj-$(CONFIG_PWM_AT91) += pwm-at91.o obj-$(CONFIG_PWM_CROS_EC) += cros_ec_pwm.o obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o -obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o +obj-$(CONFIG_PWM_IMX) += pwm-imx.o obj-$(CONFIG_PWM_MESON) += pwm-meson.o obj-$(CONFIG_PWM_MTK) += pwm-mtk.o obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c deleted file mode 100644 index 823a9d2d6b..0000000000 --- a/drivers/pwm/pwm-imx-util.c +++ /dev/null @@ -1,80 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * (C) Copyright 2014 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Basic support for the pwm module on imx6. - * - * Based on linux:drivers/pwm/pwm-imx.c - * from - * Sascha Hauer s.hauer@pengutronix.de - */ - -#include <common.h> -#include <div64.h> -#include <asm/arch/imx-regs.h> - -/* pwm_id from 0..7 */ -struct pwm_regs *pwm_id_to_reg(int pwm_id) -{ - switch (pwm_id) { - case 0: - return (struct pwm_regs *)PWM1_BASE_ADDR; - case 1: - return (struct pwm_regs *)PWM2_BASE_ADDR; -#ifdef CONFIG_MX6 - case 2: - return (struct pwm_regs *)PWM3_BASE_ADDR; - case 3: - return (struct pwm_regs *)PWM4_BASE_ADDR; -#endif -#ifdef CONFIG_MX6SX - case 4: - return (struct pwm_regs *)PWM5_BASE_ADDR; - case 5: - return (struct pwm_regs *)PWM6_BASE_ADDR; - case 6: - return (struct pwm_regs *)PWM7_BASE_ADDR; - case 7: - return (struct pwm_regs *)PWM8_BASE_ADDR; -#endif - default: - printf("unknown pwm_id: %d\n", pwm_id); - break; - } - return NULL; -} - -int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, - unsigned long *duty_c, unsigned long *prescale) -{ - unsigned long long c; - - /* - * we have not yet a clock framework for imx6, so add the clock - * value here as a define. Replace it when we have the clock - * framework. - */ - c = CONFIG_IMX6_PWM_PER_CLK; - c = c * period_ns; - do_div(c, 1000000000); - *period_c = c; - - *prescale = *period_c / 0x10000 + 1; - - *period_c /= *prescale; - c = *period_c * (unsigned long long)duty_ns; - do_div(c, period_ns); - *duty_c = c; - - /* - * according to imx pwm RM, the real period value should be - * PERIOD value in PWMPR plus 2. - */ - if (*period_c > 2) - *period_c -= 2; - else - *period_c = 0; - - return 0; -} diff --git a/drivers/pwm/pwm-imx-util.h b/drivers/pwm/pwm-imx-util.h deleted file mode 100644 index 82c61d774d..0000000000 --- a/drivers/pwm/pwm-imx-util.h +++ /dev/null @@ -1,15 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * (C) Copyright 2014 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * Basic support for the pwm module on imx6. - */ - -#ifndef _pwm_imx_util_h_ -#define _pwm_imx_util_h_ - -struct pwm_regs *pwm_id_to_reg(int pwm_id); -int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, - unsigned long *duty_c, unsigned long *prescale); -#endif diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 2008c1520e..67dad21295 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -13,7 +13,6 @@ #include <pwm.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> -#include "pwm-imx-util.h"

int pwm_init(int pwm_id, int div, int invert) { @@ -44,6 +43,72 @@ int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles, return 0; }

+/* pwm_id from 0..7 */ +struct pwm_regs *pwm_id_to_reg(int pwm_id) +{ + + switch (pwm_id) { + case 0: + return (struct pwm_regs *)PWM1_BASE_ADDR; + case 1: + return (struct pwm_regs *)PWM2_BASE_ADDR; +#ifdef CONFIG_MX6 + case 2: + return (struct pwm_regs *)PWM3_BASE_ADDR; + case 3: + return (struct pwm_regs *)PWM4_BASE_ADDR; +#endif +#ifdef CONFIG_MX6SX + case 4: + return (struct pwm_regs *)PWM5_BASE_ADDR; + case 5: + return (struct pwm_regs *)PWM6_BASE_ADDR; + case 6: + return (struct pwm_regs *)PWM7_BASE_ADDR; + case 7: + return (struct pwm_regs *)PWM8_BASE_ADDR; +#endif + default: + printf("unknown pwm_id: %d\n", pwm_id); + break; + } + return NULL; +} + +int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, + unsigned long *duty_c, unsigned long *prescale) +{ + unsigned long long c; + + /* + * we have not yet a clock framework for imx6, so add the clock + * value here as a define. Replace it when we have the clock + * framework. + */ + c = CONFIG_IMX6_PWM_PER_CLK; + c = c * period_ns; + do_div(c, 1000000000); + *period_c = c; + + *prescale = *period_c / 0x10000 + 1; + + *period_c /= *prescale; + c = *period_c * (unsigned long long)duty_ns; + do_div(c, period_ns); + *duty_c = c; + + /* + * according to imx pwm RM, the real period value should be + * PERIOD value in PWMPR plus 2. + */ + if (*period_c > 2) + *period_c -= 2; + else + *period_c = 0; + + return 0; +} + int pwm_config(int pwm_id, int duty_ns, int period_ns) { struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);

Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat and imx_pwm_probe driver function

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- Changes since v3: - Fix ipg/per clk declaration - Fix clk_get_by_name call - Fix clk_enable call

drivers/pwm/pwm-imx.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)

diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 67dad21295..74b0817a05 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -24,6 +24,7 @@ int pwm_init(int pwm_id, int div, int invert) writel(0, &pwm->ir); return 0; } +#include <clk.h>

int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles, unsigned long duty_cycles, unsigned long prescale) @@ -148,6 +149,8 @@ void pwm_disable(int pwm_id) struct imx_pwm_priv { struct pwm_regs *regs; bool invert; + struct clk per_clk; + struct clk ipg_clk; };

static int imx_pwm_set_invert(struct udevice *dev, uint channel, @@ -193,15 +196,43 @@ static int imx_pwm_set_enable(struct udevice *dev, uint channel, bool enable)

static int imx_pwm_of_to_plat(struct udevice *dev) { + int ret; struct imx_pwm_priv *priv = dev_get_priv(dev);

priv->regs = dev_read_addr_ptr(dev);

+ ret = clk_get_by_name(dev, "per", &priv->per_clk); + if (ret) { + printf("Failed to get per_clk\n"); + return ret; + } + + ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); + if (ret) { + printf("Failed to get ipg_clk\n"); + return ret; + } + return 0; }

static int imx_pwm_probe(struct udevice *dev) { + int ret; + struct imx_pwm_priv *priv = dev_get_priv(dev); + + ret = clk_enable(&priv->per_clk); + if (ret) { + printf("Failed to enable per_clk\n"); + return ret; + } + + ret = clk_enable(&priv->ipg_clk); + if (ret) { + printf("Failed to enable ipg_clk\n"); + return ret; + } + return 0; }

Introduce pwm_dm_imx_get_parms, dm version of pwm_imx_get_parms. This function get clock rate using clk dm api

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- Changes since v3: - Fix clk_get_rate call

drivers/pwm/pwm-imx.c | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-)

diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 74b0817a05..1d656e726f 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -153,6 +153,36 @@ struct imx_pwm_priv { struct clk ipg_clk; };

+int pwm_dm_imx_get_parms(struct imx_pwm_priv *priv, int period_ns, + int duty_ns, unsigned long *period_c, unsigned long *duty_c, + unsigned long *prescale) +{ + unsigned long long c; + + c = clk_get_rate(&priv->per_clk); + c = c * period_ns; + do_div(c, 1000000000); + *period_c = c; + + *prescale = *period_c / 0x10000 + 1; + + *period_c /= *prescale; + c = *period_c * (unsigned long long)duty_ns; + do_div(c, period_ns); + *duty_c = c; + + /* + * according to imx pwm RM, the real period value should be + * PERIOD value in PWMPR plus 2. + */ + if (*period_c > 2) + *period_c -= 2; + else + *period_c = 0; + + return 0; +} + static int imx_pwm_set_invert(struct udevice *dev, uint channel, bool polarity) { @@ -173,7 +203,7 @@ static int imx_pwm_set_config(struct udevice *dev, uint channel,

debug("%s: Config '%s' channel: %d\n", __func__, dev->name, channel);

- pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles, + pwm_dm_imx_get_parms(priv, period_ns, duty_ns, &period_cycles, &duty_cycles, &prescale);

return pwm_config_internal(regs, period_cycles, duty_cycles, prescale);

Separe dm implementation from non dm implementation of pwm-imx driver using CONFIG_DM_PWM

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- drivers/pwm/pwm-imx.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 1d656e726f..9b8a8c189d 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -13,17 +13,6 @@ #include <pwm.h> #include <asm/arch/imx-regs.h> #include <asm/io.h> - -int pwm_init(int pwm_id, int div, int invert) -{ - struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); - - if (!pwm) - return -1; - - writel(0, &pwm->ir); - return 0; -} #include <clk.h>

int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles, @@ -44,6 +33,7 @@ int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles, return 0; }

+#ifndef CONFIG_DM_PWM /* pwm_id from 0..7 */ struct pwm_regs *pwm_id_to_reg(int pwm_id) { @@ -110,6 +100,17 @@ int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, return 0; }

+int pwm_init(int pwm_id, int div, int invert) +{ + struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); + + if (!pwm) + return -1; + + writel(0, &pwm->ir); + return 0; +} + int pwm_config(int pwm_id, int duty_ns, int period_ns) { struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id); @@ -145,7 +146,7 @@ void pwm_disable(int pwm_id) clrbits_le32(&pwm->cr, PWMCR_EN); }

-#if defined(CONFIG_DM_PWM) +#else struct imx_pwm_priv { struct pwm_regs *regs; bool invert;

Add pwm1/backlight support nodes for imx8mm_evk board

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- arch/arm/dts/imx8mm-evk.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)

diff --git a/arch/arm/dts/imx8mm-evk.dtsi b/arch/arm/dts/imx8mm-evk.dtsi index 60179e006d..e7a2bd8a64 100644 --- a/arch/arm/dts/imx8mm-evk.dtsi +++ b/arch/arm/dts/imx8mm-evk.dtsi @@ -41,6 +41,15 @@ enable-active-high; };

+ backlight: backlight { + status = "disabled"; + compatible = "pwm-backlight"; + pwms = <&pwm1 0 5000000>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <250>; + }; + ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; @@ -350,6 +359,12 @@ status = "okay"; };

+&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_backlight>; + status = "disabled"; +}; + &iomuxc { pinctrl_fec1: fec1grp { fsl,pins = < @@ -491,4 +506,10 @@ MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166 >; }; + + pinctrl_backlight: backlightgrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06 + >; + }; };

Enable support for backlight/pwm-imx driver

Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- Changes since v4: - Drop off CONFIG_DM_VIDEO

configs/imx8mm_evk_defconfig | 4 ++++ 1 file changed, 4 insertions(+)

diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 01395fc7eb..db0d19c38d 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -84,3 +84,7 @@ CONFIG_SYSRESET_PSCI=y CONFIG_SYSRESET_WATCHDOG=y CONFIG_DM_THERMAL=y CONFIG_IMX_WATCHDOG=y +CONFIG_BACKLIGHT=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_DM_PWM=y +CONFIG_PWM_IMX=y \ No newline at end of file