[U-Boot] [PATCH] armv8/cache: Fix page table creation

From: Thierry Reding treding@nvidia.com
While generating the page tables, a running integer index is shifted by SECTION_SHIFT (29) and causes overflow for any integer bigger than 7. The page tables therefore alias to the same 8 sections and cause U-Boot to hang once the MMU is enabled.
Fix this by making the index a 64-bit unsigned integer and so avoid the overflow.
swarren notes: currently "i" ranges from 0..8191 on all ARM64 boards, and "j" varies depending on RAM size; from 4 to 11 for a board with 4GB at physical address 2GB, as some Tegra boards have.
Signed-off-by: Thierry Reding treding@nvidia.com Signed-off-by: Tom Warren twarren@nvidia.com Signed-off-by: Stephen Warren swarren@nvidia.com --- arch/arm/cpu/armv8/cache_v8.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c5ec5297cd39..254a629a3b8c 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -25,9 +25,9 @@ void set_pgtable_section(u64 *page_table, u64 index, u64 section, /* to activate the MMU we need to set up virtual memory */ static void mmu_setup(void) { - int i, j, el; bd_t *bd = gd->bd; - u64 *page_table = (u64 *)gd->arch.tlb_addr; + u64 *page_table = (u64 *)gd->arch.tlb_addr, i, j; + int el;
/* Setup an identity-mapping for all spaces */ for (i = 0; i < (PGTABLE_SIZE >> 3); i++) {

On 22 July 2015 at 17:10, Stephen Warren swarren@wwwdotorg.org wrote:
From: Thierry Reding treding@nvidia.com
While generating the page tables, a running integer index is shifted by SECTION_SHIFT (29) and causes overflow for any integer bigger than 7. The page tables therefore alias to the same 8 sections and cause U-Boot to hang once the MMU is enabled.
Fix this by making the index a 64-bit unsigned integer and so avoid the overflow.
swarren notes: currently "i" ranges from 0..8191 on all ARM64 boards, and "j" varies depending on RAM size; from 4 to 11 for a board with 4GB at physical address 2GB, as some Tegra boards have.
Signed-off-by: Thierry Reding treding@nvidia.com Signed-off-by: Tom Warren twarren@nvidia.com Signed-off-by: Stephen Warren swarren@nvidia.com
arch/arm/cpu/armv8/cache_v8.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org
participants (2)
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Simon Glass
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Stephen Warren