[U-Boot] [PATCH 5/9] km/uart: port UART interface of KM Kirkwood boards to driver model

Activate the driver model for the serial interface in the KM Kirkwood Kconfig file. The associated preprocessor definitions could be removed from the header file. However, the clock of 200 MHz needs to be declared in the device tree.
Signed-off-by: Pascal Linder pascal.linder@edu.hefr.ch Signed-off-by: Holger Brunck holger.brunck@ch.abb.com --- arch/arm/dts/kirkwood-km_common.dtsi | 1 + board/keymile/km_arm/Kconfig | 1 + include/configs/km/km_arm.h | 9 --------- 3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/kirkwood-km_common.dtsi b/arch/arm/dts/kirkwood-km_common.dtsi index 75dc83914f..9d0fc51c2d 100644 --- a/arch/arm/dts/kirkwood-km_common.dtsi +++ b/arch/arm/dts/kirkwood-km_common.dtsi @@ -22,6 +22,7 @@
serial@12000 { status = "okay"; + clock-frequency = <200000000>; }; };
diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index 7da052f4c4..335a45446a 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -42,6 +42,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_LATE_INIT select DM + select DM_SERIAL select DM_SPI select DM_SPI_FLASH imply CMD_CRAMFS diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index b257c384dc..a6cdf1ca3e 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -58,15 +58,6 @@
#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
-/* - * NS16550 Configuration - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK -#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE -#define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE - /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is

Activate the driver model for the Ethernet interface (RGMII) in the KM Kirkwood Kconfig file. Additionally, raise the auto negotiation timeout to eight seconds as more time is required for those boards.
Signed-off-by: Pascal Linder pascal.linder@edu.hefr.ch Signed-off-by: Holger Brunck holger.brunck@ch.abb.com --- board/keymile/km_arm/Kconfig | 1 + include/configs/km/km_arm.h | 1 + 2 files changed, 2 insertions(+)
diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index 335a45446a..be6b162815 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -42,6 +42,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy def_bool y select BOARD_LATE_INIT select DM + select DM_ETH select DM_SERIAL select DM_SPI select DM_SPI_FLASH diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h index a6cdf1ca3e..bdb2dcfb86 100644 --- a/include/configs/km/km_arm.h +++ b/include/configs/km/km_arm.h @@ -80,6 +80,7 @@ /* * Ethernet Driver configuration */ +#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer autoneg timeout */ #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ #define CONFIG_PHY_BASE_ADR 0

Remove the PORTL2 board and all its dependencies as it is no longer supported by the company.
Signed-off-by: Pascal Linder pascal.linder@edu.hefr.ch Signed-off-by: Holger Brunck holger.brunck@ch.abb.com --- board/keymile/km_arm/MAINTAINERS | 1 - configs/portl2_defconfig | 47 -------------------------------- include/configs/km_kirkwood.h | 4 --- scripts/config_whitelist.txt | 1 - 4 files changed, 53 deletions(-) delete mode 100644 configs/portl2_defconfig
diff --git a/board/keymile/km_arm/MAINTAINERS b/board/keymile/km_arm/MAINTAINERS index d156e8574b..d80589ded7 100644 --- a/board/keymile/km_arm/MAINTAINERS +++ b/board/keymile/km_arm/MAINTAINERS @@ -11,4 +11,3 @@ F: configs/kmnusa_defconfig F: configs/kmsugp1_defconfig F: configs/kmsuv31_defconfig F: configs/mgcoge3un_defconfig -F: configs/portl2_defconfig diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig deleted file mode 100644 index a8981db956..0000000000 --- a/configs/portl2_defconfig +++ /dev/null @@ -1,47 +0,0 @@ -CONFIG_ARM=y -CONFIG_SYS_DCACHE_OFF=y -CONFIG_KIRKWOOD=y -CONFIG_SYS_TEXT_BASE=0x07d00000 -CONFIG_TARGET_KM_KIRKWOOD=y -CONFIG_KM_PIGGY4_88E6061=y -CONFIG_IDENT_STRING="\nKeymile Port-L2" -CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -# CONFIG_DISPLAY_BOARDINFO is not set -CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" -CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GREPENV=y -CONFIG_CMD_EEPROM=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_I2C=y -CONFIG_CMD_NAND=y -CONFIG_CMD_SF=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_JFFS2=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=orion_nand" -CONFIG_MTDPARTS_DEFAULT="mtdparts=orion_nand:-(ubi0);" -CONFIG_CMD_UBI=y -# CONFIG_CMD_UBIFS is not set -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="kirkwood-km_kirkwood" -CONFIG_ENV_IS_IN_EEPROM=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_RAM=y -CONFIG_BOOTCOUNT_BOOTLIMIT=3 -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_SPEED=8100000 -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_MVGBE=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_KIRKWOOD_SPI=y -CONFIG_BCH=y diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index 92b0590d08..6fce83cfcd 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -66,10 +66,6 @@ #define CONFIG_HOSTNAME "kmcoge5un" #define CONFIG_KM_DISABLE_PCIE
-/* KM_PORTL2 */ -#elif defined(CONFIG_KM_PORTL2) -#define CONFIG_HOSTNAME "portl2" - /* KM_SUV31 */ #elif defined(CONFIG_KM_SUV31) #define CONFIG_HOSTNAME "kmsuv31" diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index fab6bbae3a..f6eb2d75f1 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -975,7 +975,6 @@ CONFIG_KM_KIRKWOOD_PCI CONFIG_KM_MGCOGE3UN CONFIG_KM_NEW_ENV CONFIG_KM_NUSA -CONFIG_KM_PORTL2 CONFIG_KM_ROOTFSSIZE CONFIG_KM_SUGP1 CONFIG_KM_SUV31

From: Holger Brunck holger.brunck@ch.abb.com
Signed-off-by: Valentin Longchamp valentin.longchamp@ch.abb.com Signed-off-by: Holger Brunck holger.brunck@ch.abb.com --- arch/powerpc/cpu/mpc83xx/Kconfig | 4 - board/keymile/common/ivm.c | 5 - board/keymile/km83xx/Kconfig | 19 ---- board/keymile/km83xx/MAINTAINERS | 1 - board/keymile/km83xx/km83xx.c | 81 -------------- configs/kmvect1_defconfig | 181 ------------------------------- include/configs/kmvect1.h | 56 ---------- scripts/config_whitelist.txt | 1 - 8 files changed, 348 deletions(-) delete mode 100644 configs/kmvect1_defconfig delete mode 100644 include/configs/kmvect1.h
diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 3f68b6f645..72053ceab4 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -110,10 +110,6 @@ config TARGET_SUVD3 bool "Support suvd3" select VENDOR_KM
-config TARGET_KMVECT1 - bool "Support kmvect1" - select VENDOR_KM - config TARGET_KMTEGR1 bool "Support kmtegr1" select VENDOR_KM diff --git a/board/keymile/common/ivm.c b/board/keymile/common/ivm.c index 23bd21c4bc..d22f3fa75a 100644 --- a/board/keymile/common/ivm.c +++ b/board/keymile/common/ivm.c @@ -310,11 +310,6 @@ static int ivm_populate_env(unsigned char *buf, int len) /* if an offset is defined, add it */ process_mac(valbuf, page2, CONFIG_PIGGY_MAC_ADRESS_OFFSET, true); env_set((char *)"ethaddr", (char *)valbuf); -#ifdef CONFIG_KMVECT1 -/* KMVECT1 has two ethernet interfaces */ - process_mac(valbuf, page2, 1, true); - env_set((char *)"eth1addr", (char *)valbuf); -#endif #else /* KMTEGR1 has a special setup. eth0 has no connection to the outside and * gets an locally administred MAC address, eth1 is the debug interface and diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig index 0a41be57f5..1011cc8b2c 100644 --- a/board/keymile/km83xx/Kconfig +++ b/board/keymile/km83xx/Kconfig @@ -38,25 +38,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
endif
-if TARGET_KMVECT1 - -config SYS_BOARD - default "km83xx" - -config SYS_VENDOR - default "keymile" - -config SYS_CONFIG_NAME - default "kmvect1" - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select ARCH_MPC8309 - imply CMD_CRAMFS - imply FS_CRAMFS - -endif - if TARGET_KMTEGR1
config SYS_BOARD diff --git a/board/keymile/km83xx/MAINTAINERS b/board/keymile/km83xx/MAINTAINERS index 94e0d572e2..d2af983073 100644 --- a/board/keymile/km83xx/MAINTAINERS +++ b/board/keymile/km83xx/MAINTAINERS @@ -10,7 +10,6 @@ F: configs/kmopti2_defconfig F: configs/kmtepr2_defconfig F: include/configs/suvd3.h F: configs/kmtegr1_defconfig -F: configs/kmvect1_defconfig F: configs/suvd3_defconfig F: configs/tuge1_defconfig F: configs/tuxx1_defconfig diff --git a/board/keymile/km83xx/km83xx.c b/board/keymile/km83xx/km83xx.c index 880ce67fa6..a693845383 100644 --- a/board/keymile/km83xx/km83xx.c +++ b/board/keymile/km83xx/km83xx.c @@ -124,19 +124,10 @@ static int piggy_present(void) return in_8(&base->bprth) & PIGGY_PRESENT; }
-#if defined(CONFIG_KMVECT1) -int ethernet_present(void) -{ - /* ethernet port connected to simple switch without piggy */ - return 1; -} -#else int ethernet_present(void) { return piggy_present(); } -#endif -
int board_early_init_r(void) { @@ -197,80 +188,8 @@ int misc_init_r(void) return 0; }
-#if defined(CONFIG_KMVECT1) -#include <mv88e6352.h> -/* Marvell MV88E6122 switch configuration */ -static struct mv88e_sw_reg extsw_conf[] = { - /* port 1, FRONT_MDI, autoneg */ - { PORT(1), PORT_PHY, NO_SPEED_FOR }, - { PORT(1), PORT_CTRL, FORWARDING | EGRS_FLD_ALL }, - { PHY(1), PHY_1000_CTRL, NO_ADV }, - { PHY(1), PHY_SPEC_CTRL, AUTO_MDIX_EN }, - { PHY(1), PHY_CTRL, PHY_100_MBPS | AUTONEG_EN | AUTONEG_RST | - FULL_DUPLEX }, - /* port 2, unused */ - { PORT(2), PORT_CTRL, PORT_DIS }, - { PHY(2), PHY_CTRL, PHY_PWR_DOWN }, - { PHY(2), PHY_SPEC_CTRL, SPEC_PWR_DOWN }, - /* port 3, BP_MII (CPU), PHY mode, 100BASE */ - { PORT(3), PORT_CTRL, FORWARDING | EGRS_FLD_ALL }, - /* port 4, ESTAR to slot 11, SerDes, 1000BASE-X */ - { PORT(4), PORT_STATUS, NO_PHY_DETECT }, - { PORT(4), PORT_PHY, SPEED_1000_FOR }, - { PORT(4), PORT_CTRL, FORWARDING | EGRS_FLD_ALL }, - /* port 5, ESTAR to slot 13, SerDes, 1000BASE-X */ - { PORT(5), PORT_STATUS, NO_PHY_DETECT }, - { PORT(5), PORT_PHY, SPEED_1000_FOR }, - { PORT(5), PORT_CTRL, FORWARDING | EGRS_FLD_ALL }, - /* - * Errata Fix: 1.9V Output from Internal 1.8V Regulator, - * acc . MV-S300889-00D.pdf , clause 4.5 - */ - { PORT(5), 0x1A, 0xADB1 }, - /* port 6, unused, this port has no phy */ - { PORT(6), PORT_CTRL, PORT_DIS }, - /* - * Errata Fix: 1.9V Output from Internal 1.8V Regulator, - * acc . MV-S300889-00D.pdf , clause 4.5 - */ - { PORT(5), 0x1A, 0xADB1 }, -}; -#endif - int last_stage_init(void) { -#if defined(CONFIG_KMVECT1) - struct km_bec_fpga __iomem *base = - (struct km_bec_fpga __iomem *)CONFIG_SYS_KMBEC_FPGA_BASE; - u8 tmp_reg; - - /* Release mv88e6122 from reset */ - tmp_reg = in_8(&base->res1[0]) | 0x10; /* DIRECT3 register */ - out_8(&base->res1[0], tmp_reg); /* GP28 as output */ - tmp_reg = in_8(&base->gprt3) | 0x10; /* GP28 to high */ - out_8(&base->gprt3, tmp_reg); - - /* configure MV88E6122 switch */ - char *name = "UEC2"; - - if (miiphy_set_current_dev(name)) - return 0; - - mv88e_sw_program(name, CONFIG_KM_MVEXTSW_ADDR, extsw_conf, - ARRAY_SIZE(extsw_conf)); - - mv88e_sw_reset(name, CONFIG_KM_MVEXTSW_ADDR); - - if (piggy_present()) { - env_set("ethact", "UEC2"); - env_set("netdev", "eth1"); - puts("using PIGGY for network boot\n"); - } else { - env_set("netdev", "eth0"); - puts("using frontport for network boot\n"); - } -#endif - #if defined(CONFIG_TARGET_KMCOGE5NE) struct bfticu_iomap *base = (struct bfticu_iomap *)CONFIG_SYS_BFTIC3_BASE; diff --git a/configs/kmvect1_defconfig b/configs/kmvect1_defconfig deleted file mode 100644 index 890c4138ec..0000000000 --- a/configs/kmvect1_defconfig +++ /dev/null @@ -1,181 +0,0 @@ -CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0xF0000000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8 -CONFIG_SYS_CLK_FREQ=66000000 -CONFIG_MPC83xx=y -CONFIG_HIGH_BATS=y -CONFIG_TARGET_KMVECT1=y -CONFIG_SYSTEM_PLL_VCO_DIV_2=y -CONFIG_CORE_PLL_RATIO_2_1=y -CONFIG_QUICC_MULT_FACTOR_3=y -CONFIG_BOOT_MEMORY_SPACE_LOW=y -CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y -CONFIG_BAT0=y -CONFIG_BAT0_NAME="SDRAM" -CONFIG_BAT0_BASE=0x00000000 -CONFIG_BAT0_LENGTH_256_MBYTES=y -CONFIG_BAT0_ACCESS_RW=y -CONFIG_BAT0_ICACHE_INHIBITED=y -CONFIG_BAT0_ICACHE_GUARDED=y -CONFIG_BAT0_DCACHE_INHIBITED=y -CONFIG_BAT0_DCACHE_GUARDED=y -CONFIG_BAT0_USER_MODE_VALID=y -CONFIG_BAT0_SUPERVISOR_MODE_VALID=y -CONFIG_BAT1=y -CONFIG_BAT1_NAME="IMMR" -CONFIG_BAT1_BASE=0xE0000000 -CONFIG_BAT1_LENGTH_4_MBYTES=y -CONFIG_BAT1_ACCESS_RW=y -CONFIG_BAT1_ICACHE_INHIBITED=y -CONFIG_BAT1_ICACHE_GUARDED=y -CONFIG_BAT1_DCACHE_INHIBITED=y -CONFIG_BAT1_DCACHE_GUARDED=y -CONFIG_BAT1_USER_MODE_VALID=y -CONFIG_BAT1_SUPERVISOR_MODE_VALID=y -CONFIG_BAT2=y -CONFIG_BAT2_NAME="KMBEC_FPGA" -CONFIG_BAT2_BASE=0xE8000000 -CONFIG_BAT2_LENGTH_128_MBYTES=y -CONFIG_BAT2_ACCESS_RW=y -CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT2_DCACHE_INHIBITED=y -CONFIG_BAT2_DCACHE_GUARDED=y -CONFIG_BAT2_USER_MODE_VALID=y -CONFIG_BAT2_SUPERVISOR_MODE_VALID=y -CONFIG_BAT3=y -CONFIG_BAT3_NAME="FLASH" -CONFIG_BAT3_BASE=0xF0000000 -CONFIG_BAT3_LENGTH_256_MBYTES=y -CONFIG_BAT3_ACCESS_RW=y -CONFIG_BAT3_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT3_DCACHE_INHIBITED=y -CONFIG_BAT3_DCACHE_GUARDED=y -CONFIG_BAT3_USER_MODE_VALID=y -CONFIG_BAT3_SUPERVISOR_MODE_VALID=y -CONFIG_BAT4=y -CONFIG_BAT4_NAME="STACK_IN_DCACHE" -CONFIG_BAT4_BASE=0xE6000000 -CONFIG_BAT4_ACCESS_RW=y -CONFIG_BAT4_USER_MODE_VALID=y -CONFIG_BAT4_SUPERVISOR_MODE_VALID=y -CONFIG_BAT5=y -CONFIG_BAT5_NAME="APP1" -CONFIG_BAT5_BASE=0xA0000000 -CONFIG_BAT5_LENGTH_256_MBYTES=y -CONFIG_BAT5_ACCESS_RW=y -CONFIG_BAT5_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT5_DCACHE_INHIBITED=y -CONFIG_BAT5_DCACHE_GUARDED=y -CONFIG_BAT5_USER_MODE_VALID=y -CONFIG_BAT5_SUPERVISOR_MODE_VALID=y -CONFIG_BAT6=y -CONFIG_BAT6_NAME="APP2" -CONFIG_BAT6_BASE=0xB0000000 -CONFIG_BAT6_LENGTH_256_MBYTES=y -CONFIG_BAT6_ACCESS_RW=y -CONFIG_BAT6_ICACHE_MEMORYCOHERENCE=y -CONFIG_BAT6_DCACHE_INHIBITED=y -CONFIG_BAT6_DCACHE_GUARDED=y -CONFIG_BAT6_USER_MODE_VALID=y -CONFIG_BAT6_SUPERVISOR_MODE_VALID=y -CONFIG_LBLAW0=y -CONFIG_LBLAW0_BASE=0xF0000000 -CONFIG_LBLAW0_NAME="FLASH" -CONFIG_LBLAW0_LENGTH_256_MBYTES=y -CONFIG_LBLAW1=y -CONFIG_LBLAW1_BASE=0xE8000000 -CONFIG_LBLAW1_NAME="KMBEC_FPGA" -CONFIG_LBLAW1_LENGTH_128_MBYTES=y -CONFIG_LBLAW2=y -CONFIG_LBLAW2_BASE=0xA0000000 -CONFIG_LBLAW2_NAME="APP1" -CONFIG_LBLAW2_LENGTH_256_MBYTES=y -CONFIG_LBLAW3=y -CONFIG_LBLAW3_BASE=0xB0000000 -CONFIG_LBLAW3_NAME="APP2" -CONFIG_LBLAW3_LENGTH_256_MBYTES=y -CONFIG_ELBC_BR0_OR0=y -CONFIG_BR0_OR0_NAME="FLASH" -CONFIG_BR0_OR0_BASE=0xF0000000 -CONFIG_BR0_PORTSIZE_16BIT=y -CONFIG_OR0_AM_256_MBYTES=y -CONFIG_OR0_SCY_5=y -CONFIG_OR0_CSNT_EARLIER=y -CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR0_TRLX_RELAXED=y -CONFIG_OR0_EAD_EXTRA=y -CONFIG_ELBC_BR1_OR1=y -CONFIG_BR1_OR1_NAME="KMBEC_FPGA" -CONFIG_BR1_OR1_BASE=0xE8000000 -CONFIG_OR1_AM_128_MBYTES=y -CONFIG_OR1_SCY_2=y -CONFIG_OR1_CSNT_EARLIER=y -CONFIG_OR1_ACS_HALF_CYCLE_EARLIER=y -CONFIG_OR1_TRLX_RELAXED=y -CONFIG_OR1_EAD_EXTRA=y -CONFIG_ELBC_BR2_OR2=y -CONFIG_BR2_OR2_NAME="APP1" -CONFIG_BR2_OR2_BASE=0xA0000000 -CONFIG_BR2_PORTSIZE_16BIT=y -CONFIG_BR2_MACHINE_UPMA=y -CONFIG_OR2_AM_256_MBYTES=y -CONFIG_ELBC_BR3_OR3=y -CONFIG_BR3_OR3_NAME="APP2" -CONFIG_BR3_OR3_BASE=0xB0000000 -CONFIG_BR3_PORTSIZE_16BIT=y -CONFIG_OR3_AM_256_MBYTES=y -CONFIG_OR3_SCY_3=y -CONFIG_OR3_CSNT_EARLIER=y -CONFIG_OR3_ACS_QUARTER_CYCLE_EARLIER=y -CONFIG_OR3_TRLX_RELAXED=y -CONFIG_HID0_FINAL_EMCP=y -CONFIG_HID0_FINAL_ICE=y -CONFIG_HID2_HBE=y -CONFIG_ACR_PIPE_DEP_4=y -CONFIG_ACR_RPTCNT_4=y -CONFIG_ACR_APARK_MASTER=y -CONFIG_ACR_PARKM_USB_I2C1_BOOT=y -CONFIG_LCRR_EADC_1=y -CONFIG_LCRR_CLKDIV_2=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="KMVECT1" -CONFIG_MISC_INIT_R=y -CONFIG_VERSION_VARIABLE=y -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_LAST_STAGE_INIT=y -CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" -CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_IMLS=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GREPENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_I2C=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_JFFS2=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nor0=boot" -CONFIG_MTDPARTS_DEFAULT="mtdparts=boot:768k(u-boot),128k(env),128k(envred),-(ubi0);" -CONFIG_CMD_DIAG=y -CONFIG_CMD_UBI=y -# CONFIG_CMD_UBIFS is not set -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_BOOTLIMIT=3 -# CONFIG_MMC is not set -CONFIG_MTD_NOR_FLASH=y -CONFIG_MTD_DEVICE=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_FLASH_CFI_MTD=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_MV88E6352_SWITCH=y -# CONFIG_PCI is not set -CONFIG_QE=y -CONFIG_SYS_QE_FMAN_FW_IN_NOR=y -CONFIG_SYS_NS16550=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/kmvect1.h b/include/configs/kmvect1.h deleted file mode 100644 index 4a3064d87f..0000000000 --- a/include/configs/kmvect1.h +++ /dev/null @@ -1,56 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2006 Freescale Semiconductor, Inc. - * Dave Liu daveliu@freescale.com - * - * Copyright (C) 2007 Logic Product Development, Inc. - * Peter Barada peterb@logicpd.com - * - * Copyright (C) 2007 MontaVista Software, Inc. - * Anton Vorontsov avorontsov@ru.mvista.com - * - * (C) Copyright 2010 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - */ - -#define CONFIG_HOSTNAME "kmvect1" -#define CONFIG_KM_BOARD_NAME "kmvect1" -/* at end of uboot partition, before env */ -#define CONFIG_SYS_QE_FW_ADDR 0xF00B0000 - -/* include common defines/options for all Keymile boards */ -#include "km/keymile-common.h" -#include "km/km-powerpc.h" -#include "km/km-mpc83xx.h" -#include "km/km-mpc8309.h" - -#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \ - 0x0000c000 | \ - MxMR_WLFx_2X) - -/* ethernet port connected to simple switch 88e6122 (UEC0) */ -#define CONFIG_UEC_ETH1 -#define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ -#define CONFIG_SYS_UEC1_RX_CLK QE_CLK9 -#define CONFIG_SYS_UEC1_TX_CLK QE_CLK10 - -#define CONFIG_FIXED_PHY 0xFFFFFFFF -#define CONFIG_SYS_FIXED_PHY_ADDR 0x1E /* unused address */ -#define CONFIG_SYS_FIXED_PHY_PORT(devnum, speed, duplex) \ - {devnum, speed, duplex} -#define CONFIG_SYS_FIXED_PHY_PORTS \ - CONFIG_SYS_FIXED_PHY_PORT("UEC0", SPEED_100, DUPLEX_FULL) - -#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH -#define CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_FIXED_PHY_ADDR -#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII -#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 - -#endif /* __CONFIG_H */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index f6eb2d75f1..5234600ea0 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -951,7 +951,6 @@ CONFIG_KMCOGE4 CONFIG_KMLION1 CONFIG_KMP204X CONFIG_KMTEGR1 -CONFIG_KMVECT1 CONFIG_KM_BOARD_EXTRA_ENV CONFIG_KM_BOARD_NAME CONFIG_KM_COGE5UN

From: Holger Brunck holger.brunck@ch.abb.com
This board is unmaintained and can be removed. This also allows us to remove kmp204x-common.h and integrate it in kmp204x.h.
Signed-off-by: Valentin Longchamp valentin.longchamp@ch.abb.com Signed-off-by: Holger Brunck holger.brunck@ch.abb.com --- board/keymile/kmp204x/MAINTAINERS | 1 - configs/kmlion1_defconfig | 57 ---- include/configs/km/kmp204x-common.h | 394 -------------------------- include/configs/kmp204x.h | 410 ++++++++++++++++++++++++++-- scripts/config_whitelist.txt | 1 - 5 files changed, 390 insertions(+), 473 deletions(-) delete mode 100644 configs/kmlion1_defconfig delete mode 100644 include/configs/km/kmp204x-common.h
diff --git a/board/keymile/kmp204x/MAINTAINERS b/board/keymile/kmp204x/MAINTAINERS index c5170c97e7..fb3aefdd37 100644 --- a/board/keymile/kmp204x/MAINTAINERS +++ b/board/keymile/kmp204x/MAINTAINERS @@ -4,4 +4,3 @@ S: Maintained F: board/keymile/kmp204x/ F: include/configs/kmp204x.h F: configs/kmcoge4_defconfig -F: configs/kmlion1_defconfig diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig deleted file mode 100644 index 6675c315ea..0000000000 --- a/configs/kmlion1_defconfig +++ /dev/null @@ -1,57 +0,0 @@ -CONFIG_PPC=y -CONFIG_SYS_TEXT_BASE=0xfff40000 -CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020 -CONFIG_MPC85xx=y -CONFIG_TARGET_KMP204X=y -CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_OF_STDOUT_VIA_ALIAS=y -CONFIG_SYS_EXTRA_OPTIONS="KMLION1" -CONFIG_VERSION_VARIABLE=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_BOARD_EARLY_INIT_R=y -CONFIG_LAST_STAGE_INIT=y -CONFIG_HUSH_PARSER=y -CONFIG_AUTOBOOT_KEYED=y -CONFIG_AUTOBOOT_PROMPT="Hit <SPACE> key to stop autoboot in %2ds\n" -CONFIG_AUTOBOOT_STOP_STR=" " -CONFIG_CMD_ASKENV=y -CONFIG_CMD_GREPENV=y -CONFIG_CMD_EEPROM=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_I2C=y -CONFIG_CMD_SF=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_MP=y -# CONFIG_CMD_HASH is not set -CONFIG_CMD_JFFS2=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=fsl_elbc_nand" -CONFIG_MTDPARTS_DEFAULT="mtdparts=fsl_elbc_nand:-(ubi0);" -# CONFIG_CMD_IRQ is not set -CONFIG_CMD_UBI=y -# CONFIG_CMD_UBIFS is not set -CONFIG_DOS_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_BOOTLIMIT=3 -# CONFIG_MMC is not set -CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0 -CONFIG_SF_DEFAULT_SPEED=20000000 -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_PHYLIB=y -CONFIG_PHY_MARVELL=y -CONFIG_PHY_GIGE=y -CONFIG_E1000=y -CONFIG_FMAN_ENET=y -CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_FSL_ESPI=y -CONFIG_BCH=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h deleted file mode 100644 index 421a03e580..0000000000 --- a/include/configs/km/kmp204x-common.h +++ /dev/null @@ -1,394 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 Keymile AG - * Valentin Longchamp valentin.longchamp@keymile.com - */ - -#ifndef _CONFIG_KMP204X_H -#define _CONFIG_KMP204X_H - -#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0" - -/* an additionnal option is required for UBI as subpage access is - * supported in u-boot */ -#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" - -#define CONFIG_NAND_ECC_BCH - -/* common KM defines */ -#include "keymile-common.h" - -#define CONFIG_SYS_RAMBOOT -#define CONFIG_RAMBOOT_PBL -#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_SYS_FSL_PBL_PBI board/keymile/kmp204x/pbi.cfg -#define CONFIG_SYS_FSL_PBL_RCW board/keymile/kmp204x/rcw_kmp204x.cfg - -/* High Level Configuration Options */ -#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ - -#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ -#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS -#define CONFIG_PCIE1 /* PCIE controller 1 */ -#define CONFIG_PCIE3 /* PCIE controller 3 */ -#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ -#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ - -#define CONFIG_SYS_DPAA_RMAN /* RMan */ - -/* Environment in SPI Flash */ -#define CONFIG_ENV_OFFSET 0x100000 /* 1MB for u-boot */ -#define CONFIG_ENV_SIZE 0x004000 /* 16K env */ -#define CONFIG_ENV_SECT_SIZE 0x010000 -#define CONFIG_ENV_OFFSET_REDUND 0x110000 -#define CONFIG_ENV_TOTAL_SIZE 0x020000 - -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT - -#ifndef __ASSEMBLY__ -unsigned long get_board_sys_clk(unsigned long dummy); -#endif -#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) - -/* - * These can be toggled for performance analysis, otherwise use default. - */ -#define CONFIG_SYS_CACHE_STASHING -#define CONFIG_BACKSIDE_L2_CACHE -#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E -#define CONFIG_BTB /* toggle branch predition */ - -#define CONFIG_ENABLE_36BIT_PHYS - -#define CONFIG_ADDR_MAP -#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ - -#define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS /* POST memory regions test */ - -/* - * Config the L3 Cache as L3 SRAM - */ -#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE -#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ - CONFIG_RAMBOOT_TEXT_BASE) -#define CONFIG_SYS_L3_SIZE (1024 << 10) -#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) - -#define CONFIG_SYS_DCSRBAR 0xf0000000 -#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull - -/* - * DDR Setup - */ -#define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 -#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE - -#define CONFIG_DIMM_SLOTS_PER_CTLR 1 -#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR) - -#define CONFIG_DDR_SPD - -#define CONFIG_SYS_SPD_BUS_NUM 0 -#define SPD_EEPROM_ADDRESS 0x54 -#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ - -#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - -/****************************************************************************** - * (PRAM usage) - * ... ------------------------------------------------------- - * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM - * ... |<------------------- pram -------------------------->| - * ... ------------------------------------------------------- - * @END_OF_RAM: - * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose - * @CONFIG_KM_PHRAM: address for /var - * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) - * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM - */ - -/* size of rootfs in RAM */ -#define CONFIG_KM_ROOTFSSIZE 0x0 -/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable - * is not valid yet, which is the case for when u-boot copies itself to RAM */ -#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM)>>10) - -/* - * Local Bus Definitions - */ - -/* Set the local bus clock 1/8 of plat clk, 2 clk delay LALE */ -#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_2) - -/* Nand Flash */ -#define CONFIG_NAND_FSL_ELBC -#define CONFIG_SYS_NAND_BASE 0xffa00000 -#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull - -#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) - -/* NAND flash config */ -#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ - | BR_PS_8 /* Port Size = 8 bit */ \ - | BR_MS_FCM /* MSEL = FCM */ \ - | BR_V) /* valid */ - -#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_256KB /* length 256K */ \ - | OR_FCM_BCTLD /* LBCTL not ass */ \ - | OR_FCM_SCY_1 /* 1 clk wait cycle */ \ - | OR_FCM_RST /* 1 clk read setup */ \ - | OR_FCM_PGS /* Large page size */ \ - | OR_FCM_CST) /* 0.25 command setup */ - -#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ -#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ - -/* QRIO FPGA */ -#define CONFIG_SYS_QRIO_BASE 0xfb000000 -#define CONFIG_SYS_QRIO_BASE_PHYS 0xffb000000ull - -#define CONFIG_SYS_QRIO_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_QRIO_BASE_PHYS) \ - | BR_PS_8 /* Port Size 8 bits */ \ - | BR_DECC_OFF /* no error corr */ \ - | BR_MS_GPCM /* MSEL = GPCM */ \ - | BR_V) /* valid */ - -#define CONFIG_SYS_QRIO_OR_PRELIM (OR_AM_64KB /* length 64K */ \ - | OR_GPCM_BCTLD /* no LCTL assert */ \ - | OR_GPCM_ACS_DIV4 /* LCS 1/4 clk after */ \ - | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \ - | OR_GPCM_TRLX /* relaxed tmgs */ \ - | OR_GPCM_EAD) /* extra bus clk cycles */ - -#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */ -#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */ - -#define CONFIG_MISC_INIT_F - -#define CONFIG_HWCONFIG - -/* define to use L1 as initial stack */ -#define CONFIG_L1_INIT_RAM -#define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR -/* The assembler doesn't like typecast */ -#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ - ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ - CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) -#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 - -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET - -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (768 * 1024) -#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) - -/* Serial Port - controlled on board with jumper J8 - * open - index 2 - * shorted - index 1 - */ -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE 1 -#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0)/2) - -#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x11C500) -#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x11C600) -#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR+0x11D500) -#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR+0x11D600) - -/* I2C */ - -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_INIT_BOARD -#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ -#define CONFIG_SYS_NUM_I2C_BUSES 3 -#define CONFIG_SYS_I2C_MAX_HOPS 1 -#define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ -#define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE -#define CONFIG_SYS_FSL_I2C_SPEED 400000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 -#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ - {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ - {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ - } -#ifndef __ASSEMBLY__ -void set_sda(int state); -void set_scl(int state); -int get_sda(void); -int get_scl(void); -#endif - -/* - * eSPI - Enhanced SPI - */ - -/* - * General PCI - * Memory space is mapped 1-1, but I/O space must start from 0. - */ - -/* controller 1, direct to uli, tgtid 3, Base address 20000 */ -#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 -#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull -#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 -#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull -#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ - -/* controller 3, Slot 1, tgtid 1, Base address 202000 */ -#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 -#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 -#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull -#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ -#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8010000 -#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 -#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8010000ull -#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ - -/* Qman/Bman */ -#define CONFIG_SYS_BMAN_NUM_PORTALS 10 -#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 -#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull -#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE -#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ - CONFIG_SYS_BMAN_CENA_SIZE) -#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 -#define CONFIG_SYS_QMAN_NUM_PORTALS 10 -#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 -#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull -#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 -#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 -#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 -#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE -#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ - CONFIG_SYS_QMAN_CENA_SIZE) -#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) -#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 - -#define CONFIG_SYS_DPAA_FMAN -#define CONFIG_SYS_DPAA_PME -/* Default address of microcode for the Linux Fman driver - * env is stored at 0x100000, sector size is 0x10000, x2 (redundant) - * ucode is stored after env, so we got 0x120000. - */ -#define CONFIG_SYS_FMAN_FW_ADDR 0x120000 -#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 -#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) - -#define CONFIG_PHYLIB_10G - -#define CONFIG_PCI_INDIRECT_BRIDGE - -#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ - -/* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */ -#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11 -#define CONFIG_SYS_TBIPA_VALUE 8 -#define CONFIG_ETHPRIME "FM1@DTSEC5" - -/* - * Environment - */ -#define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ - -/* - * Hardware Watchdog - */ -#define CONFIG_WATCHDOG /* enable CPU watchdog */ -#define CONFIG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) (~10min) */ -#define CONFIG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */ - - -/* - * additionnal command line configuration. - */ - -/* we don't need flash support */ -#undef CONFIG_JFFS2_CMDLINE - -/* - * For booting Linux, the board info and command line data - * have to be in the first 64 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ -#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ -#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ - -#ifdef CONFIG_CMD_KGDB -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ -#endif - -#define __USB_PHY_TYPE utmi -#define CONFIG_USB_EHCI_FSL - -/* - * Environment Configuration - */ -#define CONFIG_ENV_OVERWRITE -#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ -#define CONFIG_KM_DEF_ENV "km-common=empty\0" -#endif - -/* architecture specific default bootargs */ -#define CONFIG_KM_DEF_BOOT_ARGS_CPU "" - -/* FIXME: FDT_ADDR is unspecified */ -#define CONFIG_KM_DEF_ENV_CPU \ - "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ - "cramfsloadfdt=" \ - "cramfsload ${fdt_addr_r} " \ - "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ - "fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ - "u-boot="CONFIG_HOSTNAME "/u-boot.pbl\0" \ - "update=" \ - "sf probe 0;sf erase 0 +${filesize};" \ - "sf write ${load_addr_r} 0 ${filesize};\0" \ - "set_fdthigh=true\0" \ - "checkfdt=true\0" \ - "" - -#define CONFIG_HW_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=cacheline\0" \ - "usb_phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ - "usb_dr_mode=host\0" - -#define CONFIG_KM_NEW_ENV \ - "newenv=sf probe 0;" \ - "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ - __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" - -/* ppc_82xx is the equivalent to ppc_6xx, the generic ppc toolchain */ -#ifndef CONFIG_KM_DEF_ARCH -#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" -#endif - -#define CONFIG_EXTRA_ENV_SETTINGS \ - CONFIG_KM_DEF_ENV \ - CONFIG_KM_DEF_ARCH \ - CONFIG_KM_NEW_ENV \ - CONFIG_HW_ENV_SETTINGS \ - "EEprom_ivm=pca9547:70:9\0" \ - "" - -#endif /* _CONFIG_KMP204X_H */ diff --git a/include/configs/kmp204x.h b/include/configs/kmp204x.h index c50026d71e..75480a8a58 100644 --- a/include/configs/kmp204x.h +++ b/include/configs/kmp204x.h @@ -7,13 +7,7 @@ #ifndef __CONFIG_H #define __CONFIG_H
-/* KMLION1 */ -#if defined(CONFIG_KMLION1) -#define CONFIG_HOSTNAME "kmlion1" -#define CONFIG_KM_BOARD_NAME "kmlion1" - -/* KMCOGE4 */ -#elif defined(CONFIG_KMCOGE4) +#if defined(CONFIG_KMCOGE4) #define CONFIG_HOSTNAME "kmcoge4" #define CONFIG_KM_BOARD_NAME "kmcoge4"
@@ -23,31 +17,407 @@
#define CONFIG_KMP204X
-#include "km/kmp204x-common.h" +#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0" + +/* an additionnal option is required for UBI as subpage access is + * supported in u-boot + */ +#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048" + +#define CONFIG_NAND_ECC_BCH + +/* common KM defines */ +#include "km/keymile-common.h" + +#define CONFIG_SYS_RAMBOOT +#define CONFIG_RAMBOOT_PBL +#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc +#define CONFIG_SYS_FSL_PBL_PBI board/keymile/kmp204x/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW board/keymile/kmp204x/rcw_kmp204x.cfg + +/* High Level Configuration Options */ +#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ +#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ + +#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ +#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ + +#define CONFIG_SYS_DPAA_RMAN /* RMan */ + +/* Environment in SPI Flash */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB for u-boot */ +#define CONFIG_ENV_SIZE 0x004000 /* 16K env */ +#define CONFIG_ENV_SECT_SIZE 0x010000 +#define CONFIG_ENV_OFFSET_REDUND 0x110000 +#define CONFIG_ENV_TOTAL_SIZE 0x020000 + +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(unsigned long dummy); +#endif +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0) + +/* + * These can be toggled for performance analysis, otherwise use default. + */ +#define CONFIG_SYS_CACHE_STASHING +#define CONFIG_BACKSIDE_L2_CACHE +#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E +#define CONFIG_BTB /* toggle branch predition */ + +#define CONFIG_ENABLE_36BIT_PHYS + +#define CONFIG_ADDR_MAP +#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ + +#define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS /* POST memory regions test */ + +/* + * Config the L3 Cache as L3 SRAM + */ +#define CONFIG_SYS_INIT_L3_ADDR CONFIG_RAMBOOT_TEXT_BASE +#define CONFIG_SYS_INIT_L3_ADDR_PHYS (0xf00000000ull | \ + CONFIG_RAMBOOT_TEXT_BASE) +#define CONFIG_SYS_L3_SIZE (1024 << 10) +#define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) + +#define CONFIG_SYS_DCSRBAR 0xf0000000 +#define CONFIG_SYS_DCSRBAR_PHYS 0xf00000000ull + +/* + * DDR Setup + */ +#define CONFIG_VERY_BIG_RAM +#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#if defined(CONFIG_KMLION1) -/* App1 Local bus */ -#define CONFIG_SYS_LBAPP1_BASE 0xD0000000 -#define CONFIG_SYS_LBAPP1_BASE_PHYS 0xFD0000000ull +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_SYS_LBAPP1_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP1_BASE_PHYS) \ +#define CONFIG_DDR_SPD + +#define CONFIG_SYS_SPD_BUS_NUM 0 +#define SPD_EEPROM_ADDRESS 0x54 +#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ + +#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */ +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 + +/****************************************************************************** + * (PRAM usage) + * ... ------------------------------------------------------- + * ... |ROOTFSSIZE | PNVRAM |PHRAM |RESERVED_PRAM | END_OF_RAM + * ... |<------------------- pram -------------------------->| + * ... ------------------------------------------------------- + * @END_OF_RAM: + * @CONFIG_KM_RESERVED_PRAM: reserved pram for special purpose + * @CONFIG_KM_PHRAM: address for /var + * @CONFIG_KM_PNVRAM: address for PNVRAM (for the application) + * @CONFIG_KM_ROOTFSSIZE: address for rootfilesystem in RAM + */ + +/* size of rootfs in RAM */ +#define CONFIG_KM_ROOTFSSIZE 0x0 +/* pseudo-non volatile RAM [hex] */ +#define CONFIG_KM_PNVRAM 0x80000 +/* physical RAM MTD size [hex] */ +#define CONFIG_KM_PHRAM 0x100000 +/* reserved pram area at the end of memory [hex] + * u-boot reserves some memory for the MP boot page + */ +#define CONFIG_KM_RESERVED_PRAM 0x1000 +/* set the default PRAM value to at least PNVRAM + PHRAM when pram env variable + * is not valid yet, which is the case for when u-boot copies itself to RAM + */ +#define CONFIG_PRAM ((CONFIG_KM_PNVRAM + CONFIG_KM_PHRAM) >> 10) + +#define CONFIG_KM_CRAMFS_ADDR 0x2000000 +#define CONFIG_KM_KERNEL_ADDR 0x1000000 /* max kernel size 15.5Mbytes */ +#define CONFIG_KM_FDT_ADDR 0x1F80000 /* max dtb size 0.5Mbytes */ + +/* + * Local Bus Definitions + */ + +/* Set the local bus clock 1/8 of plat clk, 2 clk delay LALE */ +#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_2) + +/* Nand Flash */ +#define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_BASE 0xffa00000 +#define CONFIG_SYS_NAND_BASE_PHYS 0xfffa00000ull + +#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + +/* NAND flash config */ +#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ + +#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_256KB /* length 256K */ \ + | OR_FCM_BCTLD /* LBCTL not ass */ \ + | OR_FCM_SCY_1 /* 1 clk wait cycle */ \ + | OR_FCM_RST /* 1 clk read setup */ \ + | OR_FCM_PGS /* Large page size */ \ + | OR_FCM_CST) /* 0.25 command setup */ + +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ + +/* QRIO FPGA */ +#define CONFIG_SYS_QRIO_BASE 0xfb000000 +#define CONFIG_SYS_QRIO_BASE_PHYS 0xffb000000ull + +#define CONFIG_SYS_QRIO_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_QRIO_BASE_PHYS) \ | BR_PS_8 /* Port Size 8 bits */ \ | BR_DECC_OFF /* no error corr */ \ | BR_MS_GPCM /* MSEL = GPCM */ \ | BR_V) /* valid */
-#define CONFIG_SYS_LBAPP1_OR_PRELIM (OR_AM_256MB /* length 256MB */ \ - | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \ - | OR_GPCM_CSNT /* LCS 1/4 clk before */ \ +#define CONFIG_SYS_QRIO_OR_PRELIM (OR_AM_64KB /* length 64K */ \ + | OR_GPCM_BCTLD /* no LCTL assert */ \ + | OR_GPCM_ACS_DIV4 /* LCS 1/4 clk after */ \ | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \ | OR_GPCM_TRLX /* relaxed tmgs */ \ | OR_GPCM_EAD) /* extra bus clk cycles */ -/* Local bus app1 Base Address */ -#define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM -/* Local bus app1 Options */ -#define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_LBAPP1_OR_PRELIM + +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */ + +#define CONFIG_MISC_INIT_F + +#define CONFIG_HWCONFIG + +/* define to use L1 as initial stack */ +#define CONFIG_L1_INIT_RAM +#define CONFIG_SYS_INIT_RAM_LOCK +#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0xf +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR +/* The assembler doesn't like typecast */ +#define CONFIG_SYS_INIT_RAM_ADDR_PHYS \ + ((CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH * 1ull << 32) | \ + CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW) +#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 + +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) + +/* Serial Port - controlled on board with jumper J8 + * open - index 2 + * shorted - index 1 + */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) + +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x11C500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x11C600) +#define CONFIG_SYS_NS16550_COM3 (CONFIG_SYS_CCSRBAR + 0x11D500) +#define CONFIG_SYS_NS16550_COM4 (CONFIG_SYS_CCSRBAR + 0x11D600) + +#define CONFIG_KM_CONSOLE_TTY "ttyS0" + +/* I2C */ + +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_INIT_BOARD +#define CONFIG_SYS_I2C_SPEED 100000 /* deblocking */ +#define CONFIG_SYS_NUM_I2C_BUSES 3 +#define CONFIG_SYS_I2C_MAX_HOPS 1 +#define CONFIG_SYS_I2C_FSL /* Use FSL I2C driver */ +#define CONFIG_I2C_MULTI_BUS +#define CONFIG_I2C_CMD_TREE +#define CONFIG_SYS_FSL_I2C_SPEED 400000 +#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 +#define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 1 } } }, \ + {0, {{I2C_MUX_PCA9547, 0x70, 2 } } }, \ + } +#ifndef __ASSEMBLY__ +void set_sda(int state); +void set_scl(int state); +int get_sda(void); +int get_scl(void); #endif
+#define CONFIG_KM_IVM_BUS 1 /* I2C1 (Mux-Port 1)*/ + +/* + * eSPI - Enhanced SPI + */ + +/* + * General PCI + * Memory space is mapped 1-1, but I/O space must start from 0. + */ + +/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +#define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 +#define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull +#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE1_IO_VIRT 0xf8000000 +#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull +#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ + +/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +#define CONFIG_SYS_PCIE3_MEM_VIRT 0xa0000000 +#define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 +#define CONFIG_SYS_PCIE3_MEM_PHYS 0xc20000000ull +#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCIE3_IO_VIRT 0xf8010000 +#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 +#define CONFIG_SYS_PCIE3_IO_PHYS 0xff8010000ull +#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ + +/* Qman/Bman */ +#define CONFIG_SYS_BMAN_NUM_PORTALS 10 +#define CONFIG_SYS_BMAN_MEM_BASE 0xf4000000 +#define CONFIG_SYS_BMAN_MEM_PHYS 0xff4000000ull +#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000 +#define CONFIG_SYS_BMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_BMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_BMAN_CENA_BASE CONFIG_SYS_BMAN_MEM_BASE +#define CONFIG_SYS_BMAN_CENA_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_CINH_BASE (CONFIG_SYS_BMAN_MEM_BASE + \ + CONFIG_SYS_BMAN_CENA_SIZE) +#define CONFIG_SYS_BMAN_CINH_SIZE (CONFIG_SYS_BMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_BMAN_SWP_ISDR_REG 0xE08 +#define CONFIG_SYS_QMAN_NUM_PORTALS 10 +#define CONFIG_SYS_QMAN_MEM_BASE 0xf4200000 +#define CONFIG_SYS_QMAN_MEM_PHYS 0xff4200000ull +#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000 +#define CONFIG_SYS_QMAN_SP_CENA_SIZE 0x4000 +#define CONFIG_SYS_QMAN_SP_CINH_SIZE 0x1000 +#define CONFIG_SYS_QMAN_CENA_BASE CONFIG_SYS_QMAN_MEM_BASE +#define CONFIG_SYS_QMAN_CENA_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_CINH_BASE (CONFIG_SYS_QMAN_MEM_BASE + \ + CONFIG_SYS_QMAN_CENA_SIZE) +#define CONFIG_SYS_QMAN_CINH_SIZE (CONFIG_SYS_QMAN_MEM_SIZE >> 1) +#define CONFIG_SYS_QMAN_SWP_ISDR_REG 0xE08 + +#define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_PME +/* Default address of microcode for the Linux Fman driver + * env is stored at 0x100000, sector size is 0x10000, x2 (redundant) + * ucode is stored after env, so we got 0x120000. + */ +#define CONFIG_SYS_FMAN_FW_ADDR 0x120000 +#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000 +#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH) + +#define CONFIG_PHYLIB_10G + +#define CONFIG_PCI_INDIRECT_BRIDGE + +#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ + +/* RGMII (FM1@DTESC5) is used as debug itf, it's the only one configured */ +#define CONFIG_SYS_FM1_DTSEC5_PHY_ADDR 0x11 +#define CONFIG_SYS_TBIPA_VALUE 8 +#define CONFIG_ETHPRIME "FM1@DTSEC5" + +/* + * Environment + */ +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +/* + * Hardware Watchdog + */ +#define CONFIG_WATCHDOG /* enable CPU watchdog */ +#define CONFIG_WATCHDOG_PRESC 34 /* wdog prescaler 2^(64-34) (~10min) */ +#define CONFIG_WATCHDOG_RC WRC_CHIP /* reset chip on watchdog event */ + +/* + * additionnal command line configuration. + */ + +/* we don't need flash support */ +#undef CONFIG_JFFS2_CMDLINE + +/* + * For booting Linux, the board info and command line data + * have to be in the first 64 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory for Linux */ +#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ + +#ifdef CONFIG_CMD_KGDB +#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ +#endif + +#define __USB_PHY_TYPE utmi +#define CONFIG_USB_EHCI_FSL + +/* + * Environment Configuration + */ +#define CONFIG_ENV_OVERWRITE +#ifndef CONFIG_KM_DEF_ENV /* if not set by keymile-common.h */ +#define CONFIG_KM_DEF_ENV "km-common=empty\0" +#endif + +/* architecture specific default bootargs */ +#define CONFIG_KM_DEF_BOOT_ARGS_CPU "" + +/* FIXME: FDT_ADDR is unspecified */ +#define CONFIG_KM_DEF_ENV_CPU \ + "boot=bootm ${load_addr_r} - ${fdt_addr_r}\0" \ + "cramfsloadfdt=" \ + "cramfsload ${fdt_addr_r} " \ + "fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb\0" \ + "fdt_addr_r=" __stringify(CONFIG_KM_FDT_ADDR) "\0" \ + "u-boot=" CONFIG_HOSTNAME "/u-boot.pbl\0" \ + "update=" \ + "sf probe 0;sf erase 0 +${filesize};" \ + "sf write ${load_addr_r} 0 ${filesize};\0" \ + "set_fdthigh=true\0" \ + "checkfdt=true\0" \ + "" + +#define CONFIG_HW_ENV_SETTINGS \ + "hwconfig=fsl_ddr:ctlr_intlv=cacheline\0" \ + "usb_phy_type=" __stringify(__USB_PHY_TYPE) "\0" \ + "usb_dr_mode=host\0" + +#define CONFIG_KM_NEW_ENV \ + "newenv=sf probe 0;" \ + "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ + __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" + +/* ppc_82xx is the equivalent to ppc_6xx, the generic ppc toolchain */ +#ifndef CONFIG_KM_DEF_ARCH +#define CONFIG_KM_DEF_ARCH "arch=ppc_82xx\0" +#endif + +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_KM_DEF_ENV \ + CONFIG_KM_DEF_ARCH \ + CONFIG_KM_NEW_ENV \ + CONFIG_HW_ENV_SETTINGS \ + "EEprom_ivm=pca9547:70:9\0" \ + "" + /* App2 Local bus */ #define CONFIG_SYS_LBAPP2_BASE 0xE0000000 #define CONFIG_SYS_LBAPP2_BASE_PHYS 0xFE0000000ull diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 5234600ea0..91067df5b3 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -948,7 +948,6 @@ CONFIG_KIRKWOOD_RGMII_PAD_1V8 CONFIG_KIRQ_EN CONFIG_KM8321 CONFIG_KMCOGE4 -CONFIG_KMLION1 CONFIG_KMP204X CONFIG_KMTEGR1 CONFIG_KM_BOARD_EXTRA_ENV
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Pascal Linder