[PATCH 01/13] Convert CONFIG_DW_ALTDESCRIPTOR to Kconfig
This converts the following to Kconfig: CONFIG_DW_ALTDESCRIPTOR
Signed-off-by: Tom Rini trini@konsulko.com --- configs/galileo_defconfig | 1 + configs/stm32746g-eval_defconfig | 1 + configs/stm32746g-eval_spl_defconfig | 1 + configs/stm32f746-disco_defconfig | 1 + configs/stm32f746-disco_spl_defconfig | 1 + configs/stm32f769-disco_defconfig | 1 + configs/stm32f769-disco_spl_defconfig | 1 + configs/stv0991_defconfig | 1 + drivers/net/Kconfig | 5 +++++ include/configs/galileo.h | 3 --- include/configs/socfpga_common.h | 7 ------- include/configs/socfpga_soc64_common.h | 5 ----- include/configs/stm32f746-disco.h | 1 - include/configs/stv0991.h | 4 ---- 14 files changed, 13 insertions(+), 20 deletions(-)
diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 104532bd05f3..5ae13d5a1e2b 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -49,6 +49,7 @@ CONFIG_TFTP_TSIZE=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CPU=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_SPI=y CONFIG_USB_STORAGE=y CONFIG_USB_KEYBOARD=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 8ca8929f2a4f..64610658c7bd 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 55e44f863c1c..753a4b80cbbc 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 22274f99b185..e3f80ab8e206 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index c174984b939d..927d28dd9733 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 9845eb0a10b2..b7e9ee92a7e1 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -47,6 +47,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPI=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index a5dc89c80273..bae28b4ec132 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -68,6 +68,7 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHY_SMSC=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y # CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index d03d984871ab..2c143068b79e 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -37,6 +37,7 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y CONFIG_PHY_RESET_DELAY=10000 CONFIG_ETH_DESIGNWARE=y +CONFIG_DW_ALTDESCRIPTOR=y CONFIG_MII=y CONFIG_CADENCE_QSPI=y CONFIG_HAS_CQSPI_REF_CLK=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 56f9416a48db..40b5c8274e9e 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -312,6 +312,7 @@ config ETH_DESIGNWARE_MESON8B config ETH_DESIGNWARE_SOCFPGA select REGMAP select SYSCON + select DW_ALTDESCRIPTOR bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" depends on DM_ETH && ETH_DESIGNWARE help @@ -326,6 +327,10 @@ config ETH_DESIGNWARE_S700 This provides glue layer to use Synopsys Designware Ethernet MAC present on Actions S700 SoC.
+config DW_ALTDESCRIPTOR + bool "Designware Ethernet MAC uses alternate (enhanced) descriptors" + depends on ETH_DESIGNWARE + config ETHOC bool "OpenCores 10/100 Mbps Ethernet MAC" help diff --git a/include/configs/galileo.h b/include/configs/galileo.h index c50ecf27e44c..49f57dda58fb 100644 --- a/include/configs/galileo.h +++ b/include/configs/galileo.h @@ -21,9 +21,6 @@ "stdout=serial\0" \ "stderr=serial\0"
-/* 10/100M Ethernet support */ -#define CONFIG_DW_ALTDESCRIPTOR - /* Environment configuration */
#endif /* __CONFIG_H */ diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 10ba2d22ffa7..d1efba29fc40 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -51,13 +51,6 @@ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS
-/* - * Ethernet on SoC (EMAC) - */ -#ifdef CONFIG_CMD_NET -#define CONFIG_DW_ALTDESCRIPTOR -#endif - /* * L4 OSC1 Timer 0 */ diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c388ae9a816c..c1037ab595fa 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -89,11 +89,6 @@ * Flash configurations */
-/* Ethernet on SoC (EMAC) */ -#if defined(CONFIG_CMD_NET) -#define CONFIG_DW_ALTDESCRIPTOR -#endif /* CONFIG_CMD_NET */ - /* * L4 Watchdog */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 05ac900f3c31..73376f16b4d6 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -21,7 +21,6 @@ #define CONFIG_SYS_MAX_FLASH_SECT 8
#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) -#define CONFIG_DW_ALTDESCRIPTOR
#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
diff --git a/include/configs/stv0991.h b/include/configs/stv0991.h index c57b1ad8a062..567aa1ffe433 100644 --- a/include/configs/stv0991.h +++ b/include/configs/stv0991.h @@ -20,10 +20,6 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 /* U-Boot Load Address */
-/* GMAC related configs */ - -#define CONFIG_DW_ALTDESCRIPTOR - /* Misc configuration */
#endif /* __CONFIG_H */
This value is always used at the default, rename it for now. This likely should come from the device tree if non-default, moving forward.
Signed-off-by: Tom Rini trini@konsulko.com --- drivers/net/designware.h | 8 +++----- include/configs/stm32f746-disco.h | 2 -- 2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/net/designware.h b/drivers/net/designware.h index a82afb99cabd..281c14f03ffb 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -85,10 +85,8 @@ struct eth_dma_regs {
#define DW_DMA_BASE_OFFSET (0x1000)
-/* Default DMA Burst length */ -#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL -#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8 -#endif +/* DMA Burst length */ +#define GMAC_DEFAULT_DMA_PBL 8
/* Bus mode register definitions */ #define FIXEDBURST (1 << 16) @@ -96,7 +94,7 @@ struct eth_dma_regs { #define PRIORXTX_31 (2 << 14) #define PRIORXTX_21 (1 << 14) #define PRIORXTX_11 (0 << 14) -#define DMA_PBL (CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8) +#define DMA_PBL (GMAC_DEFAULT_DMA_PBL << 8) #define RXHIGHPRIO (1 << 1) #define DMAMAC_SRST (1 << 0)
diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index 73376f16b4d6..df05ee4892a5 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -20,8 +20,6 @@
#define CONFIG_SYS_MAX_FLASH_SECT 8
-#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8) - #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
#define BOOT_TARGET_DEVICES(func) \
This converts the following to Kconfig: CONFIG_ENABLE_36BIT_PHYS
Signed-off-by: Tom Rini trini@konsulko.com --- arch/powerpc/cpu/mpc85xx/Kconfig | 3 +++ configs/MPC8548CDS_36BIT_defconfig | 1 + configs/MPC8548CDS_defconfig | 1 + configs/MPC8548CDS_legacy_defconfig | 1 + configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P2041RDB_NAND_defconfig | 1 + configs/P2041RDB_SDCARD_defconfig | 1 + configs/P2041RDB_SPIFLASH_defconfig | 1 + configs/P2041RDB_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + configs/T1024RDB_NAND_defconfig | 1 + configs/T1024RDB_SDCARD_defconfig | 1 + configs/T1024RDB_SPIFLASH_defconfig | 1 + configs/T1024RDB_defconfig | 1 + configs/T1042D4RDB_NAND_defconfig | 1 + configs/T1042D4RDB_SDCARD_defconfig | 1 + configs/T1042D4RDB_SPIFLASH_defconfig | 1 + configs/T1042D4RDB_defconfig | 1 + configs/T2080QDS_NAND_defconfig | 1 + configs/T2080QDS_SDCARD_defconfig | 1 + configs/T2080QDS_SECURE_BOOT_defconfig | 1 + configs/T2080QDS_SPIFLASH_defconfig | 1 + configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 + configs/T2080QDS_defconfig | 1 + configs/T2080RDB_NAND_defconfig | 1 + configs/T2080RDB_SDCARD_defconfig | 1 + configs/T2080RDB_SPIFLASH_defconfig | 1 + configs/T2080RDB_defconfig | 1 + configs/T2080RDB_revD_NAND_defconfig | 1 + configs/T2080RDB_revD_SDCARD_defconfig | 1 + configs/T2080RDB_revD_SPIFLASH_defconfig | 1 + configs/T2080RDB_revD_defconfig | 1 + configs/T4240RDB_SDCARD_defconfig | 1 + configs/T4240RDB_defconfig | 1 + configs/kmcent2_defconfig | 1 + configs/qemu-ppce500_defconfig | 1 + configs/socrates_defconfig | 1 + include/configs/MPC8548CDS.h | 1 - include/configs/P1010RDB.h | 3 --- include/configs/P2041RDB.h | 2 -- include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 2 -- include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 2 -- include/configs/corenet_ds.h | 2 -- include/configs/kmcent2.h | 2 -- include/configs/p1_p2_rdb_pc.h | 2 -- include/configs/qemu-ppce500.h | 2 -- include/configs/socrates.h | 1 - 95 files changed, 84 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 02efa1c60301..5510bc728788 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -1185,6 +1185,9 @@ config SYS_FSL_LBC_CLK_DIV Defines divider of platform clock(clock input to eLBC controller).
+config ENABLE_36BIT_PHYS + bool "Enable 36bit physical address space support" + config SYS_MPC85XX_NO_RESETVEC bool "Discard resetvec section and move bootpg section up" depends on MPC85xx diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index f2dd5d3f8cf6..14eeef936ebf 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_PHYS_64BIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 55acf63ae1db..04f086e2d438 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DYNAMIC_SYS_CLK_FREQ=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index 4bd0b1a27b77..874de6aeb2e3 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_MPC8548CDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_TARGET_MPC8548CDS_LEGACY=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 8af653c65661..3d25bb18e461 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 6783f1ffb35e..71368c2a99e1 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 40dd02cf8f9c..f7c028c68b2a 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 30998e8ac72e..3f8b257094dc 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index f94b24d3bdc7..471ec321c20e 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index a31b2c2f0d7c..592a1c2dfad9 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 5ad69a1e633b..033461507ad0 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 4b3ac2403f6b..2dcdc6ab42a8 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PA=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index d5577435c922..c86fedaf7cc9 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 505c168c97a6..25e986685eda 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index d2c99053d781..1843543db61a 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 62d36584610f..bdb178bb868d 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 3469ea0f40da..036d9a132ba4 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index b4b145377679..c9392e95ff9b 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 30a1f2436b04..5a392bf17012 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 74c280c1b453..079b4d3df710 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB_PB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 19d1718830e5..3ed503f31e26 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 95720881f35f..21493d433664 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index cc0b44d9e77f..89648f9b1cb8 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 27e23447393f..9487256cfb11 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 19f4e1cbcb33..ae1a4e06fc47 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 970ec83a81d2..15d4e470e038 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 199d7ba87756..2493c77dfb89 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index f7d693fa66b3..944a692a438b 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PC=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index d10d6e802c8a..7084c9ef1767 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index a5c1fce82a47..5caf1759c0fa 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 2f57f51ad7b2..d2fa3e6f723a 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 01290b3a7b0a..d6bafd1543c0 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P1020RDB_PD=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 6a6a2bbf6ea6..bb68858ff3e1 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 0706350fa7f5..743f488bb1f9 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index bca22f947b18..8fa421b3e8c7 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index a88eb2e81831..2b16989d1b73 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_PHYS_64BIT=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 095812ea8b89..1712f6061df5 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_TPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 8b4bcf920b9b..67d9adc2299b 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 208e09b4568f..281c619a5dd4 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_SPI=y CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 11e1fcfc8bac..594d6a8d4aa6 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -10,6 +10,7 @@ CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_P2020RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 193e47174782..53d97d9316a0 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 4a97e85d11ba..a54f35a65923 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 3a19e4d09d25..76cabd3de02d 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 5dddbda5c962..e6df3c8fa021 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index d9bc80328b87..6da4e06ff90a 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index e0e65eef68a1..828896290e7f 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 761a9021b8cc..ea2e1ebe9a12 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 6798c1dde481..627795235b1c 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index dde3351aa208..867f8aace4c6 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 1db447178c3d..59984c916bce 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 9eb49bf2f23b..2733bb2cad98 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 75b9c9674816..e7f9755efb87 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 015feac4e7f3..32c1065c879c 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 7aa076926622..054f43e4c369 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -8,6 +8,7 @@ CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 8d5f1076e217..44abf8ff1063 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 45e82eb33bc9..71cd09374201 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index f0af5c761bf2..2a5e232f487b 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -13,6 +13,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 9095d36cd3d5..1bd06cc0656f 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index a88b6a323433..adfad9839aa0 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T1024RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 585581030b20..af88d5ab2aa9 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -11,6 +11,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 1f3835c200f2..4c9edecd5b73 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -12,6 +12,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index d1bee97c3fdb..ca44d8692fc8 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index ae2f00587e64..7160e052f37c 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T1042D4RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 1e0e2a4e73c4..caf3a3c95a44 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index bfb973a829ae..49f0481b3dfc 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 8c2714ed36f6..d6435e7bcbbf 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_FSL_QIXIS=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index d2801b541c33..95f9520c68fb 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 362d9fd6f56e..a39587d3c7cb 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -13,6 +13,7 @@ CONFIG_ENV_ADDR=0xFFE20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SRIO_PCIE_BOOT_SLAVE=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index e2b3ee11752d..aa6d5596c7d2 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -14,6 +14,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080QDS=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 2c0f32fe4172..5ceaaa0413a5 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 5e8ada86b1bf..c75761aca2b4 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index e21d6cfb096b..3ad98dd0a0b3 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index 0e001e2038c5..e43168ea4de0 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 CONFIG_MP=y diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig index 0bd75e3917f8..a7283455ed0f 100644 --- a/configs/T2080RDB_revD_NAND_defconfig +++ b/configs/T2080RDB_revD_NAND_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig index b54a9d5572af..60e4a9b93044 100644 --- a/configs/T2080RDB_revD_SDCARD_defconfig +++ b/configs/T2080RDB_revD_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig index 0235318e4939..88c8226c69f5 100644 --- a/configs/T2080RDB_revD_SPIFLASH_defconfig +++ b/configs/T2080RDB_revD_SPIFLASH_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig index ef87c2ebafa2..1af317aa4bf9 100644 --- a/configs/T2080RDB_revD_defconfig +++ b/configs/T2080RDB_revD_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T2080RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_T2080RDB_REV_D=y CONFIG_SYS_MEMTEST_START=0x00200000 CONFIG_SYS_MEMTEST_END=0x00400000 diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index f4580eeb06a1..495b53dfa8dc 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -16,6 +16,7 @@ CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_MP=y CONFIG_FIT=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 01236eddcd2d..e5355eb7ae13 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -11,6 +11,7 @@ CONFIG_ENV_ADDR=0xEFF20000 CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_MP=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index 17e899a91967..8540923f8911 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_ADDR=0xebf20000 CONFIG_MPC85xx=y CONFIG_TARGET_KMCENT2=y CONFIG_MPC85XX_HAVE_RESET_VECTOR=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_KM_DEF_NETDEV="eth2" CONFIG_KM_IVM_BUS=2 CONFIG_MP=y diff --git a/configs/qemu-ppce500_defconfig b/configs/qemu-ppce500_defconfig index 7d35d058a7df..dca6a6135384 100644 --- a/configs/qemu-ppce500_defconfig +++ b/configs/qemu-ppce500_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_CLK_FREQ=33000000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_QEMU_PPCE500=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_SYS_MPC85XX_NO_RESETVEC=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index d902019d6cd1..28ea447ec55f 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_ADDR=0xFFF40000 CONFIG_MPC85xx=y # CONFIG_CMD_ERRATA is not set CONFIG_TARGET_SOCRATES=y +CONFIG_ENABLE_36BIT_PHYS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index d8ffa2e28a97..5fba5bb198dd 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -34,7 +34,6 @@ /* * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_ENABLE_36BIT_PHYS 1
#define CONFIG_SYS_CCSRBAR 0xe0000000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index ad78dba865b7..53c719807d6c 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -108,9 +108,6 @@ */ #define CONFIG_L2_CACHE /* toggle L2 cache */
- -#define CONFIG_ENABLE_36BIT_PHYS - /* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SPD_BUS_NUM 1 diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index df16319de4a9..8e5d18f6cca4 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -58,8 +58,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
/* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index bd458ff35e9a..3f32354038e3 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -15,7 +15,6 @@
/* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 505bae931e6b..bda252486213 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -83,8 +83,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif
-#define CONFIG_ENABLE_36BIT_PHYS - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2db2b07fb4b7..0c13550ef234 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -22,7 +22,6 @@
/* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 07e1108f0f04..5fb768ab92fc 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -17,7 +17,6 @@
/* High Level Configuration Options */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ -#define CONFIG_ENABLE_36BIT_PHYS
#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ #define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 526d40fa0349..6f5b75942993 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -56,8 +56,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif
-#define CONFIG_ENABLE_36BIT_PHYS - /* * Config the L3 Cache as L3 SRAM */ diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index f563a5f38162..034cd00381ef 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -62,8 +62,6 @@ #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif
-#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_POST CONFIG_SYS_POST_MEMORY /* test POST memory test */
/* diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 4de5736d8ce6..798688a220ba 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -152,8 +152,6 @@ #define CONFIG_SYS_CACHE_STASHING #define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
-#define CONFIG_ENABLE_36BIT_PHYS - /* POST memory regions test */ #define CONFIG_POST CONFIG_SYS_POST_MEM_REGIONS
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 786b9812072a..d368e90fb2bd 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -111,8 +111,6 @@ */ #define CONFIG_L2_CACHE
-#define CONFIG_ENABLE_36BIT_PHYS - #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h index c3fef0de173b..006593acfddd 100644 --- a/include/configs/qemu-ppce500.h +++ b/include/configs/qemu-ppce500.h @@ -11,8 +11,6 @@
#define CONFIG_SYS_RAMBOOT
-#define CONFIG_ENABLE_36BIT_PHYS - /* Needed to fill the ccsrbar pointer */
/* Virtual address to CCSRBAR */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 3309779118a3..73f82fc00aca 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -22,7 +22,6 @@ /* * Only possible on E500 Version 2 or newer cores. */ -#define CONFIG_ENABLE_36BIT_PHYS 1
/* * sysclk for MPC85xx
As this driver can dynamically determine the values set in CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong tien.fong.chee@intel.com Cc: Chin-Liang See chin.liang.see@intel.com Cc: Dinh Nguyen dinh.nguyen@intel.com Cc: Holger Brunck holger.brunck@hitachienergy.com Cc: Ley Foon Tan ley.foon.tan@intel.com Cc: Marek Vasut marex@denx.de Cc: Siew Chin Lim elly.siew.chin.lim@intel.com Cc: Stefan Roese sr@denx.de Cc: hee Hong Ang chee.hong.ang@intel.com Signed-off-by: Tom Rini trini@konsulko.com --- drivers/watchdog/Kconfig | 4 ++-- drivers/watchdog/designware_wdt.c | 21 --------------------- include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - 4 files changed, 2 insertions(+), 25 deletions(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c3eb8a8aec1b..532ada89c1b2 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -64,8 +64,8 @@ config ULP_WATCHDOG
config DESIGNWARE_WATCHDOG bool "Designware watchdog timer support" - select HW_WATCHDOG if !WDT - default y if WDT && ROCKCHIP_RK3399 + depends on WDT + default y if ROCKCHIP_RK3399 help Enable this to support Designware Watchdog Timer IP, present e.g. on Altera SoCFPGA SoCs. diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index cfec29bd158c..cad756aeaf20 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base) writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR); }
-#if !CONFIG_IS_ENABLED(WDT) -void hw_watchdog_reset(void) -{ - designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE); -} - -void hw_watchdog_init(void) -{ - /* reset to disable the watchdog */ - hw_watchdog_reset(); - /* set timer in miliseconds */ - designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE, - CONFIG_DW_WDT_CLOCK_KHZ, - CONFIG_WATCHDOG_TIMEOUT_MSECS); - /* enable the watchdog */ - designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE); - /* reset the watchdog */ - hw_watchdog_reset(); -} -#else static int designware_wdt_reset(struct udevice *dev) { struct designware_wdt_priv *priv = dev_get_priv(dev); @@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = { .ops = &designware_wdt_ops, .flags = DM_FLAG_PRE_RELOC, }; -#endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1efba29fc40..4a7da76e51e6 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -66,7 +66,6 @@ /* * L4 Watchdog */ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000
/* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c1037ab595fa..a3e8d5492919 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -92,7 +92,6 @@ /* * L4 Watchdog */ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ unsigned int cm_get_l4_sys_free_clk_hz(void);
On 15.06.22 18:03, Tom Rini wrote:
As this driver can dynamically determine the values set in CONFIG_DW_WDT_BASE when using WDT, so make this depend on WDT rather than migrate CONFIG_DW_WDT_BASE to Kconfig.
Cc: Chee Tien Fong tien.fong.chee@intel.com Cc: Chin-Liang See chin.liang.see@intel.com Cc: Dinh Nguyen dinh.nguyen@intel.com Cc: Holger Brunck holger.brunck@hitachienergy.com Cc: Ley Foon Tan ley.foon.tan@intel.com Cc: Marek Vasut marex@denx.de Cc: Siew Chin Lim elly.siew.chin.lim@intel.com Cc: Stefan Roese sr@denx.de Cc: hee Hong Ang chee.hong.ang@intel.com Signed-off-by: Tom Rini trini@konsulko.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
drivers/watchdog/Kconfig | 4 ++-- drivers/watchdog/designware_wdt.c | 21 --------------------- include/configs/socfpga_common.h | 1 - include/configs/socfpga_soc64_common.h | 1 - 4 files changed, 2 insertions(+), 25 deletions(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index c3eb8a8aec1b..532ada89c1b2 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -64,8 +64,8 @@ config ULP_WATCHDOG
config DESIGNWARE_WATCHDOG bool "Designware watchdog timer support"
- select HW_WATCHDOG if !WDT
- default y if WDT && ROCKCHIP_RK3399
- depends on WDT
- default y if ROCKCHIP_RK3399 help Enable this to support Designware Watchdog Timer IP, present e.g. on Altera SoCFPGA SoCs.
diff --git a/drivers/watchdog/designware_wdt.c b/drivers/watchdog/designware_wdt.c index cfec29bd158c..cad756aeaf20 100644 --- a/drivers/watchdog/designware_wdt.c +++ b/drivers/watchdog/designware_wdt.c @@ -60,26 +60,6 @@ static void designware_wdt_reset_common(void __iomem *base) writel(DW_WDT_CRR_RESTART_VAL, base + DW_WDT_CRR); }
-#if !CONFIG_IS_ENABLED(WDT) -void hw_watchdog_reset(void) -{
- designware_wdt_reset_common((void __iomem *)CONFIG_DW_WDT_BASE);
-}
-void hw_watchdog_init(void) -{
- /* reset to disable the watchdog */
- hw_watchdog_reset();
- /* set timer in miliseconds */
- designware_wdt_settimeout((void __iomem *)CONFIG_DW_WDT_BASE,
CONFIG_DW_WDT_CLOCK_KHZ,CONFIG_WATCHDOG_TIMEOUT_MSECS);- /* enable the watchdog */
- designware_wdt_enable((void __iomem *)CONFIG_DW_WDT_BASE);
- /* reset the watchdog */
- hw_watchdog_reset();
-} -#else static int designware_wdt_reset(struct udevice *dev) { struct designware_wdt_priv *priv = dev_get_priv(dev); @@ -195,4 +175,3 @@ U_BOOT_DRIVER(designware_wdt) = { .ops = &designware_wdt_ops, .flags = DM_FLAG_PRE_RELOC, }; -#endif diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d1efba29fc40..4a7da76e51e6 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -66,7 +66,6 @@ /*
- L4 Watchdog
*/ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #define CONFIG_DW_WDT_CLOCK_KHZ 25000
/* diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h index c1037ab595fa..a3e8d5492919 100644 --- a/include/configs/socfpga_soc64_common.h +++ b/include/configs/socfpga_soc64_common.h @@ -92,7 +92,6 @@ /*
- L4 Watchdog
*/ -#define CONFIG_DW_WDT_BASE SOCFPGA_L4WD0_ADDRESS #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10 #ifndef __ASSEMBLY__ unsigned int cm_get_l4_sys_free_clk_hz(void);
Viele Grüße, Stefan Roese
- Drop the emulator CONFIG test from include/configs/ls1088ardb.h - Migrate CONFIG_SYS_FSL_DDR_EMU to a select'able option in drivers/ddr/fsl/Kconfig
Signed-off-by: Tom Rini trini@konsulko.com --- README | 4 ---- drivers/ddr/fsl/Kconfig | 6 ++++++ include/configs/ls1088ardb.h | 4 ---- 3 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/README b/README index 6a4db9dc5617..017dc2c61da0 100644 --- a/README +++ b/README @@ -388,10 +388,6 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR_ADDR Freescale DDR memory-mapped register base.
- CONFIG_SYS_FSL_DDR_EMU - Specify emulator support for DDR. Some DDR features such as - deskew training are not available. - CONFIG_SYS_FSL_DDRC_GEN1 Freescale DDR1 controller.
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index fe69bef3d3ae..6a29b23bab7e 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -10,6 +10,12 @@ config SYS_FSL_MMDC help Select Freescale Multi Mode DDR controller (MMDC).
+config SYS_FSL_DDR_EMU + bool + help + Specify emulator support for DDR. Some DDR features such as deskew + training are not available. + if SYS_FSL_DDR || SYS_FSL_MMDC
config SYS_FSL_DDR_BE diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index c69003018bfc..aeadf534bc32 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -15,11 +15,7 @@
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
-#ifdef CONFIG_EMU -#define CONFIG_SYS_FSL_DDR_EMU -#else #define CONFIG_MEM_INIT_VALUE 0xdeadbeef -#endif #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
There are a few options we test and set and then never reference, remove them.
Signed-off-by: Tom Rini trini@konsulko.com --- include/configs/smdkc100.h | 10 ---------- 1 file changed, 10 deletions(-)
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index a7b0ce9f975a..5edf6f607270 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -89,16 +89,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */
-#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) -#define CONFIG_ENABLE_MMU -#endif - -#ifdef CONFIG_ENABLE_MMU -#define CONFIG_SYS_MAPPED_RAM_BASE 0xc0000000 -#else -#define CONFIG_SYS_MAPPED_RAM_BASE CONFIG_SYS_SDRAM_BASE -#endif - /*----------------------------------------------------------------------- * Boot configuration */
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new symbol.
Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/cpu/armv7/s5p-common/Makefile | 3 +-- board/friendlyarm/Kconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/pwm/Kconfig | 5 +++++ include/configs/exynos-common.h | 3 --- include/configs/s5p_goni.h | 3 --- include/configs/smdkc100.h | 3 --- 8 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index bfe02389cd94..0985420fe5c8 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -3,14 +3,13 @@ # Copyright (C) 2009 Samsung Electronics # Minkyu Kang mk7.kang@samsung.com
+obj-$(CONFIG_PWM_S5P) += pwm.o ifdef CONFIG_ARCH_NEXELL -obj-$(CONFIG_PWM_NX) += pwm.o obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o else obj-y += cpu_info.o ifndef CONFIG_SPL_BUILD obj-y += timer.o obj-y += sromc.o -obj-$(CONFIG_PWM) += pwm.o endif endif diff --git a/board/friendlyarm/Kconfig b/board/friendlyarm/Kconfig index f8f9cfd879a8..fa04727a6a2b 100644 --- a/board/friendlyarm/Kconfig +++ b/board/friendlyarm/Kconfig @@ -11,6 +11,7 @@ config S5P4418_ONEWIRE
config PWM_NX bool "PWM" + select PWM_S5P help This enables LCD-Backlight control via PWM. endchoice diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index a0104044a85f..4d4005de1a48 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_PWM_S5P=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 2c8bd1c8ee27..8c89c39c9e2f 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -38,3 +38,4 @@ CONFIG_ENV_IS_IN_ONENAND=y CONFIG_MTD=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 +CONFIG_PWM_S5P=y diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index cb54e67faebf..8fd5a2e20519 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -84,6 +84,11 @@ config PWM_SANDBOX useful. The PWM can be enabled but is not connected to any outputs so this is not very useful.
+config PWM_S5P + bool "Enable non-DM support for S5P PWM" + depends on (S5P || ARCH_NEXELL) + default y + config PWM_SIFIVE bool "Enable support for SiFive PWM" depends on DM_PWM diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 79860212f403..246aa9b7ab99 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -18,9 +18,6 @@
/* select serial console configuration */
-/* PWM */ -#define CONFIG_PWM - /* Miscellaneous configurable options */
#endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8b7e2e5dc9e9..d9eeec48a0dd 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -21,9 +21,6 @@ /* MMC */ #define SDHCI_MAX_HOSTS 4
-/* PWM */ -#define CONFIG_PWM 1 - /* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 5edf6f607270..995623e9a6fe 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -24,9 +24,6 @@ * select serial console configuration */
-/* PWM */ -#define CONFIG_PWM 1 - #define COMMON_BOOT "console=ttySAC0,115200n8" \ " mem=128M " \ " " CONFIG_MTDPARTS_DEFAULT
On 6/16/22 01:03, Tom Rini wrote:
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new symbol.
Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Minkyu Kang mk7.kang@samsung.com Signed-off-by: Tom Rini trini@konsulko.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
arch/arm/cpu/armv7/s5p-common/Makefile | 3 +-- board/friendlyarm/Kconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/pwm/Kconfig | 5 +++++ include/configs/exynos-common.h | 3 --- include/configs/s5p_goni.h | 3 --- include/configs/smdkc100.h | 3 --- 8 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/s5p-common/Makefile b/arch/arm/cpu/armv7/s5p-common/Makefile index bfe02389cd94..0985420fe5c8 100644 --- a/arch/arm/cpu/armv7/s5p-common/Makefile +++ b/arch/arm/cpu/armv7/s5p-common/Makefile @@ -3,14 +3,13 @@ # Copyright (C) 2009 Samsung Electronics # Minkyu Kang mk7.kang@samsung.com
+obj-$(CONFIG_PWM_S5P) += pwm.o ifdef CONFIG_ARCH_NEXELL -obj-$(CONFIG_PWM_NX) += pwm.o obj-$(CONFIG_S5P4418_ONEWIRE) += pwm.o else obj-y += cpu_info.o ifndef CONFIG_SPL_BUILD obj-y += timer.o obj-y += sromc.o -obj-$(CONFIG_PWM) += pwm.o endif endif diff --git a/board/friendlyarm/Kconfig b/board/friendlyarm/Kconfig index f8f9cfd879a8..fa04727a6a2b 100644 --- a/board/friendlyarm/Kconfig +++ b/board/friendlyarm/Kconfig @@ -11,6 +11,7 @@ config S5P4418_ONEWIRE
config PWM_NX bool "PWM"
- select PWM_S5P help This enables LCD-Backlight control via PWM.
endchoice diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index a0104044a85f..4d4005de1a48 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -52,6 +52,7 @@ CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y +CONFIG_PWM_S5P=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_MANUFACTURER="Samsung" diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 2c8bd1c8ee27..8c89c39c9e2f 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -38,3 +38,4 @@ CONFIG_ENV_IS_IN_ONENAND=y CONFIG_MTD=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 +CONFIG_PWM_S5P=y diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig index cb54e67faebf..8fd5a2e20519 100644 --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig @@ -84,6 +84,11 @@ config PWM_SANDBOX useful. The PWM can be enabled but is not connected to any outputs so this is not very useful.
+config PWM_S5P
- bool "Enable non-DM support for S5P PWM"
- depends on (S5P || ARCH_NEXELL)
- default y
config PWM_SIFIVE bool "Enable support for SiFive PWM" depends on DM_PWM diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index 79860212f403..246aa9b7ab99 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -18,9 +18,6 @@
/* select serial console configuration */
-/* PWM */ -#define CONFIG_PWM
/* Miscellaneous configurable options */
#endif /* __CONFIG_H */ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8b7e2e5dc9e9..d9eeec48a0dd 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -21,9 +21,6 @@ /* MMC */ #define SDHCI_MAX_HOSTS 4
-/* PWM */ -#define CONFIG_PWM 1
/* USB Composite download gadget - g_dnl */ #define DFU_DEFAULT_POLL_TIMEOUT 300
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 5edf6f607270..995623e9a6fe 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -24,9 +24,6 @@
- select serial console configuration
*/
-/* PWM */ -#define CONFIG_PWM 1
#define COMMON_BOOT "console=ttySAC0,115200n8" \ " mem=128M " \ " " CONFIG_MTDPARTS_DEFAULT
This converts the following to Kconfig: CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini trini@konsulko.com --- configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/mtd/Kconfig | 3 +++ include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 7 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 4d4005de1a48..b5f3ae26b673 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_I2C_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_PWM_S5P=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index af7fef58a601..a66ae7dec9b6 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_SOFT_SPI=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 8c89c39c9e2f..5f2ab44d4042 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_ONENAND=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 CONFIG_PWM_S5P=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d0ab7c18c649..3d1f6e43fd52 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -168,6 +168,9 @@ config STM32_FLASH This is the driver of embedded flash for some STMicroelectronics STM32 MCU.
+config SAMSUNG_ONENAND + bool "Samsung OneNAND driver support" + config USE_SYS_MAX_FLASH_BANKS bool "Enable Max number of Flash memory banks" help diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d9eeec48a0dd..ed4f55a4323d 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -127,7 +127,6 @@ #define CONFIG_MMC_DEFAULT_DEV 0
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xB0000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ab4fe6b46024..cbc941afb9dd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -88,7 +88,6 @@ "opts=always_resume=1"
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND #define CONFIG_SYS_ONENAND_BASE 0x0C000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 995623e9a6fe..4199f2bc8e61 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -91,7 +91,6 @@ */
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xE7100000
/*
On 6/16/22 01:03, Tom Rini wrote:
This converts the following to Kconfig: CONFIG_SAMSUNG_ONENAND
Signed-off-by: Tom Rini trini@konsulko.com
Reviewed-by: Jaehoon Chung jh80.chung@samsung.com
Best Regards, Jaehoon Chung
configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/smdkc100_defconfig | 1 + drivers/mtd/Kconfig | 3 +++ include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 7 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 4d4005de1a48..b5f3ae26b673 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -50,6 +50,7 @@ CONFIG_DM_I2C_GPIO=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_PWM_S5P=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index af7fef58a601..a66ae7dec9b6 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -49,6 +49,7 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_S5P=y CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX8998=y CONFIG_SOFT_SPI=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 8c89c39c9e2f..5f2ab44d4042 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_ONENAND=y # CONFIG_MMC is not set CONFIG_MTD=y +CONFIG_SAMSUNG_ONENAND=y CONFIG_SMC911X=y CONFIG_SMC911X_BASE=0x98800300 CONFIG_PWM_S5P=y diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index d0ab7c18c649..3d1f6e43fd52 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -168,6 +168,9 @@ config STM32_FLASH This is the driver of embedded flash for some STMicroelectronics STM32 MCU.
+config SAMSUNG_ONENAND
- bool "Samsung OneNAND driver support"
config USE_SYS_MAX_FLASH_BANKS bool "Enable Max number of Flash memory banks" help diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d9eeec48a0dd..ed4f55a4323d 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -127,7 +127,6 @@ #define CONFIG_MMC_DEFAULT_DEV 0
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xB0000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index ab4fe6b46024..cbc941afb9dd 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -88,7 +88,6 @@ "opts=always_resume=1"
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND #define CONFIG_SYS_ONENAND_BASE 0x0C000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 995623e9a6fe..4199f2bc8e61 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -91,7 +91,6 @@ */
#define CONFIG_USE_ONENAND_BOARD_INIT -#define CONFIG_SAMSUNG_ONENAND 1 #define CONFIG_SYS_ONENAND_BASE 0xE7100000
/*
This converts the following to Kconfig: CONFIG_USE_ONENAND_BOARD_INIT
Signed-off-by: Tom Rini trini@konsulko.com --- cmd/Kconfig | 4 ++++ configs/igep00x0_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/smdkc100_defconfig | 1 + include/configs/omap3_igep00x0.h | 1 - include/configs/s5p_goni.h | 1 - include/configs/s5pc210_universal.h | 1 - include/configs/smdkc100.h | 1 - 8 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/cmd/Kconfig b/cmd/Kconfig index 44d7b62e4fb5..20c84a3c81d9 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1293,6 +1293,10 @@ config CMD_ONENAND and erasing blocks. It allso provides a way to show and change bad blocks, and test the device.
+config USE_ONENAND_BOARD_INIT + bool "Call onenand_board_init() in the onenand command" + depends on CMD_ONENAND + config CMD_OSD bool "osd" help diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 00f0a670c2b4..17c97ac27f79 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -52,6 +52,7 @@ CONFIG_CMD_SPL=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_NAND=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_MTDPARTS=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index b5f3ae26b673..17bd8424da24 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_DFU=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 5f2ab44d4042..1ed3a8cd3a00 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -26,6 +26,7 @@ CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=384 # CONFIG_CMD_FLASH is not set CONFIG_CMD_ONENAND=y +CONFIG_USE_ONENAND_BOARD_INIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_FAT=y diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 6be214753f1b..97f47ea5b710 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -66,7 +66,6 @@ BOOTENV
/* OneNAND config */ -#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP #define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index ed4f55a4323d..8208f14e09e0 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -126,7 +126,6 @@ /* FLASH and environment organization */ #define CONFIG_MMC_DEFAULT_DEV 0
-#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0xB0000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index cbc941afb9dd..c51ff5718cf2 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -87,7 +87,6 @@ "mmcrootpart=3\0" \ "opts=always_resume=1"
-#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0x0C000000
#define CONFIG_USB_GADGET_DWC2_OTG_PHY diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 4199f2bc8e61..1395b8dfe38b 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -90,7 +90,6 @@ * Boot configuration */
-#define CONFIG_USE_ONENAND_BOARD_INIT #define CONFIG_SYS_ONENAND_BASE 0xE7100000
/*
This converts the following to Kconfig: CONFIG_USB_GADGET_DWC2_OTG_PHY
Signed-off-by: Tom Rini trini@konsulko.com --- configs/odroid_defconfig | 1 + configs/origen_defconfig | 1 + configs/s5p_goni_defconfig | 1 + configs/s5pc210_universal_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + drivers/usb/gadget/Kconfig | 5 +++++ include/configs/exynos4-common.h | 2 -- include/configs/s5p_goni.h | 2 -- include/configs/s5pc210_universal.h | 2 -- include/configs/smdkv310.h | 2 -- 11 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 8beb6a006e5e..9f4543c1ba84 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -72,6 +72,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 0a36472d3312..9a429a8704a0 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -54,5 +54,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index 17bd8424da24..c13602d3bb7b 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -61,5 +61,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index a66ae7dec9b6..cab0ac8e845b 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -59,5 +59,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 5c47a22d1e06..b48ed9c4242d 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -62,6 +62,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index 008a8ff4b30e..3e0fdfe83483 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -59,6 +59,7 @@ CONFIG_USB_GADGET_MANUFACTURER="Samsung" CONFIG_USB_GADGET_VENDOR_NUM=0x04e8 CONFIG_USB_GADGET_PRODUCT_NUM=0x6601 CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_USB_FUNCTION_THOR=y CONFIG_LIB_HW_RAND=y diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index d81a9c5a100d..350036f2083c 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -92,6 +92,11 @@ config USB_GADGET_DWC2_OTG
if USB_GADGET_DWC2_OTG
+config USB_GADGET_DWC2_OTG_PHY + bool "DesignWare USB2.0 HS OTG PHY" + help + Enable the DesignWare USB2.0 HS OTG physical device interface. + config USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 bool "DesignWare USB2.0 HS OTG controller 8-bit PHY bus width" help diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 625a2d8dc185..054cb5309e70 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -23,8 +23,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY - /* Common environment variables */ #define ENV_ITB \ "loadkernel=load mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index 8208f14e09e0..712a47a49569 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -128,6 +128,4 @@
#define CONFIG_SYS_ONENAND_BASE 0xB0000000
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY - #endif /* __CONFIG_H */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index c51ff5718cf2..137537d65f65 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -89,8 +89,6 @@
#define CONFIG_SYS_ONENAND_BASE 0x0C000000
-#define CONFIG_USB_GADGET_DWC2_OTG_PHY - #ifndef __ASSEMBLY__ void universal_spi_scl(int bit); void universal_spi_sda(int bit); diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index bb0f5473030d..0b1f0c5f54ca 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -10,8 +10,6 @@
#include "exynos4-common.h"
-#undef CONFIG_USB_GADGET_DWC2_OTG_PHY - /* High Level Configuration Options */ #define CONFIG_SYS_SDRAM_BASE 0x40000000
This converts the following to Kconfig: CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR
Signed-off-by: Tom Rini trini@konsulko.com --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 5 +++++ include/configs/ls2080aqds.h | 3 --- include/configs/ls2080ardb.h | 3 --- 3 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5a809b46118c..3ea023d36f9b 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -511,6 +511,11 @@ config DP_DDR_CTRL depends on SYS_FSL_HAS_DP_DDR default 2 if ARCH_LS2080A
+config DP_DDR_DIMM_SLOTS_PER_CTLR + int + depends on SYS_FSL_HAS_DP_DDR + default 1 if ARCH_LS2080A + config DP_DDR_NUM_CTRLS int depends on SYS_FSL_HAS_DP_DDR diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 21ca4afa51ce..96da4ab2ec08 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -25,9 +25,6 @@ #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 43bcc5a9b11c..835fff4bc60b 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -30,9 +30,6 @@ #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ -#ifdef CONFIG_SYS_FSL_HAS_DP_DDR -#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 -#endif
#if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
This converts the following to Kconfig: CONFIG_SYS_SPD_BUS_NUM
Signed-off-by: Tom Rini trini@konsulko.com --- README | 5 ----- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/P3041DS_NAND_defconfig | 1 + configs/P3041DS_SDCARD_defconfig | 1 + configs/P3041DS_SPIFLASH_defconfig | 1 + configs/P3041DS_defconfig | 1 + configs/P4080DS_SDCARD_defconfig | 1 + configs/P4080DS_SPIFLASH_defconfig | 1 + configs/P4080DS_defconfig | 1 + configs/P5040DS_NAND_defconfig | 1 + configs/P5040DS_SDCARD_defconfig | 1 + configs/P5040DS_SPIFLASH_defconfig | 1 + configs/P5040DS_defconfig | 1 + drivers/ddr/Kconfig | 5 +++++ include/configs/MPC8548CDS.h | 2 -- include/configs/P1010RDB.h | 1 - include/configs/P2041RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/T104xRDB.h | 1 - include/configs/T208xQDS.h | 1 - include/configs/T208xRDB.h | 1 - include/configs/T4240RDB.h | 1 - include/configs/corenet_ds.h | 1 - include/configs/km/pg-wcom-ls102xa.h | 1 - include/configs/kmcent2.h | 1 - include/configs/ls1021aqds.h | 1 - include/configs/ls1043aqds.h | 1 - include/configs/ls1043ardb.h | 2 -- include/configs/ls1046aqds.h | 1 - include/configs/ls1046ardb.h | 1 - include/configs/ls1088aqds.h | 1 - include/configs/ls1088ardb.h | 1 - include/configs/ls2080aqds.h | 1 - include/configs/ls2080ardb.h | 1 - include/configs/lx2160a_common.h | 1 - include/configs/novena.h | 1 - include/configs/p1_p2_rdb_pc.h | 3 --- include/configs/socrates.h | 2 -- include/configs/vf610twr.h | 1 - include/i2c.h | 3 --- 75 files changed, 52 insertions(+), 38 deletions(-)
diff --git a/README b/README index 017dc2c61da0..50a326a12426 100644 --- a/README +++ b/README @@ -1302,11 +1302,6 @@ The following options need to be configured:
will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
- CONFIG_SYS_SPD_BUS_NUM - - If defined, then this indicates the I2C bus number for DDR SPD. - If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CONFIG_SYS_RTC_BUS_NUM
If defined, then this indicates the I2C bus number for the RTC. diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 3d25bb18e461..c8f7e405d45e 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 71368c2a99e1..8d999b6375d2 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index f7c028c68b2a..d9bf749bc505 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 3f8b257094dc..d4c3899596b4 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 471ec321c20e..dd08b8c9725f 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 592a1c2dfad9..92396208b273 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -47,6 +47,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 033461507ad0..85c0e83aee77 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 2dcdc6ab42a8..5ead2a86eaff 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c86fedaf7cc9..b3a894d76c00 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 25e986685eda..8bbff122f1c3 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 1843543db61a..9d2b55be8ec5 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index bdb178bb868d..fb0a6cfb0216 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 036d9a132ba4..380b6596843e 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index c9392e95ff9b..4ce8b5e40eb3 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -48,6 +48,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 5a392bf17012..7c02d40aa246 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 079b4d3df710..378a4e6f6091 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 3ed503f31e26..436bc1d64b26 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -79,6 +79,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 21493d433664..27d319048893 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -69,6 +69,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 89648f9b1cb8..a32afb126052 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 9487256cfb11..b74ec9749fe2 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -48,6 +48,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index ae1a4e06fc47..76f7bc38bea7 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -78,6 +78,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 15d4e470e038..9cbf65b6dc22 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -68,6 +68,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 2493c77dfb89..9215acdf5e9f 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 944a692a438b..ebd83e5ecb18 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 7084c9ef1767..5e2f3ccb86b3 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 5caf1759c0fa..0e6531192503 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index d2fa3e6f723a..f98fcd602ff9 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index d6bafd1543c0..a1cffb7c8457 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -50,6 +50,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index bb68858ff3e1..48577ebb1fac 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 743f488bb1f9..baeb62fa9224 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 8fa421b3e8c7..61eb3bef5d8d 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 2b16989d1b73..0c926455fad4 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -52,6 +52,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 1712f6061df5..08bf6daee680 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 67d9adc2299b..442ca23a7aef 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 281c619a5dd4..a1ea8e570a2c 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index 594d6a8d4aa6..ddac11060a7a 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -51,6 +51,7 @@ CONFIG_ETHPRIME="eTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 6da4e06ff90a..9cf139f561c5 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 828896290e7f..223cd178111d 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index ea2e1ebe9a12..ed0f7a1f295c 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 627795235b1c..0a3937acca5e 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 867f8aace4c6..e87d506e1b55 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -47,6 +47,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 59984c916bce..4b17f3614da0 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -49,6 +49,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 2733bb2cad98..5d6ffc5d1a31 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC1" CONFIG_DM=y CONFIG_LBA48=y CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index e7f9755efb87..dafb3ac2a0d5 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -49,6 +49,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 32c1065c879c..083b2b39da66 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -48,6 +48,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 054f43e4c369..270c5545c05b 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -50,6 +50,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 44abf8ff1063..6ae3f7b522d8 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -45,6 +45,7 @@ CONFIG_DM=y CONFIG_FSL_SATA_V2=y CONFIG_SYS_SATA_MAX_DEVICE=2 CONFIG_FSL_CAAM=y +CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y CONFIG_SYS_BR0_PRELIM_BOOL=y diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig index eec9d480b096..738b7884012f 100644 --- a/drivers/ddr/Kconfig +++ b/drivers/ddr/Kconfig @@ -30,5 +30,10 @@ config DDR_SPD For memory controllers that can utilize it, add enable support for using the JEDEC SDP standard.
+config SYS_SPD_BUS_NUM + int "I2C bus number for DDR SPD" + depends on DDR_SPD || SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY + default 0 + source "drivers/ddr/altera/Kconfig" source "drivers/ddr/imx/Kconfig" diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 5fba5bb198dd..ce559e907c05 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -263,8 +263,6 @@ */ #if !CONFIG_IS_ENABLED(DM_I2C) #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } -#else -#define CONFIG_SYS_SPD_BUS_NUM 0 #endif
/* EEPROM */ diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 53c719807d6c..94fa3174de30 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -110,7 +110,6 @@
/* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 8e5d18f6cca4..4e96d2a06b79 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -89,7 +89,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x52 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3f32354038e3..9d68f2568df4 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -126,7 +126,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #if defined(CONFIG_TARGET_T1024RDB) -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index bda252486213..f1738b32c5d6 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -106,7 +106,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 0c13550ef234..eda03dad229a 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -95,7 +95,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 5fb768ab92fc..290fd7cf744e 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -90,7 +90,6 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE -#define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 6f5b75942993..29447e4895ab 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -178,7 +178,6 @@ /* * DDR Setup */ -#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS1 0x52 #define SPD_EEPROM_ADDRESS2 0x54 #define SPD_EEPROM_ADDRESS3 0x56 diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 034cd00381ef..51bc772e2386 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -92,7 +92,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 /* for p3041/p5010 */ diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h index 7430185666e7..3927558467af 100644 --- a/include/configs/km/pg-wcom-ls102xa.h +++ b/include/configs/km/pg-wcom-ls102xa.h @@ -22,7 +22,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54
/* POST memory regions test */ diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h index 798688a220ba..3b4ddb0f94a5 100644 --- a/include/configs/kmcent2.h +++ b/include/configs/kmcent2.h @@ -171,7 +171,6 @@ #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_SYS_SPD_BUS_NUM 0 #define SPD_EEPROM_ADDRESS 0x54 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index e17bdcad6d04..dd389a9e16e8 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -23,7 +23,6 @@ #endif
#define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0
#ifndef CONFIG_SYS_FSL_DDR4 #define CONFIG_SYS_DDR_RAW_TIMING diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 75d655c50d66..e81384ab3f00 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */
#define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0
#ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index edb4e64ee41a..f39a94065569 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -12,8 +12,6 @@
/* Physical Memory Map */
-#define CONFIG_SYS_SPD_BUS_NUM 0 - #ifndef CONFIG_SPL #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index 6271135db9fc..0e24209fbe9e 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -13,7 +13,6 @@ /* Physical Memory Map */
#define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0
#ifdef CONFIG_DDR_ECC #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index 4ad62b43f8c9..fdd251abcd1a 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -14,7 +14,6 @@ /* Physical Memory Map */
#define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h index e532c343f48b..7c60f287981a 100644 --- a/include/configs/ls1088aqds.h +++ b/include/configs/ls1088aqds.h @@ -16,7 +16,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0
/* diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h index aeadf534bc32..c0567c3fe580 100644 --- a/include/configs/ls1088ardb.h +++ b/include/configs/ls1088ardb.h @@ -17,7 +17,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define SPD_EEPROM_ADDRESS 0x51 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
#if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index 96da4ab2ec08..a0e2127f1ddd 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -24,7 +24,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) #define CONFIG_SYS_NOR_AMASK IFC_AMASK(128*1024*1024) diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 835fff4bc60b..9c4d2feb7883 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -29,7 +29,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 /* dummy address */ #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */
#if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 1669ecd2aba9..bc3a0046ac63 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -31,7 +31,6 @@ #define SPD_EEPROM_ADDRESS5 0x55 #define SPD_EEPROM_ADDRESS6 0x56 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 -#define CONFIG_SYS_SPD_BUS_NUM 0 /* SPD on I2C bus 0 */ #define CONFIG_SYS_MONITOR_LEN (936 * 1024)
/* Miscellaneous configurable options */ diff --git a/include/configs/novena.h b/include/configs/novena.h index ee39b3c297cb..9f18db465e10 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -39,7 +39,6 @@
/* I2C */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_SYS_SPD_BUS_NUM 0
/* I2C EEPROM */
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d368e90fb2bd..1e5467807053 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -116,7 +116,6 @@
/* DDR Setup */ #define CONFIG_SYS_DDR_RAW_TIMING -#define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x52
#if defined(CONFIG_TARGET_P1020RDB_PD) @@ -355,8 +354,6 @@ #define CONFIG_SYS_I2C_NOPROBES { {0, 0x29} } #endif
-#define CONFIG_SYS_SPD_BUS_NUM 1 /* For rom_loc and flash bank */ - /* * I2C2 EEPROM */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 73f82fc00aca..14f7bb9f7132 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -118,8 +118,6 @@ #define CONFIG_SYS_LIME_BASE 0xc8000000 #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */
-#define CONFIG_SYS_SPD_BUS_NUM 0 - /* * General PCI * Memory space is mapped 1-1. diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index 7f4bfb5124ac..32d9df0a00ce 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -26,7 +26,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0
/* I2C Configs */ -#define CONFIG_SYS_SPD_BUS_NUM 0
/* * We do have 128MB of memory on the Vybrid Tower board. Leave the last diff --git a/include/i2c.h b/include/i2c.h index 22add0b5282f..e0ee94e55046 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -647,9 +647,6 @@ void i2c_early_init_f(void); #if !defined(CONFIG_SYS_RTC_BUS_NUM) #define CONFIG_SYS_RTC_BUS_NUM 0 #endif -#if !defined(CONFIG_SYS_SPD_BUS_NUM) -#define CONFIG_SYS_SPD_BUS_NUM 0 -#endif
struct i2c_adapter { void (*init)(struct i2c_adapter *adap, int speed,
This converts the following to Kconfig: CONFIG_SYS_DDR_RAW_TIMING
Signed-off-by: Tom Rini trini@konsulko.com --- README | 6 ------ configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PA_NAND_defconfig | 1 + configs/P1010RDB-PA_NOR_defconfig | 1 + configs/P1010RDB-PA_SDCARD_defconfig | 1 + configs/P1010RDB-PA_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 + configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 + configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 + configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 + configs/P1010RDB-PB_NAND_defconfig | 1 + configs/P1010RDB-PB_NOR_defconfig | 1 + configs/P1010RDB-PB_SDCARD_defconfig | 1 + configs/P1010RDB-PB_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_36BIT_defconfig | 1 + configs/P1020RDB-PC_NAND_defconfig | 1 + configs/P1020RDB-PC_SDCARD_defconfig | 1 + configs/P1020RDB-PC_SPIFLASH_defconfig | 1 + configs/P1020RDB-PC_defconfig | 1 + configs/P1020RDB-PD_NAND_defconfig | 1 + configs/P1020RDB-PD_SDCARD_defconfig | 1 + configs/P1020RDB-PD_SPIFLASH_defconfig | 1 + configs/P1020RDB-PD_defconfig | 1 + configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 + configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 + configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_36BIT_defconfig | 1 + configs/P2020RDB-PC_NAND_defconfig | 1 + configs/P2020RDB-PC_SDCARD_defconfig | 1 + configs/P2020RDB-PC_SPIFLASH_defconfig | 1 + configs/P2020RDB-PC_defconfig | 1 + configs/ls1021aqds_nand_defconfig | 1 + configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 + configs/ls1021aqds_nor_defconfig | 1 + configs/ls1021aqds_nor_lpuart_defconfig | 1 + configs/ls1021aqds_qspi_defconfig | 1 + configs/ls1021aqds_sdcard_ifc_defconfig | 1 + configs/ls1021aqds_sdcard_qspi_defconfig | 1 + configs/ls1043ardb_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_defconfig | 1 + configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 1 + configs/ls1043ardb_tfa_defconfig | 1 + drivers/ddr/fsl/Kconfig | 7 +++++++ include/configs/P1010RDB.h | 1 - include/configs/T102xRDB.h | 1 - include/configs/ls1021aqds.h | 4 ---- include/configs/ls1043ardb.h | 1 - include/configs/ls2080a_common.h | 4 ---- include/configs/p1_p2_rdb_pc.h | 1 - 55 files changed, 54 insertions(+), 18 deletions(-)
diff --git a/README b/README index 50a326a12426..a8d43f63b7e3 100644 --- a/README +++ b/README @@ -2079,12 +2079,6 @@ Low Level (hardware related) configuration options: one, specify here. Note that the value must resolve to something your driver can deal with.
-- CONFIG_SYS_DDR_RAW_TIMING - Get DDR timing information from other than SPD. Common with - soldered DDR chips onboard without SPD. DDR raw timing - parameters are extracted from datasheet and hard-coded into - header files or board specific files. - - CONFIG_FSL_DDR_INTERACTIVE Enable interactive DDR debugging. See doc/README.fsl-ddr.
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index c8f7e405d45e..607278434c4c 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 8d999b6375d2..81bfd7ae518c 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index d9bf749bc505..1ebfdec719e8 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index d4c3899596b4..f2bef4774ede 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index dd08b8c9725f..373333dcc3c1 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -82,6 +82,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 92396208b273..9240c38c164a 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -49,6 +49,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 85c0e83aee77..c0fa3b5e4eb3 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 5ead2a86eaff..4affbf52cc96 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index b3a894d76c00..034bec111659 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -84,6 +84,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 8bbff122f1c3..0a3ba0573e01 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -51,6 +51,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 9d2b55be8ec5..3e5d313c405f 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index fb0a6cfb0216..d28d037ff726 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 380b6596843e..a1e8d54c8c0e 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_TPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 4ce8b5e40eb3..af65061a0c3e 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -50,6 +50,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_COMMON_INIT_DDR=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 7c02d40aa246..36892c9fc2e4 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -72,6 +72,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 378a4e6f6091..381c1d3bb96a 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -75,6 +75,7 @@ CONFIG_FSL_CAAM=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SPL_COMMON_INIT_DDR=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 436bc1d64b26..663c3bcdbc9d 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -81,6 +81,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 27d319048893..6c4575367be2 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -71,6 +71,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index a32afb126052..b6d3dc95a692 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -74,6 +74,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index b74ec9749fe2..0130ce6cb661 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -50,6 +50,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 76f7bc38bea7..fc32e89cf2af 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -80,6 +80,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 9cbf65b6dc22..6b6b12eae624 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -70,6 +70,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 9215acdf5e9f..904658bd01b3 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -73,6 +73,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index ebd83e5ecb18..643cee0b24ca 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -49,6 +49,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 5e2f3ccb86b3..5cec7f7bfc1b 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -83,6 +83,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8796 diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 0e6531192503..c488aae69d5d 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -73,6 +73,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index f98fcd602ff9..78f680644a78 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -76,6 +76,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index a1cffb7c8457..40b6afa6cc0f 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -52,6 +52,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=2 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEC001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 48577ebb1fac..fb28554b733b 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -85,6 +85,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index baeb62fa9224..48f787ec91bf 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -75,6 +75,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 61eb3bef5d8d..0f5af7c097d2 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -78,6 +78,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 0c926455fad4..9b376595e7b8 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -54,6 +54,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 08bf6daee680..6cb88863b9f4 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -84,6 +84,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFF800C21 CONFIG_SYS_OR0_PRELIM=0xFFFF8396 diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 442ca23a7aef..cd91e8903a67 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -74,6 +74,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index a1ea8e570a2c..3f4fa81f75cd 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -77,6 +77,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index ddac11060a7a..228f36af9a95 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -53,6 +53,7 @@ CONFIG_LBA48=y CONFIG_DDR_CLK_FREQ=66666666 CONFIG_SYS_SPD_BUS_NUM=1 CONFIG_CHIP_SELECTS_PER_CTRL=1 +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xEF001001 CONFIG_SYS_OR0_PRELIM=0xFC000FF7 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index cfa81baff608..9ab66cd53c29 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -95,6 +95,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig index 0062e8a65792..e504fcb6c180 100644 --- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig +++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig @@ -62,6 +62,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig index 1434817e1c4d..42708b70f6bc 100644 --- a/configs/ls1021aqds_nor_defconfig +++ b/configs/ls1021aqds_nor_defconfig @@ -65,6 +65,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig index 9bfbe2eff97d..925b376086fb 100644 --- a/configs/ls1021aqds_nor_lpuart_defconfig +++ b/configs/ls1021aqds_nor_lpuart_defconfig @@ -65,6 +65,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 02d056f4e6c7..4e24e43c2fc6 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -62,6 +62,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 164e8b017680..d5f6c5c25cff 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -93,6 +93,7 @@ CONFIG_DYNAMIC_DDR_CLK_FREQ=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 8a6357b0b21b..addd100b2b28 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -89,6 +89,7 @@ CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index cf106de2bc05..a8328681ec8e 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -45,6 +45,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 454f3dccbba5..243a03030a98 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -49,6 +49,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig index 2f1676310dc2..38442c19b4ea 100644 --- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig @@ -44,6 +44,7 @@ CONFIG_ETHPRIME="FM1@DTSEC3" CONFIG_DM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig index 5d3618319596..e065c7236656 100644 --- a/configs/ls1043ardb_tfa_defconfig +++ b/configs/ls1043ardb_tfa_defconfig @@ -51,6 +51,7 @@ CONFIG_DM=y CONFIG_FSL_CAAM=y # CONFIG_DDR_SPD is not set CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y +CONFIG_SYS_DDR_RAW_TIMING=y CONFIG_MPC8XXX_GPIO=y CONFIG_DM_I2C=y CONFIG_SPL_SYS_I2C_LEGACY=y diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig index 6a29b23bab7e..d93ed8d2feb6 100644 --- a/drivers/ddr/fsl/Kconfig +++ b/drivers/ddr/fsl/Kconfig @@ -175,6 +175,13 @@ config ECC_INIT_VIA_DDRCONTROLLER Use the DDR controller to auto initialize memory. If not enabled, the DMA controller is responsible for doing this.
+config SYS_DDR_RAW_TIMING + bool "Get DDR timing information from something other than SPD" + help + This is common with soldered DDR chips onboard without SPD. DDR raw + timing parameters are extracted from datasheet and hard-coded into + header files or board specific files. + endif
menu "PowerPC / M68K initial memory controller definitions (FLASH, SDRAM, etc)" diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 94fa3174de30..200b88050cc7 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -109,7 +109,6 @@ #define CONFIG_L2_CACHE /* toggle L2 cache */
/* DDR Setup */ -#define CONFIG_SYS_DDR_RAW_TIMING #define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 9d68f2568df4..2ccfd87bfb05 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -129,7 +129,6 @@ #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */ #elif defined(CONFIG_TARGET_T1023RDB) -#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_SYS_SDRAM_SIZE 2048 #endif
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index dd389a9e16e8..012b47116b98 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -24,10 +24,6 @@
#define SPD_EEPROM_ADDRESS 0x51
-#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_DDR_RAW_TIMING -#endif - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index f39a94065569..411721c12545 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -13,7 +13,6 @@ /* Physical Memory Map */
#ifndef CONFIG_SPL -#define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #endif
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index f9eb829cda26..d2978713e6b7 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -16,10 +16,6 @@
/* Link Definitions */
-#ifndef CONFIG_SYS_FSL_DDR4 -#define CONFIG_SYS_DDR_RAW_TIMING -#endif - #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */
#define CONFIG_VERY_BIG_RAM diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 1e5467807053..39552be32b3c 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -115,7 +115,6 @@ #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
/* DDR Setup */ -#define CONFIG_SYS_DDR_RAW_TIMING #define SPD_EEPROM_ADDRESS 0x52
#if defined(CONFIG_TARGET_P1020RDB_PD)
On Wed, Jun 15, 2022 at 12:03:43PM -0400, Tom Rini wrote:
This converts the following to Kconfig: CONFIG_DW_ALTDESCRIPTOR
Signed-off-by: Tom Rini trini@konsulko.com
For the series, applied to u-boot/next, thanks!
participants (3)
-
Jaehoon Chung -
Stefan Roese -
Tom Rini