The CONFIG_SPL_BOARD_INIT lets SPL common code call spl_board_init() during the SPL start up. On this particular system, spl_board_init() is used to reconfigure GIC clock parent to PLL2 500M, which is the configuration expected by the Linux kernel. Enable SPL_BOARD_INIT .

Set GIC clock to 500 MHz for OD VDD_SOC. Kernel driver does not allow to change it. Should set the clock after PMIC setting done. Default is 400 MHz (system_pll1_800m with div = 2) set by ROM for ND VDD_SOC.

Signed-off-by: Marek Vasut marex@denx.de --- Cc: Fabio Estevam festevam@denx.de Cc: Stefano Babic sbabic@denx.de --- V2: Duplicate code comment into commit message --- configs/imx8mp_dhcom_pdk2_defconfig | 1 + configs/imx8mp_dhcom_pdk3_defconfig | 1 + 2 files changed, 2 insertions(+)

diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index dc482abad85..4f907ce00d0 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -54,6 +54,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set diff --git a/configs/imx8mp_dhcom_pdk3_defconfig b/configs/imx8mp_dhcom_pdk3_defconfig index 3442af6f00e..9972e2d96b6 100644 --- a/configs/imx8mp_dhcom_pdk3_defconfig +++ b/configs/imx8mp_dhcom_pdk3_defconfig @@ -55,6 +55,7 @@ CONFIG_SPL_MAX_SIZE=0x26000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x96fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 +CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set