[U-Boot] [PATCH v2 1/7] am33xx/omap3: Clean up gpmc_init slightly
We don't really need the gpmc_config, base and size variables and can just call enable_gpmc_cs_config more directly, like the boards which need to re-configure CS0 or CS1 do.
Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - New patch --- arch/arm/cpu/armv7/am33xx/mem.c | 12 ++---------- arch/arm/cpu/armv7/omap3/mem.c | 18 ++++-------------- 2 files changed, 6 insertions(+), 24 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c index b86b0de..45f5426 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/am33xx/mem.c @@ -75,11 +75,6 @@ void gpmc_init(void) /* putting a blanket check on GPMC based on ZeBu for now */ gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#ifdef CONFIG_CMD_NAND - const u32 *gpmc_config = NULL; - u32 base = 0; - u32 size = 0; -#endif /* global settings */ writel(0x00000008, &gpmc_cfg->sysconfig); writel(0x00000100, &gpmc_cfg->irqstatus); @@ -92,10 +87,7 @@ void gpmc_init(void) sdelay(1000);
#ifdef CONFIG_CMD_NAND - gpmc_config = gpmc_m_nand; - - base = PISMO1_NAND_BASE; - size = PISMO1_NAND_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], + CONFIG_SYS_NAND_BASE, GPMC_SIZE_256M); #endif } diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c index d04a5a1..6f65a73 100644 --- a/arch/arm/cpu/armv7/omap3/mem.c +++ b/arch/arm/cpu/armv7/omap3/mem.c @@ -113,11 +113,6 @@ void gpmc_init(void) { /* putting a blanket check on GPMC based on ZeBu for now */ gpmc_cfg = (struct gpmc *)GPMC_BASE; -#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND) - const u32 *gpmc_config = NULL; - u32 base = 0; - u32 size = 0; -#endif u32 config = 0;
/* global settings */ @@ -136,17 +131,12 @@ void gpmc_init(void) sdelay(1000);
#if defined(CONFIG_CMD_NAND) /* CS 0 */ - gpmc_config = gpmc_m_nand; - - base = PISMO1_NAND_BASE; - size = PISMO1_NAND_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], PISMO1_NAND_BASE, + PISMO1_NAND_SIZE); #endif
#if defined(CONFIG_CMD_ONENAND) - gpmc_config = gpmc_onenand; - base = PISMO1_ONEN_BASE; - size = PISMO1_ONEN_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_onenand, &gpmc_cfg->cs[0], PISMO1_ONEN_BASE, + PISMO1_ONEN_SIZE); #endif }
We always set a CONFIG_ENV_IS_...somewhere... so drop the initial define of NOWHERE.
Reviewed-by: Peter Korsgaard jacmet@sunsite.dk Signed-off-by: Tom Rini trini@ti.com --- include/configs/am335x_evm.h | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index ef00306..945ec09 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -298,8 +298,6 @@ #define CONFIG_ENV_OVERWRITE 1 #define CONFIG_SYS_CONSOLE_INFO_QUIET
-#define CONFIG_ENV_IS_NOWHERE - /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK @@ -434,7 +432,6 @@ * 0x442000 - 0x800000 : Userland */ #if defined(CONFIG_SPI_BOOT) -# undef CONFIG_ENV_IS_NOWHERE # define CONFIG_ENV_IS_IN_SPI_FLASH # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ @@ -481,7 +478,6 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #if !defined(CONFIG_SPI_BOOT) -#undef CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
- Style cleanup (# define -> #define) - Due to ROM issues, redudant loading isn't feasible, so drop. - Given extra space, increase max size of U-Boot to 512KiB - Correct env size to match usage (we had not re-defined ENV_SIZE). - Given extra space, keep env size as 128KiB, add redundant environment.
Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - Correct physmap -> m25p80 in mtdparts (Peter K). - Style fixups, drop redundant SPL space, add redundant environment.
Signed-off-by: Tom Rini trini@ti.com --- include/configs/am335x_evm.h | 33 +++++++++++++++++++-------------- 1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 945ec09..15822b4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -330,7 +330,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 -#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SPL_MUSB_NEW_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
@@ -420,22 +420,27 @@ #endif
/* - * Default to using SPI for environment, etc. We have multiple copies - * of SPL as the ROM will check these locations. - * 0x0 - 0x20000 : First copy of SPL - * 0x20000 - 0x40000 : Second copy of SPL - * 0x40000 - 0x60000 : Third copy of SPL - * 0x60000 - 0x80000 : Fourth copy of SPL - * 0x80000 - 0xDF000 : U-Boot - * 0xDF000 - 0xE0000 : U-Boot Environment - * 0xE0000 - 0x442000 : Linux Kernel + * Default to using SPI for environment, etc. + * 0x000000 - 0x020000 : SPL (128KiB) + * 0x020000 - 0x0A0000 : U-Boot (512KiB) + * 0x0A0000 - 0x0BFFFF : First copy of U-Boot Environment (128KiB) + * 0x0C0000 - 0x0DFFFF : Second copy of U-Boot Environment (128KiB) + * 0x0E0000 - 0x442000 : Linux Kernel * 0x442000 - 0x800000 : Userland */ #if defined(CONFIG_SPI_BOOT) -# define CONFIG_ENV_IS_IN_SPI_FLASH -# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ -# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ +#define CONFIG_ENV_OFFSET (768 << 10) /* 768 KiB in */ +#define CONFIG_ENV_OFFSET_REDUND (896 << 10) /* 896 KiB in */ +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT "nor0=m25p80-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=m25p80-flash.0:128k(SPL)," \ + "512k(u-boot),128k(u-boot-env1)," \ + "128k(u-boot-env2),3464k(kernel)," \ + "-(rootfs)" #endif /* SPI support */
/* Unsupported features */
"Tom" == Tom Rini trini@ti.com writes:
Tom> - Style cleanup (# define -> #define) Tom> - Due to ROM issues, redudant loading isn't feasible, so drop. Tom> - Given extra space, increase max size of U-Boot to 512KiB Tom> - Correct env size to match usage (we had not re-defined ENV_SIZE). Tom> - Given extra space, keep env size as 128KiB, add redundant environment.
Tom> Signed-off-by: Tom Rini trini@ti.com
Reviewed-by: Peter Korsgaard jacmet@sunsite.dk
Tom> --- Tom> Changes in v2: Tom> - Correct physmap -> m25p80 in mtdparts (Peter K). Tom> - Style fixups, drop redundant SPL space, add redundant environment.
Tom> Signed-off-by: Tom Rini trini@ti.com
1 s-o-b is probably enough ;)
Due to hardware design the board supported by the am335x_evm config cannot have both NAND and SPI (or NOR) enabled at the same time due to conflicts. Disable the NAND SW stack when we know we can't have it present.
Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - Reword commit message --- include/configs/am335x_evm.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 15822b4..3df0840 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -230,7 +230,9 @@ /* USB Device Firmware Update support */ #define CONFIG_DFU_FUNCTION #define CONFIG_DFU_MMC +#ifdef CONFIG_NAND #define CONFIG_DFU_NAND +#endif #define CONFIG_CMD_DFU #define DFU_ALT_INFO_MMC \ "boot part 0 1;" \ @@ -335,11 +337,13 @@ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#define CONFIG_SPL_BOARD_INIT +#ifdef CONFIG_NAND #define CONFIG_SPL_NAND_AM33XX_BCH #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_NAND_BASE #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC +#endif #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) @@ -464,7 +468,10 @@ #define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC
+#if !defined(CONFIG_SPI_BOOT) #define CONFIG_NAND +#endif + /* NAND support */ #ifdef CONFIG_NAND #define CONFIG_CMD_NAND @@ -482,11 +489,9 @@ /* CS0 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#if !defined(CONFIG_SPI_BOOT) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ #endif -#endif
#endif /* ! __CONFIG_AM335X_EVM_H */
"Tom" == Tom Rini trini@ti.com writes:
Tom> Due to hardware design the board supported by the am335x_evm config Tom> cannot have both NAND and SPI (or NOR) enabled at the same time due to Tom> conflicts. Disable the NAND SW stack when we know we can't have it Tom> present.
Tom> Signed-off-by: Tom Rini trini@ti.com
Reviewed-by: Peter Korsgaard jacmet@sunsite.dk
Tom> --- Tom> Changes in v2: Tom> - Reword commit message
Thanks!
We rework the various board_is_foo() checks to take a pointer to struct am335x_baseboard_id rather than using a local copy in board.c. This allows us to make use of the same checks in mux.c as well as fixing problems when this code could be running from read-only memory.
Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - Fix checkpatch warnings --- board/ti/am335x/board.c | 78 ++++++++++++++++------------------------------- board/ti/am335x/board.h | 31 +++++++++++++++++++ board/ti/am335x/mux.c | 10 +++--- 3 files changed, 62 insertions(+), 57 deletions(-)
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index b371376..0ee2f7e 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -51,43 +51,10 @@ static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-static struct am335x_baseboard_id __attribute__((section (".data"))) header; - -static inline int board_is_bone(void) -{ - return !strncmp(header.name, "A335BONE", HDR_NAME_LEN); -} - -static inline int board_is_bone_lt(void) -{ - return !strncmp(header.name, "A335BNLT", HDR_NAME_LEN); -} - -static inline int board_is_evm_sk(void) -{ - return !strncmp("A335X_SK", header.name, HDR_NAME_LEN); -} - -static inline int board_is_idk(void) -{ - return !strncmp(header.config, "SKU#02", 6); -} - -static int __maybe_unused board_is_gp_evm(void) -{ - return !strncmp("A33515BB", header.name, 8); -} - -int board_is_evm_15_or_later(void) -{ - return (!strncmp("A33515BB", header.name, 8) && - strncmp("1.5", header.version, 3) <= 0); -} - /* * Read header information from EEPROM into global structure. */ -static int read_eeprom(void) +static int read_eeprom(struct am335x_baseboard_id *header) { /* Check if baseboard eeprom is available */ if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) { @@ -97,28 +64,28 @@ static int read_eeprom(void) }
/* read the eeprom using i2c */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header, - sizeof(header))) { + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header, + sizeof(struct am335x_baseboard_id))) { puts("Could not read the EEPROM; something fundamentally" " wrong on the I2C bus.\n"); return -EIO; }
- if (header.magic != 0xEE3355AA) { + if (header->magic != 0xEE3355AA) { /* * read the eeprom using i2c again, * but use only a 1 byte address */ - if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, - (uchar *)&header, sizeof(header))) { + if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header, + sizeof(struct am335x_baseboard_id))) { puts("Could not read the EEPROM; something " "fundamentally wrong on the I2C bus.\n"); return -EIO; }
- if (header.magic != 0xEE3355AA) { + if (header->magic != 0xEE3355AA) { printf("Incorrect magic number (0x%x) in EEPROM\n", - header.magic); + header->magic); return -EINVAL; } } @@ -304,6 +271,8 @@ static struct emif_regs ddr3_evm_emif_reg_data = { */ void s_init(void) { + __maybe_unused struct am335x_baseboard_id header; + /* WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets */ @@ -362,11 +331,11 @@ void s_init(void) /* Initalize the board header */ enable_i2c0_pin_mux(); i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - if (read_eeprom() < 0) + if (read_eeprom(&header) < 0) puts("Could not get board ID.\n");
enable_board_pin_mux(&header); - if (board_is_evm_sk()) { + if (board_is_evm_sk(&header)) { /* * EVM SK 1.2A and later use gpio0_7 to enable DDR3. * This is safe enough to do on older revs. @@ -375,15 +344,15 @@ void s_init(void) gpio_direction_output(GPIO_DDR_VTT_EN, 1); }
- if (board_is_evm_sk()) + if (board_is_evm_sk(&header)) config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0); - else if (board_is_bone_lt()) + else if (board_is_bone_lt(&header)) config_ddr(400, MT41K256M16HA125E_IOCTRL_VALUE, &ddr3_beagleblack_data, &ddr3_beagleblack_cmd_ctrl_data, &ddr3_beagleblack_emif_reg_data, 0); - else if (board_is_evm_15_or_later()) + else if (board_is_evm_15_or_later(&header)) config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data, 0); else @@ -397,10 +366,6 @@ void s_init(void) */ int board_init(void) { - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - if (read_eeprom() < 0) - puts("Could not get board ID.\n"); - gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
gpmc_init(); @@ -413,6 +378,10 @@ int board_late_init(void) { #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG char safe_string[HDR_NAME_LEN + 1]; + struct am335x_baseboard_id header; + + if (read_eeprom(&header) < 0) + puts("Could not get board ID.\n");
/* Now set variables based on the header. */ strncpy(safe_string, (char *)header.name, sizeof(header.name)); @@ -476,6 +445,7 @@ int board_eth_init(bd_t *bis) int rv, n = 0; uint8_t mac_addr[6]; uint32_t mac_hi, mac_lo; + __maybe_unused struct am335x_baseboard_id header;
/* try reading mac address from efuse */ mac_lo = readl(&cdev->macid0l); @@ -496,7 +466,11 @@ int board_eth_init(bd_t *bis) eth_setenv_enetaddr("ethaddr", mac_addr); }
- if (board_is_bone() || board_is_bone_lt() || board_is_idk()) { + if (read_eeprom(&header) < 0) + puts("Could not get board ID.\n"); + + if (board_is_bone(&header) || board_is_bone_lt(&header) || + board_is_idk(&header)) { writel(MII_MODE_ENABLE, &cdev->miisel); cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII; @@ -524,7 +498,7 @@ int board_eth_init(bd_t *bis) #define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5 #define AR8051_RGMII_TX_CLK_DLY 0x100
- if (board_is_evm_sk() || board_is_gp_evm()) { + if (board_is_evm_sk(&header) || board_is_gp_evm(&header)) { const char *devname; devname = miiphy_get_current_dev();
diff --git a/board/ti/am335x/board.h b/board/ti/am335x/board.h index 48e112e..36ccaec 100644 --- a/board/ti/am335x/board.h +++ b/board/ti/am335x/board.h @@ -37,6 +37,37 @@ struct am335x_baseboard_id { char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN]; };
+static inline int board_is_bone(struct am335x_baseboard_id *header) +{ + return !strncmp(header->name, "A335BONE", HDR_NAME_LEN); +} + +static inline int board_is_bone_lt(struct am335x_baseboard_id *header) +{ + return !strncmp(header->name, "A335BNLT", HDR_NAME_LEN); +} + +static inline int board_is_evm_sk(struct am335x_baseboard_id *header) +{ + return !strncmp("A335X_SK", header->name, HDR_NAME_LEN); +} + +static inline int board_is_idk(struct am335x_baseboard_id *header) +{ + return !strncmp(header->config, "SKU#02", 6); +} + +static inline int board_is_gp_evm(struct am335x_baseboard_id *header) +{ + return !strncmp("A33515BB", header->name, HDR_NAME_LEN); +} + +static inline int board_is_evm_15_or_later(struct am335x_baseboard_id *header) +{ + return (board_is_gp_evm(header) && + strncmp("1.5", header->version, 3) <= 0); +} + /* * We have three pin mux functions that must exist. We must be able to enable * uart0, for initial output and i2c0 to read the main EEPROM. We then have a diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 0283708..2e09d98 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -262,13 +262,13 @@ static unsigned short detect_daughter_board_profile(void) void enable_board_pin_mux(struct am335x_baseboard_id *header) { /* Do board-specific muxes. */ - if (!strncmp(header->name, "A335BONE", HDR_NAME_LEN)) { + if (board_is_bone(header)) { /* Beaglebone pinmux */ configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc1_pin_mux); - } else if (!strncmp(header->config, "SKU#01", 6)) { + } else if (board_is_gp_evm(header)) { /* General Purpose EVM */ unsigned short profile = detect_daughter_board_profile(); configure_module_pin_mux(rgmii1_pin_mux); @@ -283,7 +283,7 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(mmc1_pin_mux); configure_module_pin_mux(spi0_pin_mux); } - } else if (!strncmp(header->config, "SKU#02", 6)) { + } else if (board_is_idk(header)) { /* * Industrial Motor Control (IDK) * note: IDK console is on UART3 by default. @@ -292,13 +292,13 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) */ configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_no_cd_pin_mux); - } else if (!strncmp(header->name, "A335X_SK", HDR_NAME_LEN)) { + } else if (board_is_evm_sk(header)) { /* Starter Kit EVM */ configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(gpio0_7_pin_mux); configure_module_pin_mux(rgmii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux_sk_evm); - } else if (!strncmp(header->name, "A335BNLT", HDR_NAME_LEN)) { + } else if (board_is_bone_lt(header)) { /* Beaglebone LT pinmux */ configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux);
"Tom" == Tom Rini trini@ti.com writes:
Tom> We rework the various board_is_foo() checks to take a pointer to Tom> struct am335x_baseboard_id rather than using a local copy in board.c. Tom> This allows us to make use of the same checks in mux.c as well as fixing Tom> problems when this code could be running from read-only memory.
Tom> Signed-off-by: Tom Rini trini@ti.com
Reviewed-by: Peter Korsgaard jacmet@sunsite.dk
From: Steve Kipisz s-kipisz2@ti.com
This patch adds support for the NOR module that attaches to the memory cape for a Beaglebone board. This does not add booting support; only support so that you can boot from SD/MMC and see the NOR module so that it can be programmed.
Signed-off-by: Steve Kipisz s-kipisz2@ti.com [trini: Clean up config changes slightly] Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - Move GPMC config portion into board.c
Signed-off-by: Tom Rini trini@ti.com --- arch/arm/cpu/armv7/am33xx/mem.c | 6 ++++ arch/arm/include/asm/arch-am33xx/mem.h | 9 ++++++ board/ti/am335x/board.c | 13 ++++++++ board/ti/am335x/mux.c | 53 ++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/am335x_evm.h | 28 +++++++++++++++++ 6 files changed, 110 insertions(+)
diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c index 45f5426..923ea83 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/am33xx/mem.c @@ -77,9 +77,15 @@ void gpmc_init(void)
/* global settings */ writel(0x00000008, &gpmc_cfg->sysconfig); +#ifdef CONFIG_NOR + writel(0x00000000, &gpmc_cfg->irqstatus); + writel(0x00000000, &gpmc_cfg->irqenable); + writel(0x00000A00, &gpmc_cfg->config); +#else writel(0x00000100, &gpmc_cfg->irqstatus); writel(0x00000100, &gpmc_cfg->irqenable); writel(0x00000012, &gpmc_cfg->config); +#endif /* * Disable the GPMC0 config set by ROM code */ diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h index c3bf74e..ddcad62 100644 --- a/arch/arm/include/asm/arch-am33xx/mem.h +++ b/arch/arm/include/asm/arch-am33xx/mem.h @@ -61,6 +61,15 @@ #define M_NAND_GPMC_CONFIG6 0x16000f80 #define M_NAND_GPMC_CONFIG7 0x00000008
+/* NOR chip on NOR module for Beaglebone */ +#define STNOR_GPMC_CONFIG1 0x00001200 +#define STNOR_GPMC_CONFIG2 0x00101000 +#define STNOR_GPMC_CONFIG3 0x00030301 +#define STNOR_GPMC_CONFIG4 0x10041004 +#define STNOR_GPMC_CONFIG5 0x000C1010 +#define STNOR_GPMC_CONFIG6 0x08070280 +#define STNOR_GPMC_CONFIG7 0x00000F48 + /* max number of GPMC Chip Selects */ #define GPMC_MAX_CS 8 /* max number of GPMC regs */ diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 0ee2f7e..3660655 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -27,6 +27,7 @@ #include <asm/arch/gpio.h> #include <asm/arch/mmc_host_def.h> #include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> #include <asm/io.h> #include <asm/emif.h> #include <asm/gpio.h> @@ -366,10 +367,22 @@ void s_init(void) */ int board_init(void) { +#ifdef CONFIG_NOR + const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1, + STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4, + STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 }; +#endif + gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
gpmc_init();
+#ifdef CONFIG_NOR + /* Reconfigure CS0 for NOR instead of NAND. */ + enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0], + CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M); +#endif + return 0; }
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 2e09d98..187468e 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -190,6 +190,56 @@ static struct module_pin_mux nand_pin_mux[] = { {-1}, };
+#if defined(CONFIG_NOR) +static struct module_pin_mux bone_norcape_pin_mux[] = { + {OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A0 */ + {OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A1 */ + {OFFSET(lcd_data2), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A2 */ + {OFFSET(lcd_data3), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A3 */ + {OFFSET(lcd_data4), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A4 */ + {OFFSET(lcd_data5), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A5 */ + {OFFSET(lcd_data6), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A6 */ + {OFFSET(lcd_data7), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A7 */ + {OFFSET(lcd_vsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A8 */ + {OFFSET(lcd_hsync), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A9 */ + {OFFSET(lcd_pclk), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A10 */ + {OFFSET(lcd_ac_bias_en), MODE(1)| PULLUDEN | RXACTIVE}, /* NOR_A11 */ + {OFFSET(lcd_data8), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A12 */ + {OFFSET(lcd_data9), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A13 */ + {OFFSET(lcd_data10), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A14 */ + {OFFSET(lcd_data11), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A15 */ + {OFFSET(lcd_data12), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A16 */ + {OFFSET(lcd_data13), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A17 */ + {OFFSET(lcd_data14), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A18 */ + {OFFSET(lcd_data15), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A19 */ + {OFFSET(gpmc_ad0), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD0 */ + {OFFSET(gpmc_ad1), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD1 */ + {OFFSET(gpmc_ad2), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD2 */ + {OFFSET(gpmc_ad3), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD3 */ + {OFFSET(gpmc_ad4), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD4 */ + {OFFSET(gpmc_ad5), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD5 */ + {OFFSET(gpmc_ad6), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD6 */ + {OFFSET(gpmc_ad7), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD7 */ + {OFFSET(gpmc_ad8), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD8 */ + {OFFSET(gpmc_ad9), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD9 */ + {OFFSET(gpmc_ad10), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD10 */ + {OFFSET(gpmc_ad11), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD11 */ + {OFFSET(gpmc_ad12), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD12 */ + {OFFSET(gpmc_ad13), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD13 */ + {OFFSET(gpmc_ad14), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD14 */ + {OFFSET(gpmc_ad15), MODE(0) | PULLUDEN | RXACTIVE}, /* NOR_AD15 */ + + {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN) | RXACTIVE}, /* NOR_CE */ + {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN) | RXACTIVE}, /* NOR_ADVN_ALE */ + {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_OE */ + {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN | RXACTIVE)},/* NOR_BE0N_CLE */ + {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN | RXACTIVE)}, /* NOR_WEN */ + {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUDEN)}, /* NOR WAIT */ + {-1}, +}; +#endif + + void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); @@ -268,6 +318,9 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); configure_module_pin_mux(mmc1_pin_mux); +#if defined(CONFIG_NOR) + configure_module_pin_mux(bone_norcape_pin_mux); +#endif } else if (board_is_gp_evm(header)) { /* General Purpose EVM */ unsigned short profile = detect_daughter_board_profile(); diff --git a/boards.cfg b/boards.cfg index 5d78064..d74840d 100644 --- a/boards.cfg +++ b/boards.cfg @@ -236,6 +236,7 @@ integratorap_cm946es arm arm946es integrator armltd integratorcp_cm946es arm arm946es integrator armltd - integratorcp:CM946ES ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1 +am335x_evm_nor arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,NOR am335x_evm_spiboot arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:SERIAL2,CONS_INDEX=2 am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:SERIAL3,CONS_INDEX=3 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 3df0840..b4d57e1 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -494,4 +494,32 @@ #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ #endif
+/* + * NOR Size = 16 MiB + * Number of Sectors/Blocks = 128 + * Sector Size = 128 KiB + * Word length = 16 bits + * Default layout: + * 0x000000 - 0x07FFFF : U-Boot (512 KiB) + * 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB) + * 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB) + * 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB) + * 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB) + */ +#if defined(CONFIG_NOR) +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_SYS_MAX_FLASH_SECT 128 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BASE (0x08000000) +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#define CONFIG_MTD_DEVICE +#define CONFIG_CMD_FLASH +#endif /* NOR support */ + #endif /* ! __CONFIG_AM335X_EVM_H */
"Tom" == Tom Rini trini@ti.com writes:
Tom> From: Steve Kipisz s-kipisz2@ti.com Tom> This patch adds support for the NOR module that attaches Tom> to the memory cape for a Beaglebone board. This does not Tom> add booting support; only support so that you can boot from Tom> SD/MMC and see the NOR module so that it can be programmed.
Tom> Signed-off-by: Steve Kipisz s-kipisz2@ti.com Tom> [trini: Clean up config changes slightly] Tom> Signed-off-by: Tom Rini trini@ti.com
Tom> --- Tom> Changes in v2: Tom> - Move GPMC config portion into board.c
Tom> Signed-off-by: Tom Rini trini@ti.com Tom> --- Tom> arch/arm/cpu/armv7/am33xx/mem.c | 6 ++++ Tom> arch/arm/include/asm/arch-am33xx/mem.h | 9 ++++++ Tom> board/ti/am335x/board.c | 13 ++++++++ Tom> board/ti/am335x/mux.c | 53 ++++++++++++++++++++++++++++++++ Tom> boards.cfg | 1 + Tom> include/configs/am335x_evm.h | 28 +++++++++++++++++ Tom> 6 files changed, 110 insertions(+)
Tom> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c Tom> index 45f5426..923ea83 100644 Tom> --- a/arch/arm/cpu/armv7/am33xx/mem.c Tom> +++ b/arch/arm/cpu/armv7/am33xx/mem.c Tom> @@ -77,9 +77,15 @@ void gpmc_init(void)
Tom> /* global settings */ Tom> writel(0x00000008, &gpmc_cfg->sysconfig); Tom> +#ifdef CONFIG_NOR Tom> + writel(0x00000000, &gpmc_cfg->irqstatus); Tom> + writel(0x00000000, &gpmc_cfg->irqenable); Tom> + writel(0x00000A00, &gpmc_cfg->config); Tom> +#else Tom> writel(0x00000100, &gpmc_cfg->irqstatus); Tom> writel(0x00000100, &gpmc_cfg->irqenable); Tom> writel(0x00000012, &gpmc_cfg->config); Tom> +#endif
This looks to me as an indication that irqstatus/irqenable/config should really be arguments of gpmc_init().
Tom> /* Tom> * Disable the GPMC0 config set by ROM code Tom> */ Tom> diff --git a/arch/arm/include/asm/arch-am33xx/mem.h b/arch/arm/include/asm/arch-am33xx/mem.h Tom> index c3bf74e..ddcad62 100644 Tom> --- a/arch/arm/include/asm/arch-am33xx/mem.h Tom> +++ b/arch/arm/include/asm/arch-am33xx/mem.h Tom> @@ -61,6 +61,15 @@ Tom> #define M_NAND_GPMC_CONFIG6 0x16000f80 Tom> #define M_NAND_GPMC_CONFIG7 0x00000008
Tom> +/* NOR chip on NOR module for Beaglebone */ Tom> +#define STNOR_GPMC_CONFIG1 0x00001200 Tom> +#define STNOR_GPMC_CONFIG2 0x00101000 Tom> +#define STNOR_GPMC_CONFIG3 0x00030301 Tom> +#define STNOR_GPMC_CONFIG4 0x10041004 Tom> +#define STNOR_GPMC_CONFIG5 0x000C1010 Tom> +#define STNOR_GPMC_CONFIG6 0x08070280 Tom> +#define STNOR_GPMC_CONFIG7 0x00000F48
Why are these not in board/ti/am335x/board.{c,h} if they are beaglebone specific?
Tom> + Tom> /* max number of GPMC Chip Selects */ Tom> #define GPMC_MAX_CS 8 Tom> /* max number of GPMC regs */ Tom> diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c Tom> index 0ee2f7e..3660655 100644 Tom> --- a/board/ti/am335x/board.c Tom> +++ b/board/ti/am335x/board.c Tom> @@ -27,6 +27,7 @@ Tom> #include <asm/arch/gpio.h> Tom> #include <asm/arch/mmc_host_def.h> Tom> #include <asm/arch/sys_proto.h> Tom> +#include <asm/arch/mem.h> Tom> #include <asm/io.h> Tom> #include <asm/emif.h> Tom> #include <asm/gpio.h> Tom> @@ -366,10 +367,22 @@ void s_init(void) Tom> */ Tom> int board_init(void) Tom> { Tom> +#ifdef CONFIG_NOR Tom> + const u32 gpmc_nor[GPMC_MAX_REG] = { STNOR_GPMC_CONFIG1, Tom> + STNOR_GPMC_CONFIG2, STNOR_GPMC_CONFIG3, STNOR_GPMC_CONFIG4, Tom> + STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 }; Tom> +#endif Tom> +gd-> bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
Tom> gpmc_init();
Tom> +#ifdef CONFIG_NOR Tom> + /* Reconfigure CS0 for NOR instead of NAND. */ Tom> + enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0], Tom> + CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M); Tom> +#endif Tom> +
Perhaps the nand handling should just get moved out of gpmc_init() (or the _cs_config args should be passed to gpmc_init() ).
Tom> return 0; Tom> }
On Thu, May 16, 2013 at 04:32:58PM +0200, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Tom> From: Steve Kipisz s-kipisz2@ti.com Tom> This patch adds support for the NOR module that attaches Tom> to the memory cape for a Beaglebone board. This does not Tom> add booting support; only support so that you can boot from Tom> SD/MMC and see the NOR module so that it can be programmed.
[snip]
Tom> @@ -77,9 +77,15 @@ void gpmc_init(void)
Tom> /* global settings */ Tom> writel(0x00000008, &gpmc_cfg->sysconfig); Tom> +#ifdef CONFIG_NOR Tom> + writel(0x00000000, &gpmc_cfg->irqstatus); Tom> + writel(0x00000000, &gpmc_cfg->irqenable); Tom> + writel(0x00000A00, &gpmc_cfg->config); Tom> +#else Tom> writel(0x00000100, &gpmc_cfg->irqstatus); Tom> writel(0x00000100, &gpmc_cfg->irqenable); Tom> writel(0x00000012, &gpmc_cfg->config); Tom> +#endif
This looks to me as an indication that irqstatus/irqenable/config should really be arguments of gpmc_init().
Perhaps. I've still got an open poke about what's going on, exactly here.
[snip]
Tom> +/* NOR chip on NOR module for Beaglebone */ Tom> +#define STNOR_GPMC_CONFIG1 0x00001200 Tom> +#define STNOR_GPMC_CONFIG2 0x00101000 Tom> +#define STNOR_GPMC_CONFIG3 0x00030301 Tom> +#define STNOR_GPMC_CONFIG4 0x10041004 Tom> +#define STNOR_GPMC_CONFIG5 0x000C1010 Tom> +#define STNOR_GPMC_CONFIG6 0x08070280 Tom> +#define STNOR_GPMC_CONFIG7 0x00000F48
Why are these not in board/ti/am335x/board.{c,h} if they are beaglebone specific?
The timings would be valid to anyone using the same NOR on a custom chip. I'll re-word the comment.
Tom> +#ifdef CONFIG_NOR Tom> + /* Reconfigure CS0 for NOR instead of NAND. */ Tom> + enable_gpmc_cs_config(gpmc_nor, &gpmc_cfg->cs[0], Tom> + CONFIG_SYS_FLASH_BASE, GPMC_SIZE_16M); Tom> +#endif Tom> +
Perhaps the nand handling should just get moved out of gpmc_init() (or the _cs_config args should be passed to gpmc_init() ).
I looked at this, on the scale of redoing omap3 too (where we have a lot of existing examples). The split we've got now works and it's harmless to re-configure CS0 in the case where the defaults don't work. I think this would lead us to an abstraction that leads to a lot of board files duplicating the same code.
"Tom" == Tom Rini trini@ti.com writes:
Hi,
Perhaps the nand handling should just get moved out of gpmc_init() (or the _cs_config args should be passed to gpmc_init() ).
Tom> I looked at this, on the scale of redoing omap3 too (where we have a lot Tom> of existing examples). The split we've got now works and it's harmless Tom> to re-configure CS0 in the case where the defaults don't work. I think Tom> this would lead us to an abstraction that leads to a lot of board files Tom> duplicating the same code.
Maybe the solution is simply to have:
init_gpmc_nand() and init_gpmc_nor()
?
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 05/16/2013 02:54 PM, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Hi,
Perhaps the nand handling should just get moved out of gpmc_init() (or the _cs_config args should be passed to gpmc_init() ).
Tom> I looked at this, on the scale of redoing omap3 too (where we have a lot Tom> of existing examples). The split we've got now works and it's harmless Tom> to re-configure CS0 in the case where the defaults don't work. I think Tom> this would lead us to an abstraction that leads to a lot of board files Tom> duplicating the same code.
Maybe the solution is simply to have:
init_gpmc_nand() and init_gpmc_nor()
It boils down to: a) Give all of CS0 to NAND b) Give all of CS0 to NOR c) Split CS0 into some number of segments for whatever the board wants.
What I had looked at doing before posting was: mem.c: __weak void configure_gpmc_cs0() { enable nand } gpmc_init() { ... general init ... configure_gpmc_cs0() }
board-fu: void configure_gpmc_cs0() { ... let the board sort it out ... }
But I ended up with one non-default on all of omap3,which just says "lets re-program cs0 for our split".
- -- Tom
"Tom" == Tom Rini trini@ti.com writes:
Hi,
Tom> But I ended up with one non-default on all of omap3,which just Tom> says "lets re-program cs0 for our split".
Ok, thanks.
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
Signed-off-by: Steve Kipisz s-kipisz2@ti.com Signed-off-by: Tom Rini trini@ti.com
--- Changes in v2: - Reword commit message slightly --- arch/arm/cpu/armv7/am33xx/emif4.c | 6 +- board/ti/am335x/Makefile | 2 +- board/ti/am335x/board.c | 31 ++++++++++- board/ti/am335x/mux.c | 6 +- board/ti/am335x/u-boot.lds | 110 +++++++++++++++++++++++++++++++++++++ boards.cfg | 1 + include/configs/am335x_evm.h | 26 ++++++++- 7 files changed, 173 insertions(+), 9 deletions(-) create mode 100644 board/ti/am335x/u-boot.lds
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index aa84e96..370230b 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -43,9 +43,11 @@ void dram_init_banksize(void) }
-#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) +#ifdef CONFIG_TI81XX static struct dmm_lisa_map_regs *hw_lisa_map_regs = (struct dmm_lisa_map_regs *)DMM_BASE; +#endif static struct vtp_reg *vtpreg[2] = { (struct vtp_reg *)VTP0_CTRL_ADDR, (struct vtp_reg *)VTP1_CTRL_ADDR}; @@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = { static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; #endif
+#ifdef CONFIG_TI81XX void config_dmm(const struct dmm_lisa_map_regs *regs) { enable_dmm_clocks(); @@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs) writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1); writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0); } +#endif
static void config_vtp(int nr) { diff --git a/board/ti/am335x/Makefile b/board/ti/am335x/Makefile index 67a87a1..1795e3e 100644 --- a/board/ti/am335x/Makefile +++ b/board/ti/am335x/Makefile @@ -18,7 +18,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).o
-ifdef CONFIG_SPL_BUILD +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) COBJS := mux.o endif
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c index 3660655..69b8e0d 100644 --- a/board/ti/am335x/board.c +++ b/board/ti/am335x/board.c @@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || (CONFIG_NOR_BOOT) static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; #endif
@@ -95,7 +95,7 @@ static int read_eeprom(struct am335x_baseboard_id *header) }
/* UART Defines */ -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) #define UART_RESET (0x1 << 1) #define UART_CLK_RUNNING_MASK 0x1 #define UART_SMART_IDLE_EN (0x1 << 0x3) @@ -274,6 +274,24 @@ void s_init(void) { __maybe_unused struct am335x_baseboard_id header;
+ /* + * The ROM will only have set up sufficient pinmux to allow for the + * first 4KiB NOR to be read, we must finish doing what we know of + * the NOR mux in this space in order to continue. + */ +#ifdef CONFIG_NOR_BOOT + asm("stmfd sp!, {r2 - r4}"); + asm("movw r4, #0x8A4"); + asm("movw r3, #0x44E1"); + asm("orr r4, r4, r3, lsl #16"); + asm("mov r2, #9"); + asm("mov r3, #8"); + asm("gpmc_mux: str r2, [r4], #4"); + asm("subs r3, r3, #1"); + asm("bne gpmc_mux"); + asm("ldmfd sp!, {r2 - r4}"); +#endif + /* WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets */ @@ -284,7 +302,7 @@ void s_init(void) while (readl(&wdtimer->wdtwwps) != 0x0) ;
-#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) /* Setup the PLLs and the clocks for the peripherals */ pll_init();
@@ -325,9 +343,16 @@ void s_init(void) regVal |= UART_SMART_IDLE_EN; writel(regVal, &uart_base->uartsyscfg);
+#if defined(CONFIG_NOR_BOOT) + /* We want our console now. */ + gd->baudrate = CONFIG_BAUDRATE; + serial_init(); + gd->have_console = 1; +#else gd = &gdata;
preloader_console_init(); +#endif
/* Initalize the board header */ enable_i2c0_pin_mux(); diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 187468e..5b7ed63 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -190,7 +190,7 @@ static struct module_pin_mux nand_pin_mux[] = { {-1}, };
-#if defined(CONFIG_NOR) +#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT) static struct module_pin_mux bone_norcape_pin_mux[] = { {OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A0 */ {OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE}, /* NOR_A1 */ @@ -317,8 +317,10 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header) configure_module_pin_mux(i2c1_pin_mux); configure_module_pin_mux(mii1_pin_mux); configure_module_pin_mux(mmc0_pin_mux); +#ifndef CONFIG_NOR configure_module_pin_mux(mmc1_pin_mux); -#if defined(CONFIG_NOR) +#endif +#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT) configure_module_pin_mux(bone_norcape_pin_mux); #endif } else if (board_is_gp_evm(header)) { diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds new file mode 100644 index 0000000..d376743 --- /dev/null +++ b/board/ti/am335x/u-boot.lds @@ -0,0 +1,110 @@ +/* + * Copyright (c) 2004-2008 Texas Instruments + * + * (C) Copyright 2002 + * Gary Jennejohn, DENX Software Engineering, garyj@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + __image_copy_start = .; + CPUDIR/start.o (.text*) + board/ti/am335x/libam335x.o (.text*) + *(.text*) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { + *(.data*) + } + + . = ALIGN(4); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + . = ALIGN(4); + + __image_copy_end = .; + + .rel.dyn : { + __rel_dyn_start = .; + *(.rel*) + __rel_dyn_end = .; + } + + .dynsym : { + __dynsym_start = .; + *(.dynsym) + } + + _end = .; + + /* + * Deprecated: this MMU section is used by pxa at present but + * should not be used by new boards/CPUs. + */ + . = ALIGN(4096); + .mmutable : { + *(.mmutable) + } + +/* + * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c + * __bss_base and __bss_limit are for linker only (overlay ordering) + */ + + .bss_start __rel_dyn_start (OVERLAY) : { + KEEP(*(.__bss_start)); + __bss_base = .; + } + + .bss __bss_base (OVERLAY) : { + *(.bss*) + . = ALIGN(4); + __bss_limit = .; + } + + .bss_end __bss_limit (OVERLAY) : { + KEEP(*(.__bss_end)); + } + + /DISCARD/ : { *(.dynstr*) } + /DISCARD/ : { *(.dynamic*) } + /DISCARD/ : { *(.plt*) } + /DISCARD/ : { *(.interp*) } + /DISCARD/ : { *(.gnu*) } +} diff --git a/boards.cfg b/boards.cfg index d74840d..90e018f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -237,6 +237,7 @@ integratorcp_cm946es arm arm946es integrator armltd ca9x4_ct_vxp arm armv7 vexpress armltd am335x_evm arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1 am335x_evm_nor arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,NOR +am335x_evm_norboot arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT am335x_evm_spiboot arm armv7 am335x ti am33xx am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT am335x_evm_uart1 arm armv7 am335x ti am33xx am335x_evm:SERIAL2,CONS_INDEX=2 am335x_evm_uart2 arm armv7 am335x ti am33xx am335x_evm:SERIAL3,CONS_INDEX=3 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index b4d57e1..f246111 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -39,6 +39,9 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG
+/* Custom script for NOR */ +#define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds" + #define CONFIG_SYS_CACHELINE_SIZE 64
/* commands to include */ @@ -300,6 +303,7 @@ #define CONFIG_ENV_OVERWRITE 1 #define CONFIG_SYS_CONSOLE_INFO_QUIET
+#ifndef CONFIG_NOR_BOOT /* Defines for SPL */ #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK @@ -344,6 +348,7 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC #endif +#endif #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) @@ -376,14 +381,18 @@ * header. That is 0x800FFFC0--0x80100000 should not be used for any * other needs. */ +#ifdef CONFIG_NOR_BOOT +#define CONFIG_SYS_TEXT_BASE 0x08000000 +#else #define CONFIG_SYS_TEXT_BASE 0x80800000 +#endif #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
/* Since SPL did pll and ddr initialization for us, * we don't need to do it twice. */ -#ifndef CONFIG_SPL_BUILD +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) #define CONFIG_SKIP_LOWLEVEL_INIT #endif
@@ -468,7 +477,7 @@ #define CONFIG_PHY_ADDR 0 #define CONFIG_PHY_SMSC
-#if !defined(CONFIG_SPI_BOOT) +#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT) #define CONFIG_NAND #endif
@@ -518,6 +527,19 @@ #define CONFIG_SYS_FLASH_BASE (0x08000000) #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +#ifdef CONFIG_NOR_BOOT +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ +#define CONFIG_ENV_OFFSET (512 << 10) /* 512 KiB */ +#define CONFIG_ENV_OFFSET_REDUND (768 << 10) /* 768 KiB */ +#define CONFIG_CMD_MTDPARTS +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ + "512k(u-boot)," \ + "128k(u-boot-env1)," \ + "128k(u-boot-env2)," \ + "4m(kernel),-(rootfs)" +#endif #define CONFIG_MTD_DEVICE #define CONFIG_CMD_FLASH #endif /* NOR support */
"Tom" == Tom Rini trini@ti.com writes:
Tom> From: Steve Kipisz s-kipisz2@ti.com Tom> NOR requires that s_init be within the first 4KiB of the image so that Tom> we can perform the rest of the required pinmuxing to talk with the rest Tom> of NOR that we are found on. When NOR_BOOT is set we save our Tom> environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid Tom> using SPL for this case and u-boot.bin is written directly to the start Tom> of NOR.
Tom> Signed-off-by: Steve Kipisz s-kipisz2@ti.com Tom> Signed-off-by: Tom Rini trini@ti.com
Tom> --- Tom> Changes in v2: Tom> - Reword commit message slightly Tom> --- Tom> arch/arm/cpu/armv7/am33xx/emif4.c | 6 +- Tom> board/ti/am335x/Makefile | 2 +- Tom> board/ti/am335x/board.c | 31 ++++++++++- Tom> board/ti/am335x/mux.c | 6 +- Tom> board/ti/am335x/u-boot.lds | 110 +++++++++++++++++++++++++++++++++++++ Tom> boards.cfg | 1 + Tom> include/configs/am335x_evm.h | 26 ++++++++- Tom> 7 files changed, 173 insertions(+), 9 deletions(-) Tom> create mode 100644 board/ti/am335x/u-boot.lds
Tom> diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c Tom> index aa84e96..370230b 100644 Tom> --- a/arch/arm/cpu/armv7/am33xx/emif4.c Tom> +++ b/arch/arm/cpu/armv7/am33xx/emif4.c Tom> @@ -43,9 +43,11 @@ void dram_init_banksize(void) Tom> }
Tom> -#ifdef CONFIG_SPL_BUILD Tom> +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) Tom> +#ifdef CONFIG_TI81XX Tom> static struct dmm_lisa_map_regs *hw_lisa_map_regs = Tom> (struct dmm_lisa_map_regs *)DMM_BASE; Tom> +#endif Tom> static struct vtp_reg *vtpreg[2] = { Tom> (struct vtp_reg *)VTP0_CTRL_ADDR, Tom> (struct vtp_reg *)VTP1_CTRL_ADDR}; Tom> @@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = { Tom> static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; Tom> #endif
Tom> +#ifdef CONFIG_TI81XX
Why are you adding the TI81XX dependency here? That doesn't have anything to do with nor boot, does it?
Tom> void config_dmm(const struct dmm_lisa_map_regs *regs) Tom> { Tom> enable_dmm_clocks(); Tom> @@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs) Tom> writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1); Tom> writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0); Tom> } Tom> +#endif
On Thu, May 16, 2013 at 04:36:02PM +0200, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Tom> From: Steve Kipisz s-kipisz2@ti.com Tom> NOR requires that s_init be within the first 4KiB of the image so that Tom> we can perform the rest of the required pinmuxing to talk with the rest Tom> of NOR that we are found on. When NOR_BOOT is set we save our Tom> environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid Tom> using SPL for this case and u-boot.bin is written directly to the start Tom> of NOR.
[snip]
Tom> -#ifdef CONFIG_SPL_BUILD Tom> +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) Tom> +#ifdef CONFIG_TI81XX Tom> static struct dmm_lisa_map_regs *hw_lisa_map_regs = Tom> (struct dmm_lisa_map_regs *)DMM_BASE; Tom> +#endif Tom> static struct vtp_reg *vtpreg[2] = { Tom> (struct vtp_reg *)VTP0_CTRL_ADDR, Tom> (struct vtp_reg *)VTP1_CTRL_ADDR}; Tom> @@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = { Tom> static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; Tom> #endif
Tom> +#ifdef CONFIG_TI81XX
Why are you adding the TI81XX dependency here? That doesn't have anything to do with nor boot, does it?
dmm is TI81XX-only (for this file, it's also omap4+) and since main U-Boot doesn't use --ffunction-sections/--fdata-sections/--gc-sections we end up with a link error about not having enable_dmm_clocks(). This is OK on SPL since we do use --gc-sections and the link error is avoided as we discard config_dmm on am33xx builds.
"Tom" == Tom Rini trini@ti.com writes:
Hi,
Tom> +#ifdef CONFIG_TI81XX
Why are you adding the TI81XX dependency here? That doesn't have anything to do with nor boot, does it?
Tom> dmm is TI81XX-only (for this file, it's also omap4+) and since main Tom> U-Boot doesn't use --ffunction-sections/--fdata-sections/--gc-sections Tom> we end up with a link error about not having enable_dmm_clocks(). This Tom> is OK on SPL since we do use --gc-sections and the link error is avoided Tom> as we discard config_dmm on am33xx builds.
Ok, that's interesting info which imho belongs in the commit message.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 05/16/2013 02:55 PM, Peter Korsgaard wrote:
"Tom" == Tom Rini trini@ti.com writes:
Hi,
Tom> +#ifdef CONFIG_TI81XX
Why are you adding the TI81XX dependency here? That doesn't have anything to do with nor boot, does it?
Tom> dmm is TI81XX-only (for this file, it's also omap4+) and since main Tom> U-Boot doesn't use --ffunction-sections/--fdata-sections/--gc-sections Tom> we end up with a link error about not having enable_dmm_clocks(). This Tom> is OK on SPL since we do use --gc-sections and the link error is avoided Tom> as we discard config_dmm on am33xx builds.
Ok, that's interesting info which imho belongs in the commit message.
Reworded, thanks!
- -- Tom
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Using a non "NOR_BOOT" version, I can boot u-boot and read / write to the NOR device (located at 0x08000000).
So I've compiled my "NOR_BOOT" version and stored it at the start of the flash device.
But when I switch to booting from NOR (rather than SD) I get no output on the serial console.
Using an oscilloscope, I can see the NOR chip select is active for a while (approx 350us), so *something* is trying to boot.
How can I debug such an early part of the boot process ?
Thanks for any help you can give me.
Regards Mark J.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 06/17/2013 10:43 AM, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Using a non "NOR_BOOT" version, I can boot u-boot and read / write to the NOR device (located at 0x08000000).
So I've compiled my "NOR_BOOT" version and stored it at the start of the flash device.
But when I switch to booting from NOR (rather than SD) I get no output on the serial console.
Using an oscilloscope, I can see the NOR chip select is active for a while (approx 350us), so *something* is trying to boot.
How can I debug such an early part of the boot process ?
Did you copy the parts that setup the pinmuxing in s_init for NOR?
- -- Tom
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Mark J.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 06/17/2013 10:59 AM, Mark Jackson wrote:
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Right. Well, baring hints from Steve, time to hook up the JTAG and see where it's stuck.
- -- Tom
On 17/06/13 16:01, Tom Rini wrote:
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 06/17/2013 10:59 AM, Mark Jackson wrote:
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Right. Well, baring hints from Steve, time to hook up the JTAG and see where it's stuck.
Urm ... unfortunately, we have no JTAG on this board ... :-(
On 17/06/13 15:59, Mark Jackson wrote:
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Below is my entire s_init() routine.
One question ... the SPL code has:-
... gd = &gdata; ...
But there seems to be no similar assignment when in NOR boot mode. I'm no expert in the internal workings of u-boot, so I thought I'd check, just in case !?!
Cheers Mark J. --- void s_init(void) { /* * The ROM will only have set up sufficient pinmux to allow for the * first 4KiB NOR to be read, we must finish doing what we know of * the NOR mux in this space in order to continue. */ #ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
/* * Save the boot parameters passed from romcode. * We cannot delay the saving further than this, * to prevent overwrites. */ #if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) save_omap_boot_params(); #endif
/* WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets */ writel(0xAAAA, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ; writel(0x5555, &wdtimer->wdtwspr); while (readl(&wdtimer->wdtwwps) != 0x0) ;
#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) /* Setup the PLLs and the clocks for the peripherals */ pll_init();
/* Enable RTC32K clock */ rtc32k_enable();
enable_board_pin_mux();
/* UART softreset */ u32 regVal; regVal = readl(&uart_base->uartsyscfg); regVal |= UART_RESET; writel(regVal, &uart_base->uartsyscfg); while ((readl(&uart_base->uartsyssts) & UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) ;
/* Disable smart idle */ regVal = readl(&uart_base->uartsyscfg); regVal |= UART_SMART_IDLE_EN; writel(regVal, &uart_base->uartsyscfg);
#if defined(CONFIG_NOR_BOOT) /* We want our console now. */ gd->baudrate = CONFIG_BAUDRATE; serial_init(); gd->have_console = 1; puts("\nU-Boot NOR Boot\n"); #else gd = &gdata;
preloader_console_init(); #endif
config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data, &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); #endif /* CONFIG_SPL_BUILD */ }
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 06/17/2013 11:23 AM, Mark Jackson wrote:
On 17/06/13 15:59, Mark Jackson wrote:
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Below is my entire s_init() routine.
One question ... the SPL code has:-
... gd = &gdata; ...
But there seems to be no similar assignment when in NOR boot mode. I'm no expert in the internal workings of u-boot, so I thought I'd check, just in case !?!
Maybe some of the recent changes broke things? I recall having to take a bit to track down where gd is assigned in the non-SPL case before..
- -- Tom
Hi Mark,
On 17.06.2013 17:23, Mark Jackson wrote:
On 17/06/13 15:59, Mark Jackson wrote:
On 17/06/13 15:49, Tom Rini wrote:
<snip>
Did you copy the parts that setup the pinmuxing in s_init for NOR?
This bit ?
#ifdef CONFIG_NOR_BOOT asm("stmfd sp!, {r2 - r4}"); asm("movw r4, #0x8A4"); asm("movw r3, #0x44E1"); asm("orr r4, r4, r3, lsl #16"); asm("mov r2, #9"); asm("mov r3, #8"); asm("gpmc_mux: str r2, [r4], #4"); asm("subs r3, r3, #1"); asm("bne gpmc_mux"); asm("ldmfd sp!, {r2 - r4}"); #endif
Yes ... :-)
Below is my entire s_init() routine.
One question ... the SPL code has:-
... gd = &gdata; ...
But there seems to be no similar assignment when in NOR boot mode. I'm no expert in the internal workings of u-boot, so I thought I'd check, just in case !?!
I just noticed you mentioning "gd" here and wanted to point you to a patch that fixed a gd-related boot issue for me on OMAP3:
[U-Boot] [PATCH 1/3] arm: spl: Fix SPL booting for OMAP3
(sorry, I can't find a link to this patch right now and I'm in a hurry)
Not sure if this has something to do with your problem (I don't have the time to dig into this mail thread today as I'm leaving right now).
Cheers, Stefan
On 17/06/13 17:01, Stefan Roese wrote:
Hi Mark,
On 17.06.2013 17:23, Mark Jackson wrote:
<snip>
One question ... the SPL code has:-
... gd = &gdata; ...
But there seems to be no similar assignment when in NOR boot mode. I'm no expert in the internal workings of u-boot, so I thought I'd check, just in case !?!
I just noticed you mentioning "gd" here and wanted to point you to a patch that fixed a gd-related boot issue for me on OMAP3:
[U-Boot] [PATCH 1/3] arm: spl: Fix SPL booting for OMAP3
(sorry, I can't find a link to this patch right now and I'm in a hurry)
Not sure if this has something to do with your problem (I don't have the time to dig into this mail thread today as I'm leaving right now).
I'll look at that thanks.
But I've taken a slightly different approach, and added the following to the start of s_init() ...
void s_init(void) { unsigned short *p = (unsigned short*)0x08000000; while (1) { int i; for (i = 0; i < (1 * 1024); i++) { unsigned short d = p[i]; d++; *p = d; } } ...
AFAICT, that should just spin on reading/writing the NOR device, but I still get only an initial 350us burst on the CS0 line, and then nothing.
So I can only assume that the boot code isn't getting as far as s_init() at all !!
In start.S and low_levelinit.c, there are various uses of:-
#ifdef CONFIG_SPL_BUILD
Do any of these also need referencing with a CONFIG_NOR_BOOT ?
Mark J.
-----Original Message----- From: Mark Jackson [mailto:mpfj-list@newflow.co.uk] Sent: Monday, June 17, 2013 11:10 AM To: Stefan Roese Cc: Rini, Tom; Kipisz, Steven; u-boot@lists.denx.de Subject: Re: [U-Boot] [PATCH v2 7/7] am335x_evm: Add support to boot from NOR.
On 17/06/13 17:01, Stefan Roese wrote:
Hi Mark,
On 17.06.2013 17:23, Mark Jackson wrote:
<snip>
One question ... the SPL code has:-
... gd = &gdata; ...
But there seems to be no similar assignment when in NOR boot mode. I'm no expert in the internal workings of u-boot, so I thought I'd check, just in case !?!
I just noticed you mentioning "gd" here and wanted to point you to a patch that fixed a gd-related boot issue for me on OMAP3:
[U-Boot] [PATCH 1/3] arm: spl: Fix SPL booting for OMAP3
(sorry, I can't find a link to this patch right now and I'm in a hurry)
Not sure if this has something to do with your problem (I don't have the time to dig into this mail thread today as I'm leaving right now).
I'll look at that thanks.
But I've taken a slightly different approach, and added the following to the start of s_init() ...
void s_init(void) { unsigned short *p = (unsigned short*)0x08000000; while (1) { int i; for (i = 0; i < (1 * 1024); i++) { unsigned short d = p[i]; d++; *p = d; } } ...
AFAICT, that should just spin on reading/writing the NOR device, but I still get only an initial 350us burst on the CS0 line, and then nothing.
So I can only assume that the boot code isn't getting as far as s_init() at all !!
In start.S and low_levelinit.c, there are various uses of:-
#ifdef CONFIG_SPL_BUILD
Do any of these also need referencing with a CONFIG_NOR_BOOT ?
Mark J.
Do you have a u-boot.lds in board/ti/am335x? That should put s_init() earlier in the boot. Also, include/configs/am335x_evm.h should have /* Custom script for NOR */ #define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
Before using JTAG, take a look in System.map where s_init is located. For a multiplex NOR it should be in the first 64K of address space.
Steve K.
On 17/06/13 18:04, Kipisz, Steven wrote:
<snip>
I'll look at that thanks.
But I've taken a slightly different approach, and added the following to the start of s_init() ...
void s_init(void) { unsigned short *p = (unsigned short*)0x08000000; while (1) { int i; for (i = 0; i < (1 * 1024); i++) { unsigned short d = p[i]; d++; *p = d; } } ...
AFAICT, that should just spin on reading/writing the NOR device, but I still get only an initial 350us burst on the CS0 line, and then nothing.
So I can only assume that the boot code isn't getting as far as s_init() at all !!
In start.S and low_levelinit.c, there are various uses of:-
#ifdef CONFIG_SPL_BUILD
Do any of these also need referencing with a CONFIG_NOR_BOOT ?
Mark J.
Do you have a u-boot.lds in board/ti/am335x? That should put s_init() earlier in the boot. Also, include/configs/am335x_evm.h should have /* Custom script for NOR */ #define CONFIG_SYS_LDSCRIPT "board/ti/am335x/u-boot.lds"
Yes ... I have both u-boot.lds in my board directory, and the reference to it in the config.
#define CONFIG_SYS_LDSCRIPT "board/newflow/nanobone/u-boot.lds"
Before using JTAG, take a look in System.map where s_init is located. For a multiplex NOR it should be in the first 64K of address space.
That all seems in order ...
08000000 T __image_copy_start 08000000 T _start 08000020 t _undefined_instruction 08000024 t _software_interrupt 08000028 t _prefetch_abort 0800002c t _data_abort 08000030 t _not_used 08000034 t _irq 08000038 t _fiq 0800003c t _pad 08000040 T _TEXT_BASE 08000040 T _end_vect 08000044 T _bss_start_ofs 08000048 T _bss_end_ofs 0800004c T _end_ofs 08000050 T IRQ_STACK_START_IN 08000054 t reset 08000094 T c_runtime_cpu_setup 080000b0 T cpu_init_cp15 080000e8 T cpu_init_crit 08000100 t undefined_instruction 08000160 t software_interrupt 080001c0 t prefetch_abort 08000220 t data_abort 08000280 t not_used 080002e0 t irq 08000340 t fiq 080003a0 T enable_board_pin_mux 08000444 t cpsw_control 08000448 T s_init <<<<<<<<<<<<<<<<<<<<<<<<< 08000464 t gpmc_mux 08000568 T board_init 080005d8 T board_late_init 0800060c T board_eth_init 0800076c T enable_gpmc_cs_config 080007e0 T gpmc_init ...
On 17/06/13 15:43, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Just an update ... I now have it working ... yay !!
The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects 8/16bit mode) was being incorrectly influenced by a hardware fault.
I have pulled quite a few patches from various places, some of which might not be required. Now I have a working base, I'll work out what is needed on top of Tom's original patch set.
Thanks for everyone's support.
Mark J.
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Just an update ... I now have it working ... yay !!
The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects 8/16bit mode) was being incorrectly influenced by a hardware fault.
I have pulled quite a few patches from various places, some of which might not be required. Now I have a working base, I'll work out what is needed on top of Tom's original patch set.
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
Cheers Mark J. --- arch/arm/config.mk | 2 +- arch/arm/cpu/armv7/am33xx/board.c | 2 +- arch/arm/cpu/armv7/am33xx/emif4.c | 6 +++++- arch/arm/cpu/armv7/am33xx/mem.c | 18 ++++++++---------- arch/arm/cpu/armv7/lowlevel_init.S | 2 +- arch/arm/cpu/armv7/omap3/mem.c | 18 ++++-------------- arch/arm/cpu/armv7/start.S | 2 +- 7 files changed, 21 insertions(+), 29 deletions(-)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e80e1ed..ba310cb 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -111,6 +111,6 @@ endif endif
# check that only R_ARM_RELATIVE relocations are generated -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) ALL-y += checkarmreloc endif diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index b935a29..3085292 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -150,7 +150,7 @@ int arch_misc_init(void) return 0; }
-#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) void rtc32k_enable(void) { struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE; diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index aa84e96..370230b 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -43,9 +43,11 @@ void dram_init_banksize(void) }
-#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) +#ifdef CONFIG_TI81XX static struct dmm_lisa_map_regs *hw_lisa_map_regs = (struct dmm_lisa_map_regs *)DMM_BASE; +#endif static struct vtp_reg *vtpreg[2] = { (struct vtp_reg *)VTP0_CTRL_ADDR, (struct vtp_reg *)VTP1_CTRL_ADDR}; @@ -53,6 +55,7 @@ static struct vtp_reg *vtpreg[2] = { static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR; #endif
+#ifdef CONFIG_TI81XX void config_dmm(const struct dmm_lisa_map_regs *regs) { enable_dmm_clocks(); @@ -67,6 +70,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs) writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1); writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0); } +#endif
static void config_vtp(int nr) { diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c index b86b0de..923ea83 100644 --- a/arch/arm/cpu/armv7/am33xx/mem.c +++ b/arch/arm/cpu/armv7/am33xx/mem.c @@ -75,16 +75,17 @@ void gpmc_init(void) /* putting a blanket check on GPMC based on ZeBu for now */ gpmc_cfg = (struct gpmc *)GPMC_BASE;
-#ifdef CONFIG_CMD_NAND - const u32 *gpmc_config = NULL; - u32 base = 0; - u32 size = 0; -#endif /* global settings */ writel(0x00000008, &gpmc_cfg->sysconfig); +#ifdef CONFIG_NOR + writel(0x00000000, &gpmc_cfg->irqstatus); + writel(0x00000000, &gpmc_cfg->irqenable); + writel(0x00000A00, &gpmc_cfg->config); +#else writel(0x00000100, &gpmc_cfg->irqstatus); writel(0x00000100, &gpmc_cfg->irqenable); writel(0x00000012, &gpmc_cfg->config); +#endif /* * Disable the GPMC0 config set by ROM code */ @@ -92,10 +93,7 @@ void gpmc_init(void) sdelay(1000);
#ifdef CONFIG_CMD_NAND - gpmc_config = gpmc_m_nand; - - base = PISMO1_NAND_BASE; - size = PISMO1_NAND_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], + CONFIG_SYS_NAND_BASE, GPMC_SIZE_256M); #endif } diff --git a/arch/arm/cpu/armv7/lowlevel_init.S b/arch/arm/cpu/armv7/lowlevel_init.S index 0a15aa4..eed9336 100644 --- a/arch/arm/cpu/armv7/lowlevel_init.S +++ b/arch/arm/cpu/armv7/lowlevel_init.S @@ -37,7 +37,7 @@ ENTRY(lowlevel_init) */ ldr sp, =CONFIG_SYS_INIT_SP_ADDR bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) ldr r8, =gdata #else sub sp, #GD_SIZE diff --git a/arch/arm/cpu/armv7/omap3/mem.c b/arch/arm/cpu/armv7/omap3/mem.c index d04a5a1..6f65a73 100644 --- a/arch/arm/cpu/armv7/omap3/mem.c +++ b/arch/arm/cpu/armv7/omap3/mem.c @@ -113,11 +113,6 @@ void gpmc_init(void) { /* putting a blanket check on GPMC based on ZeBu for now */ gpmc_cfg = (struct gpmc *)GPMC_BASE; -#if defined(CONFIG_CMD_NAND) || defined(CONFIG_CMD_ONENAND) - const u32 *gpmc_config = NULL; - u32 base = 0; - u32 size = 0; -#endif u32 config = 0;
/* global settings */ @@ -136,17 +131,12 @@ void gpmc_init(void) sdelay(1000);
#if defined(CONFIG_CMD_NAND) /* CS 0 */ - gpmc_config = gpmc_m_nand; - - base = PISMO1_NAND_BASE; - size = PISMO1_NAND_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_m_nand, &gpmc_cfg->cs[0], PISMO1_NAND_BASE, + PISMO1_NAND_SIZE); #endif
#if defined(CONFIG_CMD_ONENAND) - gpmc_config = gpmc_onenand; - base = PISMO1_ONEN_BASE; - size = PISMO1_ONEN_SIZE; - enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size); + enable_gpmc_cs_config(gpmc_onenand, &gpmc_cfg->cs[0], PISMO1_ONEN_BASE, + PISMO1_ONEN_SIZE); #endif } diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index 8e9cb19..082998c 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -44,7 +44,7 @@ _start: b reset ldr pc, _not_used ldr pc, _irq ldr pc, _fiq -#ifdef CONFIG_SPL_BUILD +#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT) _undefined_instruction: .word _undefined_instruction _software_interrupt: .word _software_interrupt _prefetch_abort: .word _prefetch_abort
On Thu, Jul 11, 2013 at 02:06:26PM +0100, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Just an update ... I now have it working ... yay !!
The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects 8/16bit mode) was being incorrectly influenced by a hardware fault.
I have pulled quite a few patches from various places, some of which might not be required. Now I have a working base, I'll work out what is needed on top of Tom's original patch set.
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
I'm just starting to cycle back to the NOR patches again myself and fixup the few remaining comments. But in your series:
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e80e1ed..ba310cb 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -111,6 +111,6 @@ endif endif
# check that only R_ARM_RELATIVE relocations are generated -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) ALL-y += checkarmreloc endif
What toolchain are you using? This seems worrying at best.
On 11/07/13 14:28, Tom Rini wrote:
On Thu, Jul 11, 2013 at 02:06:26PM +0100, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
I'm just starting to cycle back to the NOR patches again myself and fixup the few remaining comments. But in your series:
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e80e1ed..ba310cb 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -111,6 +111,6 @@ endif endif
# check that only R_ARM_RELATIVE relocations are generated -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) ALL-y += checkarmreloc endif
What toolchain are you using? This seems worrying at best.
Generated via Buildroot ... here's the (rather copious) version info ...
mpfj@mpfj-nanobone:~/uboot/u-boot$ arm-linux-gcc --version -v Using built-in specs. COLLECT_GCC=arm-linux-gcc COLLECT_LTO_WRAPPER=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/lto-wrapper arm-linux-gcc (Buildroot 2013.02-dirty) 4.6.3 Copyright (C) 2011 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Target: arm-buildroot-linux-uclibcgnueabi Configured with: /home/mpfj/buildroot/output/toolchain/gcc-4.6.3/configure --prefix=/home/mpfj/buildroot/output/host/usr --build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu --target=arm-buildroot-linux-uclibcgnueabi --enable-languages=c,c++ --with-sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --with-build-time-tools=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/bin --disable-__cxa_atexit --enable-target-optspace --disable-libquadmath --disable-libgomp --with-gnu-ld --disable-libssp --disable-multilib --enable-tls --enable-shared --with-gmp=/home/mpfj/buildroot/output/host/usr --with-mpfr=/home/mpfj/buildroot/output/host/usr --with-mpc=/home/mpfj/buildroot/output/host/usr --disable-nls --enable-threads --disable-decimal-float --with-abi=aapcs-linux --with-arch=armv7-a --with-tune=cortex-a8 --disable-largefile --with-pkgversion='Buildroot 2013.02-dirty' --with-bugurl=http://bugs.buildroot.net/ --with -fpu=vfpv 3 --with-float=hard Thread model: posix gcc version 4.6.3 (Buildroot 2013.02-dirty) COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/cc1 -quiet -v help-dummy -quiet -dumpbase help-dummy -march=armv7-a -mtune=cortex-a8 -mfloat-abi=hard -mfpu=vfpv3 -mabi=aapcs-linux -auxbase help-dummy -version --version -o /tmp/cczFlXPw.s GNU C (Buildroot 2013.02-dirty) version 4.6.3 (arm-buildroot-linux-uclibcgnueabi) compiled by GNU C version 4.6.3, GMP version 5.1.0, MPFR version 3.1.1-p2, MPC version 1.0.1 GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/as -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3 -meabi=5 --version -o /tmp/ccgLl9x8.o /tmp/cczFlXPw.s GNU assembler (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. This assembler was configured for a target of `arm-buildroot-linux-uclibcgnueabi'. COMPILER_PATH=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ LIBRARY_PATH=/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/ COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/collect2 --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib /tmp/ccgLl9x8.o -lgcc --as-needed - lgcc_s -- no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o collect2 version 4.6.3 (ARM GNU/Linux with ELF) /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ld --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/ lib /tmp/ ccgLl9x8.o -lgcc --as-needed -lgcc_s --no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o GNU ld (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or (at your option) a later version. This program has absolutely no warranty.
Hi Mark,
On Thu, 11 Jul 2013 14:45:08 +0100, Mark Jackson mpfj-list@newflow.co.uk wrote:
On 11/07/13 14:28, Tom Rini wrote:
On Thu, Jul 11, 2013 at 02:06:26PM +0100, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
I'm just starting to cycle back to the NOR patches again myself and fixup the few remaining comments. But in your series:
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e80e1ed..ba310cb 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -111,6 +111,6 @@ endif endif
# check that only R_ARM_RELATIVE relocations are generated -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) ALL-y += checkarmreloc endif
What toolchain are you using? This seems worrying at best.
Generated via Buildroot ... here's the (rather copious) version info ...
mpfj@mpfj-nanobone:~/uboot/u-boot$ arm-linux-gcc --version -v Using built-in specs. COLLECT_GCC=arm-linux-gcc COLLECT_LTO_WRAPPER=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/lto-wrapper arm-linux-gcc (Buildroot 2013.02-dirty) 4.6.3 Copyright (C) 2011 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Target: arm-buildroot-linux-uclibcgnueabi Configured with: /home/mpfj/buildroot/output/toolchain/gcc-4.6.3/configure --prefix=/home/mpfj/buildroot/output/host/usr --build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu --target=arm-buildroot-linux-uclibcgnueabi --enable-languages=c,c++ --with-sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --with-build-time-tools=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/bin --disable-__cxa_atexit --enable-target-optspace --disable-libquadmath --disable-libgomp --with-gnu-ld --disable-libssp --disable-multilib --enable-tls --enable-shared --with-gmp=/home/mpfj/buildroot/output/host/usr --with-mpfr=/home/mpfj/buildroot/output/host/usr --with-mpc=/home/mpfj/buildroot/output/host/usr --disable-nls --enable-threads --disable-decimal-float --with-abi=aapcs-linux --with-arch=armv7-a --with-tune=cortex-a8 --disable-largefile --with-pkgversion='Buildroot 2013.02-dirty' --with-bugurl=http://bugs.buildroot.net/ --wi
th
-fpu=vfpv 3 --with-float=hard Thread model: posix gcc version 4.6.3 (Buildroot 2013.02-dirty) COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/cc1 -quiet -v help-dummy -quiet -dumpbase help-dummy -march=armv7-a -mtune=cortex-a8 -mfloat-abi=hard -mfpu=vfpv3 -mabi=aapcs-linux -auxbase help-dummy -version --version -o /tmp/cczFlXPw.s GNU C (Buildroot 2013.02-dirty) version 4.6.3 (arm-buildroot-linux-uclibcgnueabi) compiled by GNU C version 4.6.3, GMP version 5.1.0, MPFR version 3.1.1-p2, MPC version 1.0.1 GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/as -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3 -meabi=5 --version -o /tmp/ccgLl9x8.o /tmp/cczFlXPw.s GNU assembler (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. This assembler was configured for a target of `arm-buildroot-linux-uclibcgnueabi'. COMPILER_PATH=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ LIBRARY_PATH=/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/ COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/collect2 --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib /tmp/ccgLl9x8.o -lgcc --as-needed
-
lgcc_s -- no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o collect2 version 4.6.3 (ARM GNU/Linux with ELF) /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ld --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/us
r/
lib /tmp/ ccgLl9x8.o -lgcc --as-needed -lgcc_s --no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o GNU ld (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or (at your option) a later version. This program has absolutely no warranty.
Can you make the the ELF, and possibly the corresponding git branch, available?
Amicalement,
On Thu, Jul 11, 2013 at 04:34:18PM +0200, Albert ARIBAUD wrote:
Hi Mark,
On Thu, 11 Jul 2013 14:45:08 +0100, Mark Jackson mpfj-list@newflow.co.uk wrote:
On 11/07/13 14:28, Tom Rini wrote:
On Thu, Jul 11, 2013 at 02:06:26PM +0100, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
I'm just starting to cycle back to the NOR patches again myself and fixup the few remaining comments. But in your series:
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index e80e1ed..ba310cb 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -111,6 +111,6 @@ endif endif
# check that only R_ARM_RELATIVE relocations are generated -ifneq ($(CONFIG_SPL_BUILD),y) +ifneq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y) ALL-y += checkarmreloc endif
What toolchain are you using? This seems worrying at best.
Generated via Buildroot ... here's the (rather copious) version info ...
mpfj@mpfj-nanobone:~/uboot/u-boot$ arm-linux-gcc --version -v Using built-in specs. COLLECT_GCC=arm-linux-gcc COLLECT_LTO_WRAPPER=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/lto-wrapper arm-linux-gcc (Buildroot 2013.02-dirty) 4.6.3 Copyright (C) 2011 Free Software Foundation, Inc. This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Target: arm-buildroot-linux-uclibcgnueabi Configured with: /home/mpfj/buildroot/output/toolchain/gcc-4.6.3/configure --prefix=/home/mpfj/buildroot/output/host/usr --build=x86_64-unknown-linux-gnu --host=x86_64-unknown-linux-gnu --target=arm-buildroot-linux-uclibcgnueabi --enable-languages=c,c++ --with-sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --with-build-time-tools=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/bin --disable-__cxa_atexit --enable-target-optspace --disable-libquadmath --disable-libgomp --with-gnu-ld --disable-libssp --disable-multilib --enable-tls --enable-shared --with-gmp=/home/mpfj/buildroot/output/host/usr --with-mpfr=/home/mpfj/buildroot/output/host/usr --with-mpc=/home/mpfj/buildroot/output/host/usr --disable-nls --enable-threads --disable-decimal-float --with-abi=aapcs-linux --with-arch=armv7-a --with-tune=cortex-a8 --disable-largefile --with-pkgversion='Buildroot 2013.02-dirty' --with-bugurl=http://bugs.buildroot.net/ --wi
th
-fpu=vfpv 3 --with-float=hard Thread model: posix gcc version 4.6.3 (Buildroot 2013.02-dirty) COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/cc1 -quiet -v help-dummy -quiet -dumpbase help-dummy -march=armv7-a -mtune=cortex-a8 -mfloat-abi=hard -mfpu=vfpv3 -mabi=aapcs-linux -auxbase help-dummy -version --version -o /tmp/cczFlXPw.s GNU C (Buildroot 2013.02-dirty) version 4.6.3 (arm-buildroot-linux-uclibcgnueabi) compiled by GNU C version 4.6.3, GMP version 5.1.0, MPFR version 3.1.1-p2, MPC version 1.0.1 GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072 COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/as -march=armv7-a -mfloat-abi=hard -mfpu=vfpv3 -meabi=5 --version -o /tmp/ccgLl9x8.o /tmp/cczFlXPw.s GNU assembler (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or later. This program has absolutely no warranty. This assembler was configured for a target of `arm-buildroot-linux-uclibcgnueabi'. COMPILER_PATH=/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ LIBRARY_PATH=/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/:/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib/:/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/ COLLECT_GCC_OPTIONS='--version' '-v' '-march=armv7-a' '-mtune=cortex-a8' '-mfloat-abi=hard' '-mfpu=vfpv3' '-mabi=aapcs-linux' /home/mpfj/buildroot/output/host/usr/libexec/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/collect2 --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib /tmp/ccgLl9x8.o -lgcc --as-needed
lgcc_s -- no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o collect2 version 4.6.3 (ARM GNU/Linux with ELF) /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/bin/ld --sysroot=/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot --eh-frame-hdr -dynamic-linker /lib/ld-uClibc.so.0 -X -m armelf_linux_eabi --version /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crt1.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crti.o /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtbegin.o -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3 -L/home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/../../../../arm-buildroot-linux-uclibcgnueabi/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/lib -L/home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/us
r/
lib /tmp/ ccgLl9x8.o -lgcc --as-needed -lgcc_s --no-as-needed -lc -lgcc --as-needed -lgcc_s --no-as-needed /home/mpfj/buildroot/output/host/usr/lib/gcc/arm-buildroot-linux-uclibcgnueabi/4.6.3/crtend.o /home/mpfj/buildroot/output/host/usr/arm-buildroot-linux-uclibcgnueabi/sysroot/usr/lib/crtn.o GNU ld (GNU Binutils) 2.21.1 Copyright 2011 Free Software Foundation, Inc. This program is free software; you may redistribute it under the terms of the GNU General Public License version 3 or (at your option) a later version. This program has absolutely no warranty.
Can you make the the ELF, and possibly the corresponding git branch, available?
OK, with some help from Albert on IRC, fixed. The new in the patch board/ti/am335x/u-boot.lds needed to be re-synced with arch/arm/cpu/u-boot.lds again.
Hi Tom,
On Thu, 11 Jul 2013 11:54:09 -0400, Tom Rini trini@ti.com wrote:
The new in the patch board/ti/am335x/u-boot.lds needed to be re-synced with arch/arm/cpu/u-boot.lds again.
Actually, I wonder why so many ARM .lds files need to exist at all, when arch/arm/cpu/u-boot[-spl].lds could be used most of the time. I suspect that the main reason for custom .lds files is ad hoc MEMORY declarations, which could easily be commonalized through adequate preprocessing.
Amicalement,
On Thu, 11 Jul 2013 18:08:59 +0200, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Jul 2013 11:54:09 -0400, Tom Rini trini@ti.com wrote:
The new in the patch board/ti/am335x/u-boot.lds needed to be re-synced with arch/arm/cpu/u-boot.lds again.
Actually, I wonder why so many ARM .lds files need to exist at all, when arch/arm/cpu/u-boot[-spl].lds could be used most of the time. I suspect that the main reason for custom .lds files is ad hoc MEMORY declarations, which could easily be commonalized through adequate preprocessing.
... well here the only difference with arch/arm/cpu/u-boot.lds is the addition of board/ti/am335x/libam335x.o right after start.o but this should probably also be manageable in arch/arm/cpu/u-boot.lds.
Amicalement,
On Thu, Jul 11, 2013 at 06:14:11PM +0200, Albert ARIBAUD wrote:
On Thu, 11 Jul 2013 18:08:59 +0200, Albert ARIBAUD albert.u.boot@aribaud.net wrote:
Hi Tom,
On Thu, 11 Jul 2013 11:54:09 -0400, Tom Rini trini@ti.com wrote:
The new in the patch board/ti/am335x/u-boot.lds needed to be re-synced with arch/arm/cpu/u-boot.lds again.
Actually, I wonder why so many ARM .lds files need to exist at all, when arch/arm/cpu/u-boot[-spl].lds could be used most of the time. I suspect that the main reason for custom .lds files is ad hoc MEMORY declarations, which could easily be commonalized through adequate preprocessing.
... well here the only difference with arch/arm/cpu/u-boot.lds is the addition of board/ti/am335x/libam335x.o right after start.o but this should probably also be manageable in arch/arm/cpu/u-boot.lds.
Right. And this is a hard requirement (rather than "lets try and optimize around flash sectors for least waste) for NOR to work.
On 11/07/13 14:06, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Just an update ... I now have it working ... yay !!
The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects 8/16bit mode) was being incorrectly influenced by a hardware fault.
I have pulled quite a few patches from various places, some of which might not be required. Now I have a working base, I'll work out what is needed on top of Tom's original patch set.
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
Tom ... any idea when NOR booting will be merged into the mainline code ?
I'm keen to get our NanoBone board support added.
Cheers Mark J.
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
On 07/17/2013 08:58 AM, Mark Jackson wrote:
On 11/07/13 14:06, Mark Jackson wrote:
On 18/06/13 13:11, Mark Jackson wrote:
On 17/06/13 15:43, Mark Jackson wrote:
On 13/05/13 19:28, Tom Rini wrote:
From: Steve Kipisz s-kipisz2@ti.com
NOR requires that s_init be within the first 4KiB of the image so that we can perform the rest of the required pinmuxing to talk with the rest of NOR that we are found on. When NOR_BOOT is set we save our environment in NOR at 512KiB and a redundant copy at 768KiB. We avoid using SPL for this case and u-boot.bin is written directly to the start of NOR.
I'm trying to get this up and running our NanoBone platform, but I'm having no success.
Just an update ... I now have it working ... yay !!
The main (and possibly the *only*) culprit was that SYSBOOT[8] (which selects 8/16bit mode) was being incorrectly influenced by a hardware fault.
I have pulled quite a few patches from various places, some of which might not be required. Now I have a working base, I'll work out what is needed on top of Tom's original patch set.
Okay ... I've now got NOR booting rebased to master using the patch set below. This doesn't include my board code as that's of no interest until NOR booting is added to the mainline code.
Sorry, Tom, I'm no git expert, so I'm not sure how to compare this to your previous patches ... I hope this is useful in some way ??
Tom ... any idea when NOR booting will be merged into the mainline code ?
I've been working this week on things, and I'm hopeful about re-posting the series today. The only minor issue I have is that calling save_omap_boot_params and the asm() bits for finishing NOR pinmux seem to conflict and leave me in a bad state. But, since we don't make use of the boot_params info yet in full U-Boot, that's not a blocker to me.
- -- Tom
"Tom" == Tom Rini trini@ti.com writes:
Tom> We don't really need the gpmc_config, base and size variables and can Tom> just call enable_gpmc_cs_config more directly, like the boards which Tom> need to re-configure CS0 or CS1 do.
Tom> Signed-off-by: Tom Rini trini@ti.com
Reviewed-by: Peter Korsgaard jacmet@sunsite.dk
participants (6)
-
Albert ARIBAUD -
Kipisz, Steven -
Mark Jackson -
Peter Korsgaard -
Stefan Roese -
Tom Rini