[U-Boot] [PATCH] mx53loco: Disable printing cpuinfo
Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- board/freescale/mx53loco/mx53loco.c | 1 - include/configs/mx53loco.h | 2 -- 2 files changed, 3 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 9ece6ec..1298788 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -389,7 +389,6 @@ int board_late_init(void) { if (!power_init()) clock_1GHz(); - print_cpuinfo();
return 0; } diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 8f92234..3551e02 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -24,8 +24,6 @@
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DISPLAY_CPUINFO - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-----Original Message----- From: Fabio Estevam [mailto:fabio.estevam@freescale.com] Sent: Monday, April 06, 2015 10:23 PM To: sbabic@denx.de Cc: Liu Hui-R64343; u-boot@lists.denx.de; Estevam Fabio-R49496 Subject: [PATCH] mx53loco: Disable printing cpuinfo
Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Acked-by: Jason Liu r64343@freescale.com
board/freescale/mx53loco/mx53loco.c | 1 - include/configs/mx53loco.h | 2 -- 2 files changed, 3 deletions(-)
diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index 9ece6ec..1298788 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -389,7 +389,6 @@ int board_late_init(void) { if (!power_init()) clock_1GHz();
print_cpuinfo();
return 0;
} diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 8f92234..3551e02 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -24,8 +24,6 @@
#define CONFIG_SYS_GENERIC_BOARD
-#define CONFIG_DISPLAY_CPUINFO
/* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
-- 1.9.1
Tom/Stefano,
On Tue, Apr 7, 2015 at 12:46 AM, Hui.Liu@freescale.com Hui.Liu@freescale.com wrote:
-----Original Message----- From: Fabio Estevam [mailto:fabio.estevam@freescale.com] Sent: Monday, April 06, 2015 10:23 PM To: sbabic@denx.de Cc: Liu Hui-R64343; u-boot@lists.denx.de; Estevam Fabio-R49496 Subject: [PATCH] mx53loco: Disable printing cpuinfo
Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Acked-by: Jason Liu r64343@freescale.com
Can we have this one applied for 2015.04? It fixes some bogus boot logs.
Thanks,
Fabio Estevam
Hi Fabio,
On 08/04/2015 04:19, Fabio Estevam wrote:
Tom/Stefano,
On Tue, Apr 7, 2015 at 12:46 AM, Hui.Liu@freescale.com
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Acked-by: Jason Liu r64343@freescale.com
Can we have this one applied for 2015.04? It fixes some bogus boot logs.
I pick it up now.
Stefano
On 06/04/2015 16:23, Fabio Estevam wrote:
Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz Reset cause: POR Board: MX53 LOCO I2C: ready DRAM: 1 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial CPU: Freescale i.MX53 rev2.1 at 1000 MHz Reset cause: unknown reset Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot-imx, thanks !
Best regards, Stefano Babic
participants (4)
-
Fabio Estevam -
Fabio Estevam -
Hui.Liuļ¼ freescale.com -
Stefano Babic