[U-Boot] [PATCH 0/4] arm: socfpga: enable rtc support for the socrates board

This series contains fixes and config changes to enable the 'date' command talking to the rtc on the socrates board.
It contains fixes to the designware i2c driver, enables DM support for the rtc used on the socrates board, adds a missing pull-up and changes the defconfig to enable rtc support by default.
Simon Goldschmidt (4): i2c: designware: fix reset handling on socfpga gen5 rtc: m41t62: add compatible for m41t82 arm: socfpga: socrates: make rtc work configs: socfpga: socrates: enable rtc support
board/ebv/socrates/qts/iocsr_config.h | 2 +- configs/socfpga_socrates_defconfig | 2 ++ drivers/i2c/designware_i2c.c | 20 ++++++++++++++------ drivers/rtc/m41t62.c | 1 + 4 files changed, 18 insertions(+), 7 deletions(-)

Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide reset-names).
The actual bug was to check 'if (&priv->reset_ctl)', which is never false.
While at it, convert the driver to use 'reset_get_bulk' instead of looking at a specific named reset and also make it release the reset on driver remove before starting the OS.
Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/i2c/designware_i2c.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/designware_i2c.c b/drivers/i2c/designware_i2c.c index 63e40823f1..9ccc2411a6 100644 --- a/drivers/i2c/designware_i2c.c +++ b/drivers/i2c/designware_i2c.c @@ -34,7 +34,7 @@ static struct dw_scl_sda_cfg byt_config = { struct dw_i2c { struct i2c_regs *regs; struct dw_scl_sda_cfg *scl_sda_cfg; - struct reset_ctl reset_ctl; + struct reset_ctl_bulk resets; };
#ifdef CONFIG_SYS_I2C_DW_ENABLE_STATUS_UNSUPPORTED @@ -562,16 +562,22 @@ static int designware_i2c_probe(struct udevice *bus) priv->regs = (struct i2c_regs *)devfdt_get_addr_ptr(bus); }
- ret = reset_get_by_name(bus, "i2c", &priv->reset_ctl); + ret = reset_get_bulk(bus, &priv->resets); if (ret) - pr_info("reset_get_by_name() failed: %d\n", ret); - - if (&priv->reset_ctl) - reset_deassert(&priv->reset_ctl); + dev_warn(bus, "Can't get reset: %d\n", ret); + else + reset_deassert_bulk(&priv->resets);
return __dw_i2c_init(priv->regs, 0, 0); }
+static int designware_i2c_remove(struct udevice *dev) +{ + struct dw_i2c *priv = dev_get_priv(dev); + + return reset_release_bulk(&priv->resets); +} + static int designware_i2c_bind(struct udevice *dev) { static int num_cards; @@ -613,6 +619,8 @@ U_BOOT_DRIVER(i2c_designware) = { .bind = designware_i2c_bind, .probe = designware_i2c_probe, .priv_auto_alloc_size = sizeof(struct dw_i2c), + .remove = designware_i2c_remove, + .flags = DM_FLAG_OS_PREPARE, .ops = &designware_i2c_ops, };

Hello Simon,
Am 12.03.2019 um 22:01 schrieb Simon Goldschmidt:
Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide reset-names).
The actual bug was to check 'if (&priv->reset_ctl)', which is never false.
While at it, convert the driver to use 'reset_get_bulk' instead of looking at a specific named reset and also make it release the reset on driver remove before starting the OS.
Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver") Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
drivers/i2c/designware_i2c.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-)
Reviewed-by: Heiko Schocher hs@denx.de
bye, Heiko

This adds a compatible string for m41t82. This ensures that this driver can be used for m41t82 in DM mode, too (as it was usable for this model in non-DM mode before).
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
drivers/rtc/m41t62.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/rtc/m41t62.c b/drivers/rtc/m41t62.c index 2ee7e00b02..4b5bf8e7a0 100644 --- a/drivers/rtc/m41t62.c +++ b/drivers/rtc/m41t62.c @@ -163,6 +163,7 @@ static const struct rtc_ops m41t62_rtc_ops = {
static const struct udevice_id m41t62_rtc_ids[] = { { .compatible = "st,m41t62" }, + { .compatible = "st,m41t82" }, { .compatible = "microcrystal,rv4162" }, { } };

On 12.03.19 22:01, Simon Goldschmidt wrote:
This adds a compatible string for m41t82. This ensures that this driver can be used for m41t82 in DM mode, too (as it was usable for this model in non-DM mode before).
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan

On Wed, Mar 13, 2019 at 6:47 AM Stefan Roese sr@denx.de wrote:
On 12.03.19 22:01, Simon Goldschmidt wrote:
This adds a compatible string for m41t82. This ensures that this driver can be used for m41t82 in DM mode, too (as it was usable for this model in non-DM mode before).
This patch ensures this driver works on socfpga_socrates.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks for the review. However, I just noticed adding the compatible isn't enough as the m41t82 enters a frozen mode when entering battery backup mode.
I'll have to send a v2 that disables the HT bit in '.probe'.
Regards, Simon

This patch makes the on-board RTC work on the socfpga_socrates board. This rtc is present on the board, but it does not work (fails with a timeout).
This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82 RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up on the SCL line seems to be missing. To work around this, enable the weak-pull-up feature on this pin.
After applying this patch, the rtc timeout is gone and the 'date' command can access the rtc chip.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
board/ebv/socrates/qts/iocsr_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/ebv/socrates/qts/iocsr_config.h b/board/ebv/socrates/qts/iocsr_config.h index 011fa2bac3..18b9c6ce4d 100644 --- a/board/ebv/socrates/qts/iocsr_config.h +++ b/board/ebv/socrates/qts/iocsr_config.h @@ -108,7 +108,7 @@ const unsigned long iocsr_scan_chain2_table[] = { 0x00018004, 0x06001209, 0x00004000, - 0x20002412, + 0x20042412, 0x00904800, 0x00000030, 0x80000000,

On 12.03.19 22:01, Simon Goldschmidt wrote:
This patch makes the on-board RTC work on the socfpga_socrates board. This rtc is present on the board, but it does not work (fails with a timeout).
This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82 RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up on the SCL line seems to be missing. To work around this, enable the weak-pull-up feature on this pin.
After applying this patch, the rtc timeout is gone and the 'date' command can access the rtc chip.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan

This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the socrates board.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com ---
configs/socfpga_socrates_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 45fd78a15c..242d938f9c 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -61,6 +61,8 @@ CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y CONFIG_DM_RESET=y +CONFIG_DM_RTC=y +CONFIG_RTC_M41T62=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y

On 12.03.19 22:01, Simon Goldschmidt wrote:
This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the socrates board.
Signed-off-by: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com
Reviewed-by: Stefan Roese sr@denx.de
Thanks, Stefan
participants (3)
-
Heiko Schocher
-
Simon Goldschmidt
-
Stefan Roese