[U-Boot] [PATCH 1/2 v2] pci/fsl_pci_init: Enable inbound PCI config cycles
Add fsl_pci_config_unlock() function to enable a PCI/PCIe interface configured in agent/endpoint mode to respond to inbound PCI configuration cycles.
Signed-off-by: Peter Tyser ptyser@xes-inc.com --- Changes since v1: - Made unlocking dependent on interface being agent/endpoint - Moved new code to fsl_pci_config_unlock() function
drivers/pci/fsl_pci_init.c | 29 +++++++++++++++++++++++++++++ 1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 7625ccc..d811ac0 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -37,6 +37,11 @@ DECLARE_GLOBAL_DATA_PTR; #include <pci.h> #include <asm/immap_fsl_pci.h>
+/* Freescale-specific PCI config registers */ +#define FSL_PCI_PBFR 0x44 +#define FSL_PCIE_CAP_ID 0x4c +#define FSL_PCIE_CFG_RDY 0x4b0 + void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); void pciauto_postscan_setup_bridge(struct pci_controller *hose, @@ -304,6 +309,30 @@ void fsl_pci_init(struct pci_controller *hose) } }
+/* Enable inbound PCI config cycles for agent/endpoint interface */ +void fsl_pci_config_unlock(struct pci_controller *hose) +{ + pci_dev_t dev = PCI_BDF(hose->first_busno,0,0); + u8 agent; + u8 pcie_cap; + u16 pbfr; + + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &agent); + if (!agent) + return; + + pci_hose_read_config_byte(hose, dev, FSL_PCIE_CAP_ID, &pcie_cap); + if (pcie_cap != 0x0) { + /* PCIe - set CFG_READY bit of Configuration Ready Register */ + pci_hose_write_config_byte(hose, dev, FSL_PCIE_CFG_RDY, 0x1); + } else { + /* PCI - clear ACL bit of PBFR */ + pci_hose_read_config_word(hose, dev, FSL_PCI_PBFR, &pbfr); + pbfr &= ~0x20; + pci_hose_write_config_word(hose, dev, FSL_PCI_PBFR, pbfr); + } +} + #ifdef CONFIG_OF_BOARD_SETUP #include <libfdt.h> #include <fdt_support.h>
Update X-ES Freescale boards to allow inbound PCI configuration cycles when configured as agent/endpoint.
Signed-off-by: Peter Tyser ptyser@xes-inc.com --- This patch relies on the following patches being applied first: - XPedite5370 board support - 85xx: Support for XPedite5200
board/xes/common/fsl_85xx_pci.c | 19 +++++++++++++++++++ 1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index b86a044..89c5bb9 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -29,6 +29,7 @@ #include <fdt_support.h>
extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_config_unlock(struct pci_controller *hose); extern void fsl_pci_init(struct pci_controller *hose);
int first_free_busno = 0; @@ -181,6 +182,10 @@ void pci_init_board(void)
fsl_pci_init(hose);
+ /* Unlock inbound PCI configuration cycles */ + if (!host) + fsl_pci_config_unlock(hose); + first_free_busno = hose->last_busno+1; printf(" PCI1 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); @@ -234,6 +239,10 @@ void pci_init_board(void)
fsl_pci_init(hose);
+ /* Unlock inbound PCI configuration cycles */ + if (!host) + fsl_pci_config_unlock(hose); + first_free_busno = hose->last_busno + 1; printf(" PCIE1 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); @@ -283,6 +292,11 @@ void pci_init_board(void) (int)&pci->cfg_data);
fsl_pci_init(hose); + + /* Unlock inbound PCI configuration cycles */ + if (!host) + fsl_pci_config_unlock(hose); + first_free_busno = hose->last_busno+1; printf(" PCIE2 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); @@ -332,6 +346,11 @@ void pci_init_board(void) (int)&pci->cfg_data);
fsl_pci_init(hose); + + /* Unlock inbound PCI configuration cycles */ + if (!host) + fsl_pci_config_unlock(hose); + first_free_busno = hose->last_busno+1; printf(" PCIE3 on bus %02x - %02x\n", hose->first_busno, hose->last_busno);
participants (1)
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Peter Tyser