[U-Boot] [PATCH 1/7] arm: rmobile: Move module control register to header file of SoC
Module control registers of R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794) are same address. This moves these to header file of SoC.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- arch/arm/include/asm/arch-rmobile/rcar-base.h | 39 +++++++++++++++++++++++++++ board/renesas/alt/alt.c | 11 -------- board/renesas/gose/gose.c | 8 ------ board/renesas/koelsch/koelsch.c | 8 ------ board/renesas/lager/lager.c | 8 ------ 5 files changed, 39 insertions(+), 35 deletions(-)
diff --git a/arch/arm/include/asm/arch-rmobile/rcar-base.h b/arch/arm/include/asm/arch-rmobile/rcar-base.h index dbbebcf..23c4bba 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-base.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-base.h @@ -29,6 +29,45 @@ #define SCIF4_BASE 0xE6EE0000 #define SCIF5_BASE 0xE6EE8000
+/* Module stop status register */ +#define MSTPSR0 0xE6150030 +#define MSTPSR1 0xE6150038 +#define MSTPSR2 0xE6150040 +#define MSTPSR3 0xE6150048 +#define MSTPSR4 0xE615004C +#define MSTPSR5 0xE615003C +#define MSTPSR7 0xE61501C4 +#define MSTPSR8 0xE61509A0 +#define MSTPSR9 0xE61509A4 +#define MSTPSR10 0xE61509A8 +#define MSTPSR11 0xE61509AC + +/* Realtime module stop control register */ +#define RMSTPCR0 0xE6150110 +#define RMSTPCR1 0xE6150114 +#define RMSTPCR2 0xE6150118 +#define RMSTPCR3 0xE615011C +#define RMSTPCR4 0xE6150120 +#define RMSTPCR5 0xE6150124 +#define RMSTPCR7 0xE615012C +#define RMSTPCR8 0xE6150980 +#define RMSTPCR9 0xE6150984 +#define RMSTPCR10 0xE6150988 +#define RMSTPCR11 0xE615098C + +/* System module stop control register */ +#define SMSTPCR0 0xE6150130 +#define SMSTPCR1 0xE6150134 +#define SMSTPCR2 0xE6150138 +#define SMSTPCR3 0xE615013C +#define SMSTPCR4 0xE6150140 +#define SMSTPCR5 0xE6150144 +#define SMSTPCR7 0xE615014C +#define SMSTPCR8 0xE6150990 +#define SMSTPCR9 0xE6150994 +#define SMSTPCR10 0xE6150998 +#define SMSTPCR11 0xE615099C + /* * SH-I2C * Ch2 and ch3 are different address. These are defined diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index 523c5f1..bf90f2e 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -37,20 +37,9 @@ void s_init(void) qos_init(); }
-#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF2_MSTP719 (1 << 19) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13) - -#define MSTPSR3 0xE6150048 -#define SMSTPCR3 0xE615013C #define IIC1_MSTP323 (1 << 23)
#define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 715fba0..bb6849e 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -41,16 +41,8 @@ void s_init(void) qos_init(); }
-#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 244bc58..14d1770 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -43,16 +43,8 @@ void s_init(void) qos_init(); }
-#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \ diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 93273b2..23ef194 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -50,16 +50,8 @@ void s_init(void) qos_init(); }
-#define MSTPSR1 0xE6150038 -#define SMSTPCR1 0xE6150134 #define TMU0_MSTP125 (1 << 25) - -#define MSTPSR7 0xE61501C4 -#define SMSTPCR7 0xE615014C #define SCIF0_MSTP721 (1 << 21) - -#define MSTPSR8 0xE61509A0 -#define SMSTPCR8 0xE6150990 #define ETHER_MSTP813 (1 << 13)
#define mstp_setbits(type, addr, saddr, set) \
Control macro of mstp is common in R-Car ARM SoC (r8a7790, r8a7791, r8a7793 and r8a7794). This moves these to arch-rmobile/rcar-mstp.h
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- arch/arm/include/asm/arch-rmobile/rcar-mstp.h | 22 ++++++++++++++++++++++ board/renesas/alt/alt.c | 10 +--------- board/renesas/gose/gose.c | 10 +--------- board/renesas/koelsch/koelsch.c | 10 +--------- board/renesas/lager/lager.c | 10 +--------- 5 files changed, 26 insertions(+), 36 deletions(-) create mode 100644 arch/arm/include/asm/arch-rmobile/rcar-mstp.h
diff --git a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h new file mode 100644 index 0000000..bf9a2cf --- /dev/null +++ b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h @@ -0,0 +1,22 @@ +/* + * arch/arm/include/asm/arch-rmobile/rcar-mstp.h + * + * Copyright (C) 2013, 2014 Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com + * Copyright (C) 2013, 2014 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __ASM_ARCH_RCAR_MSTP_H +#define __ASM_ARCH_RCAR_MSTP_H + +#define mstp_setbits(type, addr, saddr, set) \ + out_##type((saddr), in_##type(addr) | (set)) +#define mstp_clrbits(type, addr, saddr, clear) \ + out_##type((saddr), in_##type(addr) & ~(clear)) +#define mstp_setbits_le32(addr, saddr, set) \ + mstp_setbits(le32, addr, saddr, set) +#define mstp_clrbits_le32(addr, saddr, clear) \ + mstp_clrbits(le32, addr, saddr, clear) + +#endif /* __ASM_ARCH_RCAR_MSTP_H */ diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index bf90f2e..e3cfe54 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -15,6 +15,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/arch/rmobile.h> +#include <asm/arch/rcar-mstp.h> #include <netdev.h> #include <miiphy.h> #include <i2c.h> @@ -42,15 +43,6 @@ void s_init(void) #define ETHER_MSTP813 (1 << 13) #define IIC1_MSTP323 (1 << 23)
-#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU */ diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index bb6849e..0b2d904 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -15,6 +15,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/arch/rmobile.h> +#include <asm/arch/rcar-mstp.h> #include <netdev.h> #include <miiphy.h> #include <i2c.h> @@ -45,15 +46,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13)
-#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU0 */ diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 14d1770..5ebbfcf 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -16,6 +16,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/arch/rmobile.h> +#include <asm/arch/rcar-mstp.h> #include <netdev.h> #include <miiphy.h> #include <i2c.h> @@ -47,15 +48,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13)
-#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 23ef194..47cf51b 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -18,6 +18,7 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/arch/rmobile.h> +#include <asm/arch/rcar-mstp.h> #include <miiphy.h> #include <i2c.h> #include "qos.h" @@ -54,15 +55,6 @@ void s_init(void) #define SCIF0_MSTP721 (1 << 21) #define ETHER_MSTP813 (1 << 13)
-#define mstp_setbits(type, addr, saddr, set) \ - out_##type((saddr), in_##type(addr) | (set)) -#define mstp_clrbits(type, addr, saddr, clear) \ - out_##type((saddr), in_##type(addr) & ~(clear)) -#define mstp_setbits_le32(addr, saddr, set) \ - mstp_setbits(le32, addr, saddr, set) -#define mstp_clrbits_le32(addr, saddr, clear) \ - mstp_clrbits(le32, addr, saddr, clear) - int board_early_init_f(void) { /* TMU0 */
This addes macro for set and clear bit control for module control register. This is used when user want to disable the function of the devices corresponding to register.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- arch/arm/include/asm/arch-rmobile/rcar-mstp.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h index bf9a2cf..f94e92c 100644 --- a/arch/arm/include/asm/arch-rmobile/rcar-mstp.h +++ b/arch/arm/include/asm/arch-rmobile/rcar-mstp.h @@ -14,9 +14,13 @@ out_##type((saddr), in_##type(addr) | (set)) #define mstp_clrbits(type, addr, saddr, clear) \ out_##type((saddr), in_##type(addr) & ~(clear)) +#define mstp_setclrbits(type, addr, saddr, set, clear) \ + out_##type((saddr), (in_##type(addr) | (set)) & ~(clear)) #define mstp_setbits_le32(addr, saddr, set) \ mstp_setbits(le32, addr, saddr, set) #define mstp_clrbits_le32(addr, saddr, clear) \ mstp_clrbits(le32, addr, saddr, clear) +#define mstp_setclrbits_le32(addr, saddr, set, clear) \ + mstp_setclrbits(le32, addr, saddr, set, clear)
#endif /* __ASM_ARCH_RCAR_MSTP_H */
Before a kernel boots, GPIO, SYS-DMAC, QSPI and MSIOF clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/lager/lager.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/board/renesas/lager/lager.c b/board/renesas/lager/lager.c index 47cf51b..077a78f 100644 --- a/board/renesas/lager/lager.c +++ b/board/renesas/lager/lager.c @@ -67,10 +67,49 @@ int board_early_init_f(void) return 0; }
+static struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +} mstptbl[] = { + [0] = { SMSTPCR0, 0x00640801, 0x00400001, + RMSTPCR0, 0x00640801, 0x00000000 }, + [1] = { SMSTPCR1, 0xDB6E9BDF, 0x00000000, + RMSTPCR1, 0xDB6E9BDF, 0x00000000 }, + [2] = { SMSTPCR2, 0x300DA1FC, 0x000CA120, + RMSTPCR2, 0x300DA1FC, 0x00000000 }, + [3] = { SMSTPCR3, 0xF08CF831, 0x00000000, + RMSTPCR3, 0xF08CF831, 0x00000000 }, + [4] = { SMSTPCR4, 0x80000184, 0x00000180, + RMSTPCR4, 0x80000184, 0x00000000 }, + [5] = { SMSTPCR5, 0x44C00046, 0x00000000, + RMSTPCR5, 0x44C00046, 0x00000000 }, + [7] = { SMSTPCR7, 0x07F30718, 0x00200000, + RMSTPCR7, 0x07F30718, 0x00000000 }, + [8] = { SMSTPCR8, 0x01F0FF84, 0x00000000, + RMSTPCR8, 0x01F0FF84, 0x00000000 }, + [9] = { SMSTPCR9, 0xF5979FCF, 0x00021F80, + RMSTPCR9, 0xF5979FCF, 0x00001F80 }, + [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000, + RMSTPCR10, 0xFFFEFFE0, 0x00000000 }, + [11] = { SMSTPCR11, 0x00000000, 0x00000000, + RMSTPCR11, 0x00000000, 0x00000000 }, +}; + void arch_preboot_os(void) { - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + int i; + + /* Stop all module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_addr, + mstptbl[i].s_dis, mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_addr, + mstptbl[i].r_dis, mstptbl[i].r_ena); + } }
DECLARE_GLOBAL_DATA_PTR;
Dear Nobuhiro,
In message 1417417556-23946-4-git-send-email-nobuhiro.iwamatsu.yj@renesas.com you wrote:
Before a kernel boots, GPIO, SYS-DMAC, QSPI and MSIOF clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com
The data structures and the code are all repeated for this patch and the following patches:
[PATCH 4/7] arm: rmobile: lager: Halt clock prior to booting kernel [PATCH 5/7] arm: rmobile: koelsch: Halt clock prior to booting kernel [U-Boot] [PATCH 6/7] arm: rmobile: alt: Halt clock prior to booting kernel [PATCH 7/7] arm: rmobile: gose: Halt clock prior to booting kernel
Can you please move the code to a common place so we have it only once?
+} mstptbl[] = {
- [0] = { SMSTPCR0, 0x00640801, 0x00400001,
RMSTPCR0, 0x00640801, 0x00000000 },- [1] = { SMSTPCR1, 0xDB6E9BDF, 0x00000000,
RMSTPCR1, 0xDB6E9BDF, 0x00000000 },- [2] = { SMSTPCR2, 0x300DA1FC, 0x000CA120,
RMSTPCR2, 0x300DA1FC, 0x00000000 },- [3] = { SMSTPCR3, 0xF08CF831, 0x00000000,
RMSTPCR3, 0xF08CF831, 0x00000000 },- [4] = { SMSTPCR4, 0x80000184, 0x00000180,
RMSTPCR4, 0x80000184, 0x00000000 },- [5] = { SMSTPCR5, 0x44C00046, 0x00000000,
RMSTPCR5, 0x44C00046, 0x00000000 },- [7] = { SMSTPCR7, 0x07F30718, 0x00200000,
RMSTPCR7, 0x07F30718, 0x00000000 },- [8] = { SMSTPCR8, 0x01F0FF84, 0x00000000,
RMSTPCR8, 0x01F0FF84, 0x00000000 },- [9] = { SMSTPCR9, 0xF5979FCF, 0x00021F80,
RMSTPCR9, 0xF5979FCF, 0x00001F80 },- [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000,
RMSTPCR10, 0xFFFEFFE0, 0x00000000 },- [11] = { SMSTPCR11, 0x00000000, 0x00000000,
RMSTPCR11, 0x00000000, 0x00000000 },+};
Also, these data look pretty much the same to me, with only minor differences in some bits. If we use some defines instead of the magic numbers this could probably help to see the common part and the differences in the data. We probably don't need board-specific data in the code, and can move this to the configuration files?
Thanks.
Best regards,
Wolfgang Denk
Hi,
Thanks for your review.
2014-12-01 16:17 GMT+09:00 Wolfgang Denk wd@denx.de:
Dear Nobuhiro,
In message 1417417556-23946-4-git-send-email-nobuhiro.iwamatsu.yj@renesas.com you wrote:
Before a kernel boots, GPIO, SYS-DMAC, QSPI and MSIOF clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com
The data structures and the code are all repeated for this patch and the following patches:
[PATCH 4/7] arm: rmobile: lager: Halt clock prior to booting kernel [PATCH 5/7] arm: rmobile: koelsch: Halt clock prior to booting kernel [U-Boot] [PATCH 6/7] arm: rmobile: alt: Halt clock prior to booting kernel [PATCH 7/7] arm: rmobile: gose: Halt clock prior to booting kernelCan you please move the code to a common place so we have it only once?
Yes. I will updates and resend patches.
+} mstptbl[] = {
[0] = { SMSTPCR0, 0x00640801, 0x00400001,RMSTPCR0, 0x00640801, 0x00000000 },[1] = { SMSTPCR1, 0xDB6E9BDF, 0x00000000,RMSTPCR1, 0xDB6E9BDF, 0x00000000 },[2] = { SMSTPCR2, 0x300DA1FC, 0x000CA120,RMSTPCR2, 0x300DA1FC, 0x00000000 },[3] = { SMSTPCR3, 0xF08CF831, 0x00000000,RMSTPCR3, 0xF08CF831, 0x00000000 },[4] = { SMSTPCR4, 0x80000184, 0x00000180,RMSTPCR4, 0x80000184, 0x00000000 },[5] = { SMSTPCR5, 0x44C00046, 0x00000000,RMSTPCR5, 0x44C00046, 0x00000000 },[7] = { SMSTPCR7, 0x07F30718, 0x00200000,RMSTPCR7, 0x07F30718, 0x00000000 },[8] = { SMSTPCR8, 0x01F0FF84, 0x00000000,RMSTPCR8, 0x01F0FF84, 0x00000000 },[9] = { SMSTPCR9, 0xF5979FCF, 0x00021F80,RMSTPCR9, 0xF5979FCF, 0x00001F80 },[10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000,RMSTPCR10, 0xFFFEFFE0, 0x00000000 },[11] = { SMSTPCR11, 0x00000000, 0x00000000,RMSTPCR11, 0x00000000, 0x00000000 },+};
Also, these data look pretty much the same to me, with only minor differences in some bits. If we use some defines instead of the magic numbers this could probably help to see the common part and the differences in the data. We probably don't need board-specific data in the code, and can move this to the configuration files?
Yes. I will move setting data to config files.
Thanks.
Best regards,
Wolfgang Denk
Best regards, Nobuhiro
Before a kernel boots, GPIO, SYS-DMAC, QSPI, MSIOF and IPMMU-GP clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/koelsch/koelsch.c | 43 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 5ebbfcf..8d43f36 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -61,10 +61,49 @@ int board_early_init_f(void) return 0; }
+static struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +} mstptbl[] = { + [0] = { SMSTPCR0, 0x00640801, 0x00400000, + RMSTPCR0, 0x00640801, 0x00000000 }, + [1] = { SMSTPCR1, 0x9B6C9B5A, 0x00000000, + RMSTPCR1, 0x9B6C9B5A, 0x00000000 }, + [2] = { SMSTPCR2, 0x100D21FC, 0x00002000, + RMSTPCR2, 0x100D21FC, 0x00000000 }, + [3] = { SMSTPCR3, 0xF08CD810, 0x00000000, + RMSTPCR3, 0xF08CD810, 0x00000000 }, + [4] = { SMSTPCR4, 0x800001C4, 0x00000180, + RMSTPCR4, 0x800001C4, 0x00000000 }, + [5] = { SMSTPCR5, 0x44C00046, 0x00000000, + RMSTPCR5, 0x44C00046, 0x00000000 }, + [7] = { SMSTPCR7, 0x05BFE618, 0x00200000, + RMSTPCR7, 0x05BFE618, 0x00000000 }, + [8] = { SMSTPCR8, 0x40C0FE85, 0x00000000, + RMSTPCR8, 0x40C0FE85, 0x00000000 }, + [9] = { SMSTPCR9, 0xFF979FFF, 0x00000000, + RMSTPCR9, 0xFF979FFF, 0x00000000 }, + [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000, + RMSTPCR10, 0xFFFEFFE0, 0x00000000 }, + [11] = { SMSTPCR11, 0x000001C0, 0x00000000, + RMSTPCR11, 0x000001C0, 0x00000000 }, +}; + void arch_preboot_os(void) { - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + int i; + + /* Stop all module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_addr, + mstptbl[i].s_dis, mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_addr, + mstptbl[i].r_dis, mstptbl[i].r_ena); + } }
/* LSI pin pull-up control */
Before a kernel boots, GPIO, SYS-DMAC, QSPI, MSIOF and IPMMU-GP clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/alt/alt.c | 43 +++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 41 insertions(+), 2 deletions(-)
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c index e3cfe54..f8f54ef 100644 --- a/board/renesas/alt/alt.c +++ b/board/renesas/alt/alt.c @@ -60,10 +60,49 @@ int board_early_init_f(void) return 0; }
+static struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +} mstptbl[] = { + [0] = { SMSTPCR0, 0x00440801, 0x00400000, + RMSTPCR0, 0x00440801, 0x00000000 }, + [1] = { SMSTPCR1, 0x936899DA, 0x00000000, + RMSTPCR1, 0x936899DA, 0x00000000 }, + [2] = { SMSTPCR2, 0x100D21FC, 0x00002000, + RMSTPCR2, 0x100D21FC, 0x00000000 }, + [3] = { SMSTPCR3, 0xE084D810, 0x00000000, + RMSTPCR3, 0xE084D810, 0x00000000 }, + [4] = { SMSTPCR4, 0x800001C4, 0x00000180, + RMSTPCR4, 0x800001C4, 0x00000000 }, + [5] = { SMSTPCR5, 0x40C00044, 0x00000000, + RMSTPCR5, 0x40C00044, 0x00000000 }, + [7] = { SMSTPCR7, 0x013FE618, 0x00080000, + RMSTPCR7, 0x013FE618, 0x00000000 }, + [8] = { SMSTPCR8, 0x40803C05, 0x00000000, + RMSTPCR8, 0x40803C05, 0x00000000 }, + [9] = { SMSTPCR9, 0xFB879FEE, 0x00000000, + RMSTPCR9, 0xFB879FEE, 0x00000000 }, + [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000, + RMSTPCR10, 0xFFFEFFE0, 0x00000000 }, + [11] = { SMSTPCR11, 0x000001C0, 0x00000000, + RMSTPCR11, 0x000001C0, 0x00000000 }, +}; + void arch_preboot_os(void) { - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + int i; + + /* Stop all module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_addr, + mstptbl[i].s_dis, mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_addr, + mstptbl[i].r_dis, mstptbl[i].r_ena); + } }
int board_init(void)
Before a kernel boots, GPIO, SYS-DMAC, QSPI, MSIOF and IPMMU-GP clock is halted.
Signed-off-by: Hisashi Nakamura hisashi.nakamura.ak@renesas.com Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu.yj@renesas.com --- board/renesas/gose/gose.c | 44 ++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/board/renesas/gose/gose.c b/board/renesas/gose/gose.c index 0b2d904..5ee5a06 100644 --- a/board/renesas/gose/gose.c +++ b/board/renesas/gose/gose.c @@ -60,14 +60,54 @@ int board_early_init_f(void) return 0; }
+static struct mstp_ctl { + u32 s_addr; + u32 s_dis; + u32 s_ena; + u32 r_addr; + u32 r_dis; + u32 r_ena; +} mstptbl[] = { + [0] = { SMSTPCR0, 0x00640801, 0x00400000, + RMSTPCR0, 0x00640801, 0x00000000 }, + [1] = { SMSTPCR1, 0x9B6C9B5A, 0x00000000, + RMSTPCR1, 0x9B6C9B5A, 0x00000000 }, + [2] = { SMSTPCR2, 0x100D21FC, 0x00002000, + RMSTPCR2, 0x100D21FC, 0x00000000 }, + [3] = { SMSTPCR3, 0xF08CD810, 0x00000000, + RMSTPCR3, 0xF08CD810, 0x00000000 }, + [4] = { SMSTPCR4, 0x800001C4, 0x00000180, + RMSTPCR4, 0x800001C4, 0x00000000 }, + [5] = { SMSTPCR5, 0x44C00046, 0x00000000, + RMSTPCR5, 0x44C00046, 0x00000000 }, + [7] = { SMSTPCR7, 0x05BFE618, 0x00200000, + RMSTPCR7, 0x05BFE618, 0x00000000 }, + [8] = { SMSTPCR8, 0x40C0FE85, 0x00000000, + RMSTPCR8, 0x40C0FE85, 0x00000000 }, + [9] = { SMSTPCR9, 0xFF979FFF, 0x00000000, + RMSTPCR9, 0xFF979FFF, 0x00000000 }, + [10] = { SMSTPCR10, 0xFFFEFFE0, 0x00000000, + RMSTPCR10, 0xFFFEFFE0, 0x00000000 }, + [11] = { SMSTPCR11, 0x000001C0, 0x00000000, + RMSTPCR11, 0x000001C0, 0x00000000 }, +}; + #define TSTR0 0x04 #define TSTR0_STR0 0x01 void arch_preboot_os(void) { + int i; + /* stop TMU0 */ mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); - /* Disable TMU0 */ - mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); + + /* Stop all module clock */ + for (i = 0; i < ARRAY_SIZE(mstptbl); i++) { + mstp_setclrbits_le32(mstptbl[i].s_addr, mstptbl[i].s_addr, + mstptbl[i].s_dis, mstptbl[i].s_ena); + mstp_setclrbits_le32(mstptbl[i].r_addr, mstptbl[i].r_addr, + mstptbl[i].r_dis, mstptbl[i].r_ena); + } }
#define PUPR5 0xE6060114
participants (2)
-
Nobuhiro Iwamatsu -
Wolfgang Denk