Since some driver like ohci, lcd used dcache functions. But m68k don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all m68k cpu.

Also each cpu can implement its own implementation. If not implemented then by default is using an empty function.

Signed-off-by: Josh Wu josh.wu@atmel.com Acked-by: Angelo Dureghello angelo@sysam.it ---

Changes in v3: - add Angelo's Acked-by.

Changes in v2: - new added.

arch/m68k/lib/cache.c | 9 +++++++++ 1 file changed, 9 insertions(+)

diff --git a/arch/m68k/lib/cache.c b/arch/m68k/lib/cache.c index 21daf3d..ace791b 100644 --- a/arch/m68k/lib/cache.c +++ b/arch/m68k/lib/cache.c @@ -132,3 +132,12 @@ void dcache_invalid(void) __asm__ __volatile__("movec %0, %%cacr"::"r"(temp)); #endif } + +__weak void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ + /* An empty stub, real implementation should be in platform code */ +} +__weak void flush_dcache_range(unsigned long start, unsigned long stop) +{ + /* An empty stub, real implementation should be in platform code */ +}

Since some driver like ohci, lcd used dcache functions. But some ARM cpu don't implement the invalidate_dcache_range()/flush_dcache_range() functions.

To avoid compiling errors this patch adds an weak empty stub function for all ARM cpu in arch/arm/lib/cache.c. And ARM cpu still can implemnt its own cache functions on the cpu folder.

Signed-off-by: Josh Wu josh.wu@atmel.com ---

Changes in v3: - remove the same functions in the cpu/ files as they will use the weak function provided in lib/cache.c

Changes in v2: - new added.

arch/arm/cpu/arm1136/cpu.c | 8 -------- arch/arm/cpu/arm926ejs/cache.c | 8 -------- arch/arm/cpu/armv7/cache_v7.c | 8 -------- arch/arm/cpu/armv8/cache_v8.c | 8 -------- arch/arm/lib/cache.c | 9 +++++++++ 5 files changed, 9 insertions(+), 32 deletions(-)

diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c index a7aed4b..b4d1d54 100644 --- a/arch/arm/cpu/arm1136/cpu.c +++ b/arch/arm/cpu/arm1136/cpu.c @@ -134,14 +134,6 @@ void flush_dcache_all(void) { }

-void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ -} - void flush_cache(unsigned long start, unsigned long size) { } diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 8d7873c..99d1a13 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -83,14 +83,6 @@ void flush_dcache_all(void) { }

-void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ -} - void flush_cache(unsigned long start, unsigned long size) { } diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index e8ee875..4f0e406 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -304,14 +304,6 @@ void flush_dcache_all(void) { }

-void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ -} - void arm_init_before_mmu(void) { } diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index c5ec529..f8c17cc 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -149,14 +149,6 @@ void flush_dcache_all(void) { }

-void invalidate_dcache_range(unsigned long start, unsigned long stop) -{ -} - -void flush_dcache_range(unsigned long start, unsigned long stop) -{ -} - void dcache_enable(void) { } diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index 74cfde6..bc48f53 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -53,6 +53,15 @@ __weak void enable_caches(void) puts("WARNING: Caches not enabled\n"); }

+__weak void invalidate_dcache_range(unsigned long start, unsigned long stop) +{ + /* An empty stub, real implementation should be in platform code */ +} +__weak void flush_dcache_range(unsigned long start, unsigned long stop) +{ + /* An empty stub, real implementation should be in platform code */ +} + #ifdef CONFIG_SYS_NONCACHED_MEMORY /* * Reserve one MMU section worth of address space below the malloc() area that

Current many cpu use the same flush_cache() function, which just call the flush_dcache_range(). So implement a weak flush_cache() for all the cpus to use.

In original weak flush_cache() in arch/arm/lib/cache.c, there has some code for ARM1136 & ARM926ejs. But in the arch/arm/cpu/arm1136/cpu.c and arch/arm/cpu/arm926ejs/cache.c, there implements a real flush_cache() function as well. That means the original code for ARM1136 & ARM926ejs in weak flush_cache() of arch/arm/lib/cache.c is totally useless.

So in this patch remove such code in flush_cache() and only call flush_dcache_range().

Signed-off-by: Josh Wu josh.wu@atmel.com ---

Changes in v3: - new added.

arch/arm/cpu/arm1136/cpu.c | 9 --------- arch/arm/cpu/arm926ejs/cache.c | 9 --------- arch/arm/cpu/armv7/cache_v7.c | 13 ------------- arch/arm/cpu/armv8/cache_v8.c | 8 -------- arch/arm/lib/cache.c | 26 +++++--------------------- 5 files changed, 5 insertions(+), 60 deletions(-)

diff --git a/arch/arm/cpu/arm1136/cpu.c b/arch/arm/cpu/arm1136/cpu.c index b4d1d54..f092ffc 100644 --- a/arch/arm/cpu/arm1136/cpu.c +++ b/arch/arm/cpu/arm1136/cpu.c @@ -120,11 +120,6 @@ void flush_dcache_range(unsigned long start, unsigned long stop) asm volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); }

-void flush_cache(unsigned long start, unsigned long size) -{ - flush_dcache_range(start, start + size); -} - #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) { @@ -133,10 +128,6 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } - -void flush_cache(unsigned long start, unsigned long size) -{ -} #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */

#if !defined(CONFIG_SYS_ICACHE_OFF) || !defined(CONFIG_SYS_DCACHE_OFF) diff --git a/arch/arm/cpu/arm926ejs/cache.c b/arch/arm/cpu/arm926ejs/cache.c index 99d1a13..e5c1a6a 100644 --- a/arch/arm/cpu/arm926ejs/cache.c +++ b/arch/arm/cpu/arm926ejs/cache.c @@ -69,11 +69,6 @@ void flush_dcache_range(unsigned long start, unsigned long stop)

asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0)); } - -void flush_cache(unsigned long start, unsigned long size) -{ - flush_dcache_range(start, start + size); -} #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) { @@ -82,10 +77,6 @@ void invalidate_dcache_all(void) void flush_dcache_all(void) { } - -void flush_cache(unsigned long start, unsigned long size) -{ -} #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */

/* diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index 4f0e406..a5aa4fa 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -286,15 +286,6 @@ void mmu_page_table_flush(unsigned long start, unsigned long stop) flush_dcache_range(start, stop); v7_inval_tlb(); } - -/* - * Flush range from all levels of d-cache/unified-cache used: - * Affects the range [start, start + size - 1] - */ -void flush_cache(unsigned long start, unsigned long size) -{ - flush_dcache_range(start, start + size); -} #else /* #ifndef CONFIG_SYS_DCACHE_OFF */ void invalidate_dcache_all(void) { @@ -308,10 +299,6 @@ void arm_init_before_mmu(void) { }

-void flush_cache(unsigned long start, unsigned long size) -{ -} - void mmu_page_table_flush(unsigned long start, unsigned long stop) { } diff --git a/arch/arm/cpu/armv8/cache_v8.c b/arch/arm/cpu/armv8/cache_v8.c index f8c17cc..92b66c3 100644 --- a/arch/arm/cpu/armv8/cache_v8.c +++ b/arch/arm/cpu/armv8/cache_v8.c @@ -217,11 +217,3 @@ void __weak enable_caches(void) icache_enable(); dcache_enable(); } - -/* - * Flush range from all levels of d-cache/unified-cache - */ -void flush_cache(unsigned long start, unsigned long size) -{ - flush_dcache_range(start, start + size); -} diff --git a/arch/arm/lib/cache.c b/arch/arm/lib/cache.c index bc48f53..cd13db3 100644 --- a/arch/arm/lib/cache.c +++ b/arch/arm/lib/cache.c @@ -10,29 +10,13 @@ #include <common.h> #include <malloc.h>

+/* + * Flush range from all levels of d-cache/unified-cache. + * Affects the range [start, start + size - 1]. + */ __weak void flush_cache(unsigned long start, unsigned long size) { -#if defined(CONFIG_CPU_ARM1136) - -#if !defined(CONFIG_SYS_ICACHE_OFF) - asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */ -#endif - -#if !defined(CONFIG_SYS_DCACHE_OFF) - asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */ -#endif - -#endif /* CONFIG_CPU_ARM1136 */ - -#ifdef CONFIG_CPU_ARM926EJS -#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) - /* test and clean, page 2-23 of arm926ejs manual */ - asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); - /* disable write buffer as well (page 2-22) */ - asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); -#endif -#endif /* CONFIG_CPU_ARM926EJS */ - return; + flush_dcache_range(start, start + size); }

/*

Remove the CONFIG_DM_USB limitation to enable cache support functions. Tested on SAMA5D3x-EK board.

Signed-off-by: Josh Wu josh.wu@atmel.com Acked-by: Hans de Goede hdegoede@redhat.com ---

Changes in v3: None Changes in v2: - CONFIG_DM_USB in periodic_unlink() should be remove as well. This version remove it. - Add Hans de Goede's acked-by.

drivers/usb/host/ohci-hcd.c | 12 +----------- drivers/usb/host/ohci.h | 2 +- 2 files changed, 2 insertions(+), 12 deletions(-)

diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 691ed1c..0ffd838 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -105,21 +105,13 @@ static struct pci_device_id ehci_pci_ids[] = { # define m32_swap(x) cpu_to_le32(x) #endif /* CONFIG_SYS_OHCI_BE_CONTROLLER */

-#ifdef CONFIG_DM_USB -/* - * We really should do proper cache flushing everywhere, but for now we only - * do it for new (driver-model) usb code to avoid regressions. - */ +/* We really should do proper cache flushing everywhere */ #define flush_dcache_buffer(addr, size) \ flush_dcache_range((unsigned long)(addr), \ ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN)) #define invalidate_dcache_buffer(addr, size) \ invalidate_dcache_range((unsigned long)(addr), \ ALIGN((unsigned long)(addr) + size, ARCH_DMA_MINALIGN)) -#else -#define flush_dcache_buffer(addr, size) -#define invalidate_dcache_buffer(addr, size) -#endif

/* Do not use sizeof(ed / td) as our ed / td structs contain extra members */ #define flush_dcache_ed(addr) flush_dcache_buffer(addr, 16) @@ -763,12 +755,10 @@ static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed, if (((struct ed *) m32_swap((unsigned long)ed_p)) == ed) { *ed_p = ed->hwNextED; -#ifdef CONFIG_DM_USB aligned_ed_p = (unsigned long)ed_p; aligned_ed_p &= ~(ARCH_DMA_MINALIGN - 1); flush_dcache_range(aligned_ed_p, aligned_ed_p + ARCH_DMA_MINALIGN); -#endif break; } ed_p = &(((struct ed *) diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index f1526d4..9b0c4a2 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -18,7 +18,7 @@ # define ohci_writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a)) #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */

-#if defined CONFIG_DM_USB && ARCH_DMA_MINALIGN > 16 +#if ARCH_DMA_MINALIGN > 16 #define ED_ALIGNMENT ARCH_DMA_MINALIGN #else #define ED_ALIGNMENT 16