[PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images
Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required for booting up Cyclone5/Arria10.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com --- Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \ - spl/u-boot-spl.sfp spl/u-boot-spl.sfp \ - u-boot.img > $@ || rm -f $@ + spl/u-boot-spl.sfp \ + spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \ + cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@ u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE $(call if_changed,socboot)
On 8/5/20 10:15 AM, Chee Hong Ang wrote:
Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required for booting up Cyclone5/Arria10.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com
Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
-----Original Message----- From: Marek Vasut marex@denx.de Sent: Wednesday, August 5, 2020 4:23 PM To: Ang, Chee Hong chee.hong.ang@intel.com; u-boot@lists.denx.de Cc: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Tom Rini trini@konsulko.com; See, Chin Liang chin.liang.see@intel.com; Tan, Ley Foon ley.foon.tan@intel.com; Chee, Tien Fong tien.fong.chee@intel.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Subject: Re: [PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images
On 8/5/20 10:15 AM, Chee Hong Ang wrote:
Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required for booting up Cyclone5/Arria10.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com
Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images, each SPL image size is 256KB. So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have problem for 128KB erase size NAND.
Regards Ley Foon
On 8/5/20 11:15 AM, Tan, Ley Foon wrote: [...]
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images, each SPL image size is 256KB. So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?
-----Original Message----- From: Marek Vasut marex@denx.de Sent: Wednesday, August 5, 2020 5:18 PM To: Tan, Ley Foon ley.foon.tan@intel.com; Ang, Chee Hong chee.hong.ang@intel.com; u-boot@lists.denx.de Cc: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Tom Rini trini@konsulko.com; See, Chin Liang chin.liang.see@intel.com; Chee, Tien Fong tien.fong.chee@intel.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Subject: Re: [PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images
On 8/5/20 11:15 AM, Tan, Ley Foon wrote: [...]
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT
$@
cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images,
each SPL image size is 256KB.
So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have
problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?
Cyclone 5 and Arria 10 have different size.
Cyclone 5 SPL: 64KB each, spl/u-boot-splx4.sfp is 256KB
Arria 10 SPL: 256KB each, spl/u-boot-splx4.sfp is 1MB
Regards Ley Foon
On 8/5/20 11:26 AM, Tan, Ley Foon wrote:
Hi,
[...]
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT
$@
cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images,
each SPL image size is 256KB.
So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have
problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?
Cyclone 5 and Arria 10 have different size.
Cyclone 5 SPL: 64KB each, spl/u-boot-splx4.sfp is 256KB
Arria 10 SPL: 256KB each, spl/u-boot-splx4.sfp is 1MB
So are you sure this will work on NAND with 128 kiB erase blocks on CV/AV ? I think you will run into problems with padding there. But maybe we don't support that anyway, so add a comment and be done with it.
-----Original Message----- From: Marek Vasut marex@denx.de Sent: Wednesday, August 5, 2020 7:36 PM To: Tan, Ley Foon ley.foon.tan@intel.com; Ang, Chee Hong chee.hong.ang@intel.com; u-boot@lists.denx.de Cc: Simon Goldschmidt simon.k.r.goldschmidt@gmail.com; Tom Rini trini@konsulko.com; See, Chin Liang chin.liang.see@intel.com; Chee, Tien Fong tien.fong.chee@intel.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Subject: Re: [PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images
On 8/5/20 11:26 AM, Tan, Ley Foon wrote:
Hi,
[...]
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT
$@
cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images,
each SPL image size is 256KB.
So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have
problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?
Cyclone 5 and Arria 10 have different size.
Cyclone 5 SPL: 64KB each, spl/u-boot-splx4.sfp is 256KB
Arria 10 SPL: 256KB each, spl/u-boot-splx4.sfp is 1MB
So are you sure this will work on NAND with 128 kiB erase blocks on CV/AV ? I think you will run into problems with padding there. But maybe we don't support that anyway, so add a comment and be done with it.
If the erase block size is 128KB and we program the spl/u-boot-splx4.sfp with 256KB for Cyclone5. It consumes 2 erase block size, why do you think it will have problem?
By the way, tested spl/u-boot-splx4.sfp on Arria 10 NAND with 128KB erase block size, it is working.
Regards Ley Foon
On 8/6/20 3:50 AM, Tan, Ley Foon wrote:
Hi,
> diff --git a/Makefile b/Makefile > index 2629a74..13429a0 100644 > --- a/Makefile > +++ b/Makefile > @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE > ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT
$@
> cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \ > - spl/u-boot-spl.sfp spl/u-boot-spl.sfp \ > - u-boot.img > $@ || rm -f $@ > + spl/u-boot-spl.sfp \ > + spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \ > + cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@
Isn't that what the existing code does already ?
Also, this will I think fail on 128k erase block size NAND due to missing padding.
This is to generate an output file (spl/u-boot-splx4.sfp) with 4 SPL images,
each SPL image size is 256KB.
So, spl/u-boot-splx4.sfp is always with 1MB size (4x256KB). Shouldn't have
problem for 128KB erase size NAND.
Isn't the SPL padded to 64 kiB each ?
Cyclone 5 and Arria 10 have different size.
Cyclone 5 SPL: 64KB each, spl/u-boot-splx4.sfp is 256KB
Arria 10 SPL: 256KB each, spl/u-boot-splx4.sfp is 1MB
So are you sure this will work on NAND with 128 kiB erase blocks on CV/AV ? I think you will run into problems with padding there. But maybe we don't support that anyway, so add a comment and be done with it.
If the erase block size is 128KB and we program the spl/u-boot-splx4.sfp with 256KB for Cyclone5. It consumes 2 erase block size, why do you think it will have problem?
See "Figure A-7: NAND Flash Image Layout for 128 KB Memory Blocks" in Cyclone V datasheet, appending A.
By the way, tested spl/u-boot-splx4.sfp on Arria 10 NAND with 128KB erase block size, it is working.
Isn't that only because it picks the first SPL copy and it accidentally works fine ? Try to write in an image with SPL 0,2,3 corrupted and only SPL 1 valid , then it wont boot I think.
Can you explain why this x4 image is needed? the top level u-boot-with-spl.sfp or whatever it is called already creates four spl entries. what are you generating the x4 image for?
--dalon
On Wed, 2020-08-05 at 16:15 +0800, Chee Hong Ang wrote:
Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required for booting up Cyclone5/Arria10.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com
Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img FORCE ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE $(call if_changed,socboot)
-----Original Message----- From: Westergreen, Dalon dalon.westergreen@intel.com Sent: Saturday, August 15, 2020 3:24 AM To: u-boot@lists.denx.de; Ang, Chee Hong chee.hong.ang@intel.com Cc: See, Chin Liang chin.liang.see@intel.com; Tan, Ley Foon ley.foon.tan@intel.com; Chee, Tien Fong tien.fong.chee@intel.com; Lim, Elly Siew Chin elly.siew.chin.lim@intel.com Subject: Re: [PATCH v1] Makefile: socfpga: Generate spl/u-boot-splx4.sfp with 4 SPL images
Can you explain why this x4 image is needed? the top level u-boot-with- spl.sfp or whatever it is called already creates four spl entries. what are you generating the x4 image for?
If we put u-boot.img in FAT partition, then we don't need u-boot-with- spl.sfp. Just 4 x SPL images.
Regards Ley Foon
On Wed, 2020-08-05 at 16:15 +0800, Chee Hong Ang wrote:
Generate spl/u-boot-splx4.sfp which consist of 4 SPL images required for booting up Cyclone5/Arria10.
Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com
Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/Makefile b/Makefile index 2629a74..13429a0 100644 --- a/Makefile +++ b/Makefile @@ -1578,8 +1578,9 @@ u-boot.spr: spl/u-boot-spl.img u-boot.img
FORCE
ifneq ($(CONFIG_ARCH_SOCFPGA),) quiet_cmd_socboot = SOCBOOT $@ cmd_socboot = cat spl/u-boot-spl.sfp spl/u-boot-spl.sfp \
spl/u-boot-spl.sfp spl/u-boot-spl.sfp \u-boot.img > $@ || rm -f $@
spl/u-boot-spl.sfp \spl/u-boot-spl.sfp > spl/u-boot-splx4.sfp ; \cat spl/u-boot-splx4.sfp u-boot.img > $@ || rm -f $@u-boot-with-spl.sfp: spl/u-boot-spl.sfp u-boot.img FORCE $(call if_changed,socboot)
participants (4)
-
Chee Hong Ang -
Marek Vasut -
Tan, Ley Foon -
Westergreen, Dalon