[U-Boot-Users] PowerPC: Relation between HRCW(BMS) and BDI2000 [TARGET] BOOTADDR, [FLASH] <flash_base>
Hi; This is not directly related to u-boot but I hope someone can enlighten me on this. The HRCW(BMS) defines the boot memory space to be either in 0xFE00_0000:0xFFFF_FFFF or 0:0x01FF_FFFF. I am new to this and I would like to find out if HRCW(BMS) is tightly coupled to the flash base and bootaddress defined in bdi2000 configuration file. If my board has 4 flash chips with 2MB per chip, should I have something like this with relation to HRCW(BMS)?
HRCW(BMS) = 0 to 0x01FF_FFFF: [TARGET] BOOTADDR = 0x100
[FLASH] erase 0 CHIP erase 0x200000 CHIP erase 0x400000 CHIP erase 0x800000 CHIP
uboot: TEXT_BASE = 0
versus:
HRCW(BMS) = 0xFE00_0000 to 0xFFFF_FFFF: [TARGET] BOOTADDR = 0xFFF00100
[FLASH] erase 0xFF800000 CHIP erase 0xFFA00000 CHIP erase 0xFFC00000 CHIP erase 0xFFE00000 CHIP
uboot: TEXT_BASE = 0xFFF0 0000
If I use the second configuration with BMS 0xFE00_0000:0xFFFF_FFFF, my u-boot image is loaded to the end of the flash region and the size of my u-boot image is limited to (0xFFFF_FFFF - 0xFFF0_0000 = 1MB) while if I use BMS 0x0:0x01FF_FFFF, the size of the u-boot is not limited? Thank you and appreciate any insight.
Regards, TEH
In message OFA314A9CB.8C2BEC65-ON48256FD5.002C0970@uk.marconicomms.com you wrote:
would like to find out if HRCW(BMS) is tightly coupled to the flash base
No, not at all. The flash base is completely arbitrary on these systems.
and bootaddress defined in bdi2000 configuration file. If my board has 4
Yes, the boot address in the BDI config file will be 0xFFF00100 in one case and 0x00000100 in the other one.
flash chips with 2MB per chip, should I have something like this with relation to HRCW(BMS)?
HRCW(BMS) = 0 to 0x01FF_FFFF: [TARGET] BOOTADDR = 0x100
This will work.
[FLASH] erase 0 CHIP erase 0x200000 CHIP erase 0x400000 CHIP erase 0x800000 CHIP
This is probably wrong. Most probably your flash chips are not attached to 4 differrent chip selects, but to one (using them in parallel).
uboot: TEXT_BASE = 0
This is definitely wrong. RAM has to be mapped at address 0x0000, so you cannot map flash there, too.
versus:
HRCW(BMS) = 0xFE00_0000 to 0xFFFF_FFFF: [TARGET] BOOTADDR = 0xFFF00100
This will work.
[FLASH] erase 0xFF800000 CHIP erase 0xFFA00000 CHIP erase 0xFFC00000 CHIP erase 0xFFE00000 CHIP
This is probably wrong. See above.
uboot: TEXT_BASE = 0xFFF0 0000
This might work.
If I use the second configuration with BMS 0xFE00_0000:0xFFFF_FFFF,my u-boot image is loaded to the end of the flash region and the size of my u-boot image is limited to (0xFFFF_FFFF - 0xFFF0_0000 = 1MB) while if I use
This is more than enough. At the moment I know only of one configuration where U-Boot exceeds 256 kB.
BMS 0x0:0x01FF_FFFF, the size of the u-boot is not limited?
Don't worry about U-Boot size. 1 MB will be more than enough for the next 2 years or so :-)
Best regards,
Wolfgang Denk
participants (2)
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KokHow Teh -
Wolfgang Denk