Import Linux 5.2-rc1 sei510 DT from 5f9e832c1370 ("Linus 5.3-rc1") for the meson-g12a-sei510 board.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/meson-g12a-sei510.dts | 502 +++++++++++++++++++++++++++++ 2 files changed, 503 insertions(+) create mode 100644 arch/arm/dts/meson-g12a-sei510.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ad4d2357bb..67b625e4f6 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -136,6 +136,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-gxm-khadas-vim2.dtb \ meson-axg-s400.dtb \ meson-g12a-u200.dtb \ + meson-g12a-sei510.dtb \ meson-g12b-odroid-n2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts new file mode 100644 index 0000000000..c7a8736885 --- /dev/null +++ b/arch/arm/dts/meson-g12a-sei510.dts @@ -0,0 +1,502 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre SAS. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/meson-g12a-gpio.h> +#include <dt-bindings/sound/meson-g12a-tohdmitx.h> + +/ { + compatible = "seirobotics,sei510", "amlogic,g12a"; + model = "SEI Robotics SEI510"; + + adc_keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + + button-onoff { + label = "On/Off"; + linux,code = <KEY_POWER>; + press-threshold-microvolt = <1700000>; + }; + }; + + aliases { + serial0 = &uart_AO; + ethernet0 = &ethmac; + }; + + mono_dac: audio-codec-0 { + compatible = "maxim,max98357a"; + #sound-dai-cells = <0>; + sound-name-prefix = "U16"; + sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>; + }; + + dmics: audio-codec-1 { + #sound-dai-cells = <0>; + compatible = "dmic-codec"; + num-channels = <2>; + wakeup-delay-ms = <50>; + status = "okay"; + sound-name-prefix = "MIC"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + cvbs-connector { + compatible = "composite-video-connector"; + + port { + cvbs_connector_in: endpoint { + remote-endpoint = <&cvbs_vdac_out>; + }; + }; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + ao_5v: regulator-ao_5v { + compatible = "regulator-fixed"; + regulator-name = "AO_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + dc_in: regulator-dc_in { + compatible = "regulator-fixed"; + regulator-name = "DC_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + emmc_1v8: regulator-emmc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "EMMC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + vddao_3v3_t: regultor-vddao_3v3_t { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3_T"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-high; + }; + + vddio_ao1v8: regulator-vddio_ao1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + reserved-memory { + /* TEE Reserved Memory */ + bl32_reserved: bl32@5000000 { + reg = <0x0 0x05300000 0x0 0x2000000>; + no-map; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sound { + compatible = "amlogic,axg-sound-card"; + model = "G12A-SEI510"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, + <&tdmin_a>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", + "TDM_A Playback", "TDMOUT_A OUT", + "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", + "TDM_B Playback", "TDMOUT_B OUT", + "TODDR_A IN 4", "PDM Capture", + "TODDR_B IN 4", "PDM Capture", + "TODDR_C IN 4", "PDM Capture", + "TDMIN_A IN 0", "TDM_A Capture", + "TDMIN_A IN 3", "TDM_A Loopback", + "TDMIN_B IN 0", "TDM_A Capture", + "TDMIN_B IN 3", "TDM_A Loopback", + "TDMIN_A IN 1", "TDM_B Capture", + "TDMIN_A IN 4", "TDM_B Loopback", + "TDMIN_B IN 1", "TDM_B Capture", + "TDMIN_B IN 4", "TDM_B Loopback", + "TODDR_A IN 0", "TDMIN_A OUT", + "TODDR_B IN 0", "TDMIN_A OUT", + "TODDR_C IN 0", "TDMIN_A OUT", + "TODDR_A IN 1", "TDMIN_B OUT", + "TODDR_B IN 1", "TDMIN_B OUT", + "TODDR_C IN 1", "TDMIN_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>; + assigned-clock-parents = <0>, <0>, <0>; + assigned-clock-rates = <294912000>, + <270950400>, + <393216000>; + status = "okay"; + + dai-link-0 { + sound-dai = <&frddr_a>; + }; + + dai-link-1 { + sound-dai = <&frddr_b>; + }; + + dai-link-2 { + sound-dai = <&frddr_c>; + }; + + dai-link-3 { + sound-dai = <&toddr_a>; + }; + + dai-link-4 { + sound-dai = <&toddr_b>; + }; + + dai-link-5 { + sound-dai = <&toddr_c>; + }; + + /* internal speaker interface */ + dai-link-6 { + sound-dai = <&tdmif_a>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + mclk-fs = <256>; + + codec-0 { + sound-dai = <&mono_dac>; + }; + + codec-1 { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; + }; + }; + + /* 8ch hdmi interface */ + dai-link-7 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; + dai-tdm-slot-tx-mask-1 = <1 1>; + dai-tdm-slot-tx-mask-2 = <1 1>; + dai-tdm-slot-tx-mask-3 = <1 1>; + mclk-fs = <256>; + + codec@0 { + sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; + }; + }; + + /* internal digital mics */ + dai-link-8 { + sound-dai = <&pdm>; + + codec { + sound-dai = <&dmics>; + }; + }; + + /* hdmi glue */ + dai-link-9 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { + sound-dai = <&hdmi_tx>; + }; + }; + }; +}; + +&arb { + status = "okay"; +}; + +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&clkc_audio { + status = "okay"; +}; + +&cvbs_vdac_port { + cvbs_vdac_out: endpoint { + remote-endpoint = <&cvbs_connector_in>; + }; +}; + +&ethmac { + status = "okay"; + phy-handle = <&internal_ephy>; + phy-mode = "rmii"; +}; + +&frddr_a { + status = "okay"; +}; + +&frddr_b { + status = "okay"; +}; + +&frddr_c { + status = "okay"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; +}; + +&pdm { + pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>, + <&pdm_din2_z_pins>, <&pdm_din3_z_pins>, + <&pdm_dclk_z_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao1v8>; +}; + +/* SDIO */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr50; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_ao1v8>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + non-removable; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&emmc_1v8>; +}; + +&tdmif_a { + pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>; + pinctrl-names = "default"; + status = "okay"; + + assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>, + <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>; + assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>, + <&clkc_audio AUD_CLKID_MST_A_LRCLK>; + assigned-clock-rates = <0>, <0>; +}; + +&tdmif_b { + status = "okay"; +}; + +&tdmin_a { + status = "okay"; +}; + +&tdmin_b { + status = "okay"; +}; + +&tdmout_a { + status = "okay"; +}; + +&tdmout_b { + status = "okay"; +}; + +&toddr_a { + status = "okay"; +}; + +&toddr_b { + status = "okay"; +}; + +&toddr_c { + status = "okay"; +}; + +&tohdmitx { + status = "okay"; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + vbat-supply = <&vddao_3v3>; + vddio-supply = <&vddio_ao1v8>; + }; +}; + +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + dr_mode = "host"; +};

The Secure Monitor offers multiple services, like returning the SoC unique serial number, already used to generate an unique MAC address.

This adds a new, Amlogic specific, "sm" cmd with a "serial" subcommand to write the SoC unique serial to memory.

This "cm" command will be extended in further patches.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- arch/arm/mach-meson/sm.c | 48 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+)

diff --git a/arch/arm/mach-meson/sm.c b/arch/arm/mach-meson/sm.c index 05b7f0bdf2..99fa17d9a8 100644 --- a/arch/arm/mach-meson/sm.c +++ b/arch/arm/mach-meson/sm.c @@ -77,3 +77,51 @@ int meson_sm_get_serial(void *buffer, size_t size)

return 0; } + +static int do_sm_serial(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + ulong address; + int ret; + + if (argc < 2) + return CMD_RET_USAGE; + + address = simple_strtoul(argv[1], NULL, 0); + + ret = meson_sm_get_serial((void *)address, SM_CHIP_ID_SIZE); + if (ret) + return CMD_RET_FAILURE; + + return CMD_RET_SUCCESS; +} + +static cmd_tbl_t cmd_sm_sub[] = { + U_BOOT_CMD_MKENT(serial, 2, 1, do_sm_serial, "", ""), +}; + +static int do_sm(cmd_tbl_t *cmdtp, int flag, int argc, + char *const argv[]) +{ + cmd_tbl_t *c; + + if (argc < 2) + return CMD_RET_USAGE; + + /* Strip off leading 'sm' command argument */ + argc--; + argv++; + + c = find_cmd_tbl(argv[0], &cmd_sm_sub[0], ARRAY_SIZE(cmd_sm_sub)); + + if (c) + return c->cmd(cmdtp, flag, argc, argv); + else + return CMD_RET_USAGE; +} + +U_BOOT_CMD( + sm, 5, 0, do_sm, + "Secure Monitor Control", + "serial <address> - read chip unique id to memory address" +);

From: Jerome Brunet jbrunet@baylibre.com

The SEI510 board is based on the Amlogic S905X2 SoC from the Amlogic G12A SoC family.

The board has the following specifications : - Amlogic S905X2 ARM Cortex-A53 quad-core SoC - XGB DDR4 SDRAM - 10/100 Ethernet (Internal PHY) - 1 x USB 3.0 Host - eMMC - SDcard - Infrared receiver - SDIO WiFi Module

The board default behaviour is for booting Android and triggers fastboot on recovery or reboot mode.

USB vendor ID (used by fastboot) is 0x18d1 (Google) for default udev rules for existing android users work out of the box.

Signed-off-by: Kevin Hilman khilman@baylibre.com Signed-off-by: Jerome Brunet jbrunet@baylibre.com Signed-off-by: Guillaume La Roque glaroque@baylibre.com Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- board/amlogic/sei510/MAINTAINERS | 5 ++ board/amlogic/sei510/Makefile | 6 ++ board/amlogic/sei510/README | 123 +++++++++++++++++++++++++++ board/amlogic/sei510/sei510.c | 26 ++++++ configs/sei510_defconfig | 74 +++++++++++++++++ include/configs/sei510.h | 137 +++++++++++++++++++++++++++++++ 6 files changed, 371 insertions(+) create mode 100644 board/amlogic/sei510/MAINTAINERS create mode 100644 board/amlogic/sei510/Makefile create mode 100644 board/amlogic/sei510/README create mode 100644 board/amlogic/sei510/sei510.c create mode 100644 configs/sei510_defconfig create mode 100644 include/configs/sei510.h

diff --git a/board/amlogic/sei510/MAINTAINERS b/board/amlogic/sei510/MAINTAINERS new file mode 100644 index 0000000000..792ae22176 --- /dev/null +++ b/board/amlogic/sei510/MAINTAINERS @@ -0,0 +1,5 @@ +U200 +M: Neil Armstrong narmstrong@baylibre.com +S: Maintained +F: board/amlogic/sei510/ +F: configs/sei510_defconfig diff --git a/board/amlogic/sei510/Makefile b/board/amlogic/sei510/Makefile new file mode 100644 index 0000000000..03399a3849 --- /dev/null +++ b/board/amlogic/sei510/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong narmstrong@baylibre.com + +obj-y := sei510.o diff --git a/board/amlogic/sei510/README b/board/amlogic/sei510/README new file mode 100644 index 0000000000..216ff06093 --- /dev/null +++ b/board/amlogic/sei510/README @@ -0,0 +1,123 @@ +U-Boot for Amlogic SEI510 +======================= + +SEI510 is a custemer board manufactured by SEI Robotics with the following +specifications: + + - Amlogic S905X2 ARM Cortex-A53 quad-core SoC + - 2GB DDR4 SDRAM + - 10/100 Ethernet (Internal PHY) + - 1 x USB 3.0 Host + - eMMC + - SDcard + - Infrared receiver + - SDIO WiFi Module + +Currently the u-boot port supports the following devices: + - serial + - Ethernet + - Regulators + - Clock controller + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make sei510_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-... + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-... + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-20180418 amlogic-u-boot + > cd amlogic-u-boot + > make g12a_u200_v1_defconfig + > make + > export UBOOTDIR=$PWD + +Download the latest Amlogic Buildroot package, and extract it : + > wget http://openlinux2.amlogic.com:8000/ARM/filesystem/Linux_BSP/buildroot_openli... + > tar xfz buildroot_openlinux_kernel_4.9_fbdev_20180706.tar.gz buildroot_openlinux_kernel_4.9_fbdev_20180706/bootloader + > export BRDIR=$PWD/buildroot_openlinux_kernel_4.9_fbdev_20180706 + > export FIPDIR=$BRDIR/bootloader/uboot-repo/fip + +Go back to mainline U-Boot source tree then : + > mkdir fip + + > wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/b... -O fip/blx_fix.sh + > cp $UBOOTDIR/build/scp_task/bl301.bin fip/ + > cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/ + > cp $FIPDIR/g12a/ddr3_1d.fw fip/ + > cp $FIPDIR/g12a/ddr4_1d.fw fip/ + > cp $FIPDIR/g12a/ddr4_2d.fw fip/ + > cp $FIPDIR/g12a/diag_lpddr4.fw fip/ + > cp $FIPDIR/g12a/lpddr4_1d.fw fip/ + > cp $FIPDIR/g12a/lpddr4_2d.fw fip/ + > cp $FIPDIR/g12a/piei.fw fip/ + > cp u-boot.bin fip/bl33.bin + + > sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 + > $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + > $FIPDIR/g12a/aml_encrypt_g12a --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --level v3 + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/sei510/sei510.c b/board/amlogic/sei510/sei510.c new file mode 100644 index 0000000000..a92fccd3fd --- /dev/null +++ b/board/amlogic/sei510/sei510.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong narmstrong@baylibre.com + */ + +#include <common.h> +#include <dm.h> +#include <environment.h> +#include <asm/io.h> +#include <asm/arch/axg.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +int misc_init_r(void) +{ + meson_eth_init(PHY_INTERFACE_MODE_RMII, + MESON_USE_INTERNAL_RMII_PHY); + + meson_generate_serial_ethaddr(); + + env_set("serial#", "AMLG12ASEI510"); + + return 0; +} diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig new file mode 100644 index 0000000000..20534bd6b4 --- /dev/null +++ b/configs/sei510_defconfig @@ -0,0 +1,74 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="sei510" +CONFIG_SYS_BOARD="sei510" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" sei510" +CONFIG_DEBUG_UART=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_OF_BOARD_SETUP=y +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_FDT=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_LZ4=y +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_DM_GPIO=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ADDR=8 +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_OF_LIBFDT_OVERLAY=y +CONFIG_USB=y +CONFIG_USB_HOST=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_PHY=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_DM_USB=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_FASTBOOT=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_CMD_FASTBOOT=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_OF_LIBFDT=y +CONFIG_EFI_PARTITION=y +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_CMD_GPT=y +CONFIG_CMD_PART=y +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 diff --git a/include/configs/sei510.h b/include/configs/sei510.h new file mode 100644 index 0000000000..9957902250 --- /dev/null +++ b/include/configs/sei510.h @@ -0,0 +1,137 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for the SEI510 + * + * Copyright (C) 2019 Baylibre, SAS + * Author: Jerome Brunet jbrunet@baylibre.com + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SYS_MMC_ENV_PART 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_OFFSET (-0x10000) + +#define CACHE_UUID "99207ae6-5207-11e9-999e-6f77a3612069;" +#define SYSTEM_UUID "99f9b7ac-5207-11e9-8507-c3c037e393f3;" +#define VENDOR_UUID "9d082802-5207-11e9-954c-cbbce08ba108;" +#define USERDATA_UUID "9b976e42-5207-11e9-8f16-ff47ac594b22;" +#define ROOT_UUID "ddb8c3f6-d94d-4394-b633-3134139cc2e0;" + +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=boot,size=64M,bootable,uuid=${uuid_gpt_boot};" \ + "name=cache,size=256M,uuid=" CACHE_UUID \ + "name=system,size=1536M,uuid=" SYSTEM_UUID \ + "name=vendor,size=256M,uuid=" VENDOR_UUID \ + "name=userdata,size=4746M,uuid=" USERDATA_UUID \ + "name=rootfs,size=-,uuid=" ROOT_UUID + +#define BOOTENV_DEV_FASTBOOT(devtypeu, devtypel, instance) \ + "bootcmd_fastboot=" \ + "sm reboot_reason reason;" \ + "setenv run_fastboot 0;" \ + "if gpt verify mmc ${mmcdev} ${partitions}; then; " \ + "else " \ + "echo Broken MMC partition scheme;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${reason}" = "bootloader" -o " \ + ""${reason}" = "fastboot"; then " \ + "echo Fastboot asked by reboot reason;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${skip_fastboot}" -eq 1; then " \ + "echo Fastboot skipped by environment;" \ + "setenv run_fastboot 0;" \ + "fi;" \ + "if test "${force_fastboot}" -eq 1; then " \ + "echo Fastboot forced by environment;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${run_fastboot}" -eq 1; then " \ + "echo Running Fastboot...;" \ + "fastboot 0;" \ + "fi\0" + +#define BOOTENV_DEV_NAME_FASTBOOT(devtypeu, devtypel, instance) \ + "fastboot " + +/* TOFIX: Run actual recovery instead of fastboot */ +#define BOOTENV_DEV_RECOVERY(devtypeu, devtypel, instance) \ + "bootcmd_recovery=" \ + "pinmux dev pinctrl@14;" \ + "pinmux dev pinctrl@40;" \ + "sm reboot_reason reason;" \ + "setenv run_recovery 0;" \ + "if run check_button; then " \ + "echo Recovery button is pressed;" \ + "setenv run_recovery 1;" \ + "elif test "${reason}" = "recovery" -o " \ + ""${reason}" = "update"; then " \ + "echo Recovery asked by reboot reason;" \ + "setenv run_recovery 1;" \ + "fi;" \ + "if test "${skip_recovery}" -eq 1; then " \ + "echo Recovery skipped by environment;" \ + "setenv run_recovery 0;" \ + "fi;" \ + "if test "${force_recovery}" -eq 1; then " \ + "echo Recovery forced by environment;" \ + "setenv run_recovery 1;" \ + "fi;" \ + "if test "${run_recovery}" -eq 1; then " \ + "echo Running Recovery...;" \ + "fastboot 0;" \ + "fi\0" + +#define BOOTENV_DEV_NAME_RECOVERY(devtypeu, devtypel, instance) \ + "recovery " + +#define BOOTENV_DEV_SYSTEM(devtypeu, devtypel, instance) \ + "bootcmd_system=" \ + "echo Loading Android boot partition...;" \ + "mmc dev ${mmcdev};" \ + "setenv bootargs ${bootargs} console=${console} androidboot.serialno=${serial#};" \ + "part start mmc ${mmcdev} ${bootpart} boot_start;" \ + "part size mmc ${mmcdev} ${bootpart} boot_size;" \ + "if mmc read ${loadaddr} ${boot_start} ${boot_size}; then " \ + "echo Running Android...;" \ + "bootm ${loadaddr};" \ + "fi;" \ + "echo Failed to boot Android...;" \ + "reset\0" + +#define BOOTENV_DEV_NAME_SYSTEM(devtypeu, devtypel, instance) \ + "system " + +#define BOOT_TARGET_DEVICES(func) \ + func(ROMUSB, romusb, na) \ + func(FASTBOOT, fastboot, na) \ + func(RECOVERY, recovery, na) \ + func(SYSTEM, system, na) \ + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "partitions=" PARTS_DEFAULT "\0" \ + "mmcdev=2\0" \ + "bootpart=1\0" \ + "gpio_recovery=88\0" \ + "check_button=gpio input ${gpio_recovery};test $? -eq 0;\0" \ + "console=/dev/ttyAML0\0" \ + "bootargs=no_console_suspend\0" \ + "stdin=" STDIN_CFG "\0" \ + "stdout=" STDOUT_CFG "\0" \ + "stderr=" STDOUT_CFG "\0" \ + "loadaddr=0x01000000\0" \ + "fdt_addr_r=0x01000000\0" \ + "scriptaddr=0x08000000\0" \ + "kernel_addr_r=0x01080000\0" \ + "pxefile_addr_r=0x01080000\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" BOOTENV + +#include <configs/meson64.h> + +#endif /* __CONFIG_H */

Add support for fastboot_set_reboot_flag() by storing the reboot flag in the common code to be used by the custom PSCI reboot handler.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- arch/arm/mach-meson/board-common.c | 33 ++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+)

diff --git a/arch/arm/mach-meson/board-common.c b/arch/arm/mach-meson/board-common.c index 18383f774e..9b3fb4707d 100644 --- a/arch/arm/mach-meson/board-common.c +++ b/arch/arm/mach-meson/board-common.c @@ -14,6 +14,11 @@ #include <asm/unaligned.h> #include <efi_loader.h>

+#if CONFIG_IS_ENABLED(FASTBOOT) +#include <asm/psci.h> +#include <fastboot.h> +#endif + DECLARE_GLOBAL_DATA_PTR;

__weak int board_init(void) @@ -142,7 +147,35 @@ int board_late_init(void) return meson_board_late_init(); }

+#if CONFIG_IS_ENABLED(FASTBOOT) +static unsigned int reboot_reason = REBOOT_REASON_NORMAL; + +int fastboot_set_reboot_flag() +{ + reboot_reason = REBOOT_REASON_BOOTLOADER; + + printf("Using reboot reason: 0x%x\n", reboot_reason); + + return 0; +} + +void reset_cpu(ulong addr) +{ + struct pt_regs regs; + + regs.regs[0] = ARM_PSCI_0_2_FN_SYSTEM_RESET; + regs.regs[1] = reboot_reason; + + printf("Rebooting with reason: 0x%lx\n", regs.regs[1]); + + smc_call(&regs); + + while (1) + ; +} +#else void reset_cpu(ulong addr) { psci_system_reset(); } +#endif