On Dec 18, 2015, at 12:47 AM, Chin Liang See clsee@altera.com wrote:

Hi Shangjiang

On Fri, 2015-12-18 at 16:43 +0800, shengjiangwu wrote: Updated pinmux group MIXED1IO[15-20] for QSPI. Updated QSPI clock.

Signed-off-by: shengjiangwu shengjiangwu@icloud.com Cc: Chin Liang See clsee@altera.com Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Dinh Nguyen dinh.linux@gmail.com Cc: Pavel Machek pavel@denx.de Cc: Marek Vasut marex@denx.de Cc: Stefan Roese sr@denx.de --- Changes for v2: - fixed wrong perpll for QSPI --- board/altera/cyclone5-socdk/qts/pll_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

I believe you forget to put back the pinmux change here.

Thanks Chin Liang

Understand, I need to generate the whole patch.

diff --git a/board/altera/cyclone5-socdk/qts/pll_config.h b/board/altera/cyclone5-socdk/qts/pll_config.h index 5b754ac..4abd2e0 100644 --- a/board/altera/cyclone5-socdk/qts/pll_config.h +++ b/board/altera/cyclone5-socdk/qts/pll_config.h @@ -32,7 +32,7 @@ #define CONFIG_HPS_PERPLLGRP_VCO_PSRC 0 #define CONFIG_HPS_PERPLLGRP_EMAC0CLK_CNT 3 #define CONFIG_HPS_PERPLLGRP_EMAC1CLK_CNT 3 -#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 1 +#define CONFIG_HPS_PERPLLGRP_PERQSPICLK_CNT 511 #define CONFIG_HPS_PERPLLGRP_PERNANDSDMMCCLK_CNT 4 #define CONFIG_HPS_PERPLLGRP_PERBASECLK_CNT 4 #define CONFIG_HPS_PERPLLGRP_S2FUSER1CLK_CNT 511