[U-Boot] OMAP i2c and twl4030

The issue of 3.4M speed has been taken care of. I have added the support and tested it on the Zooms, beagle and overo.
The issue of a better a better comment for the twl4030 read and write functions has been done.
The big new thing is that existing twl4030 code is moved. This is the omap3 board power and mmc initializing.
Tom

This problem is seen on Zoom1 and Zoom2 in the startup and when i2c probe is used
Before :
In: serial Out: serial Err: serial timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_pin: I2C_STAT=1000 I2C read: I/O error timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 Die ID #327c00020000000004013ddd05026013 Hit any key to stop autoboot: 0 OMAP3 Zoom1# i2c probe Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000 02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>
After :
In: serial Out: serial Err: serial Die ID #327c00020000000004013ddd05026013 Hit any key to stop autoboot: 0 OMAP3 Zoom1# i2c probe Valid chip addresses: 48 49 4A 4B
The addresses are for the twl4030.
The prescalar that converts the function clock to the sampling clock is hardcoded to 0. The reference manual recommends 7 if the function clock is 96MHz.
Instead of just changing the hardcoded values, the prescalar is calculated from the value I2C_IP_CLK.
The i2c #defines are in kHz. The speed passed into the i2c init routine is in Hz. To be consistent, change the defines to be in Hz.
The timing calculations are based on what is done in the linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as apposed to what is done in TRM.
The major variables in the timing caculations are specified as #defines that can be overriden as required.
The variables and their defaults are
I2C_IP_CLK SYSTEM_CLOCK_96 I2C_INTERNAL_SAMPLING_CLK 19200000 I2C_FASTSPEED_SCLL_TRIM 6 I2C_FASTSPEED_SCLH_TRIM 6 I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM I2C_HIGHSPEED_PHASE_TWO_SCLH I2C_FASTSPEED_SCLH_TRIM
This was runtime verified on Zoom1, Zoom2, Beagle and Overo. The 400kHz and 3.4M cases were verifed on test Zoom1, Zoom2, Beagle and Overo configurations.
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- drivers/i2c/omap24xx_i2c.c | 74 +++++++++++++++++++++++++++++++--- include/asm-arm/arch-omap24xx/i2c.h | 44 +++++++++++++++++++++ include/asm-arm/arch-omap3/i2c.h | 70 +++++++++++++++++++++++++++++--- 3 files changed, 174 insertions(+), 14 deletions(-)
diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index 6784603..1a4c8c9 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -31,7 +31,69 @@ static void flush_fifo(void);
void i2c_init (int speed, int slaveadd) { - u16 scl; + int psc, fsscll, fssclh; + int hsscll = 0, hssclh = 0; + u32 scll, sclh; + + /* Only handle standard, fast and high speeds */ + if ((speed != OMAP_I2C_STANDARD) && + (speed != OMAP_I2C_FAST_MODE) && + (speed != OMAP_I2C_HIGH_SPEED)) { + printf("Error : I2C unsupported speed %d\n", speed); + return; + } + + psc = I2C_IP_CLK / I2C_INTERNAL_SAMPLING_CLK; + psc -= 1; + if (psc < I2C_PSC_MIN) { + printf("Error : I2C unsupported prescalar %d\n", psc); + return; + } + + if (speed == OMAP_I2C_HIGH_SPEED) { + /* High speed */ + + /* For first phase of HS mode */ + fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / + (2 * OMAP_I2C_FAST_MODE); + + fsscll -= I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM; + fssclh -= I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM; + if (((fsscll < 0) || (fssclh < 0)) || + ((fsscll > 255) || (fssclh > 255))) { + printf("Error : I2C initializing first phase clock\n"); + return; + } + + /* For second phase of HS mode */ + hsscll = hssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); + + hsscll -= I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM; + hssclh -= I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM; + if (((fsscll < 0) || (fssclh < 0)) || + ((fsscll > 255) || (fssclh > 255))) { + printf("Error : I2C initializing second phase clock\n"); + return; + } + + scll = (unsigned int)hsscll << 8 | (unsigned int)fsscll; + sclh = (unsigned int)hssclh << 8 | (unsigned int)fssclh; + + } else { + /* Standard and fast speed */ + fsscll = fssclh = I2C_INTERNAL_SAMPLING_CLK / (2 * speed); + + fsscll -= I2C_FASTSPEED_SCLL_TRIM; + fssclh -= I2C_FASTSPEED_SCLH_TRIM; + if (((fsscll < 0) || (fssclh < 0)) || + ((fsscll > 255) || (fssclh > 255))) { + printf("Error : I2C initializing clock\n"); + return; + } + + scll = (unsigned int)fsscll; + sclh = (unsigned int)fssclh; + }
writew(0x2, I2C_SYSC); /* for ES2 after soft reset */ udelay(1000); @@ -42,12 +104,10 @@ void i2c_init (int speed, int slaveadd) udelay (50000); }
- /* 12MHz I2C module clock */ - writew (0, I2C_PSC); - speed = speed/1000; /* 100 or 400 */ - scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */ - writew (scl, I2C_SCLL); - writew (scl, I2C_SCLH); + writew(psc, I2C_PSC); + writew(scll, I2C_SCLL); + writew(sclh, I2C_SCLH); + /* own address */ writew (slaveadd, I2C_OA); writew (I2C_CON_EN, I2C_CON); diff --git a/include/asm-arm/arch-omap24xx/i2c.h b/include/asm-arm/arch-omap24xx/i2c.h index 7248950..44db7a2 100644 --- a/include/asm-arm/arch-omap24xx/i2c.h +++ b/include/asm-arm/arch-omap24xx/i2c.h @@ -104,4 +104,48 @@ #define I2C_SYSTEST_SDA_I (1 << 1) /* SDA line sense input value */ #define I2C_SYSTEST_SDA_O (1 << 0) /* SDA line drive output value */
+/* These values were copied from omap3, include/asm-arm/arch-omap3/i2c.h. */ +#define OMAP_I2C_STANDARD 100000 +#define OMAP_I2C_FAST_MODE 400000 +#define OMAP_I2C_HIGH_SPEED 3400000 + +#define SYSTEM_CLOCK_12 12000000 +#define SYSTEM_CLOCK_13 13000000 +#define SYSTEM_CLOCK_192 19200000 +#define SYSTEM_CLOCK_96 96000000 + +#ifndef I2C_IP_CLK +#define I2C_IP_CLK SYSTEM_CLOCK_96 +#endif + +#ifndef I2C_INTERNAL_SAMPLING_CLK +#define I2C_INTERNAL_SAMPLING_CLK 19200000 +#endif + +/* These are the trim values for standard and fast speed */ +#ifndef I2C_FASTSPEED_SCLL_TRIM +#define I2C_FASTSPEED_SCLL_TRIM 6 +#endif +#ifndef I2C_FASTSPEED_SCLH_TRIM +#define I2C_FASTSPEED_SCLH_TRIM 6 +#endif + +/* These are the trim values for high speed */ +#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM +#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM +#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM +#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM +#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM +#endif + +#define I2C_PSC_MAX 0x0f +#define I2C_PSC_MIN 0x00 + + #endif diff --git a/include/asm-arm/arch-omap3/i2c.h b/include/asm-arm/arch-omap3/i2c.h index 3937f35..8b339cc 100644 --- a/include/asm-arm/arch-omap3/i2c.h +++ b/include/asm-arm/arch-omap3/i2c.h @@ -112,16 +112,72 @@ #define I2C_SCLH_HSSCLH 8 #define I2C_SCLH_HSSCLH_M 0xFF
-#define OMAP_I2C_STANDARD 100 -#define OMAP_I2C_FAST_MODE 400 -#define OMAP_I2C_HIGH_SPEED 3400 +#define OMAP_I2C_STANDARD 100000 +#define OMAP_I2C_FAST_MODE 400000 +#define OMAP_I2C_HIGH_SPEED 3400000
-#define SYSTEM_CLOCK_12 12000 -#define SYSTEM_CLOCK_13 13000 -#define SYSTEM_CLOCK_192 19200 -#define SYSTEM_CLOCK_96 96000 +#define SYSTEM_CLOCK_12 12000000 +#define SYSTEM_CLOCK_13 13000000 +#define SYSTEM_CLOCK_192 19200000 +#define SYSTEM_CLOCK_96 96000000
+/* Use the reference value of 96MHz if not explicitly set by the board */ +#ifndef I2C_IP_CLK #define I2C_IP_CLK SYSTEM_CLOCK_96 +#endif + +/* + * The reference minimum clock for high speed is 19.2MHz. + * The linux 2.6.30 kernel uses this value. + * The reference minimum clock for fast mode is 9.6MHz + * The reference minimum clock for standard mode is 4MHz + * In TRM, the value of 12MHz is used. + */ +#ifndef I2C_INTERNAL_SAMPLING_CLK +#define I2C_INTERNAL_SAMPLING_CLK 19200000 +#endif + +/* + * The equation for the low and high time is + * tlow = scll + scll_trim = (sampling clock * tlow_duty) / speed + * thigh = sclh + sclh_trim = (sampling clock * (1 - tlow_duty)) / speed + * + * If the duty cycle is 50% + * + * tlow = scll + scll_trim = sampling clock / (2 * speed) + * thigh = sclh + sclh_trim = sampling clock / (2 * speed) + * + * In TRM + * scll_trim = 7 + * sclh_trim = 5 + * + * The linux 2.6.30 kernel uses + * scll_trim = 6 + * sclh_trim = 6 + * + * These are the trim values for standard and fast speed + */ +#ifndef I2C_FASTSPEED_SCLL_TRIM +#define I2C_FASTSPEED_SCLL_TRIM 6 +#endif +#ifndef I2C_FASTSPEED_SCLH_TRIM +#define I2C_FASTSPEED_SCLH_TRIM 6 +#endif + +/* These are the trim values for high speed */ +#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM +#define I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM +#define I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM +#define I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM +#endif +#ifndef I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM +#define I2C_HIGHSPEED_PHASE_TWO_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM +#endif + #define I2C_PSC_MAX 0x0f #define I2C_PSC_MIN 0x00

The TWL4030 supplies many peripherals for OMAP3 boards. These include power management, usb and, keyboard.
The product description is found here:
http://focus.ti.com/docs/prod/folders/print/tps65950.html
Product reference document, tps65950.pdf, is found here:
http://www.ti.com/lit/gpn/tps65950
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- include/twl4030.h | 245 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 245 insertions(+), 0 deletions(-) create mode 100644 include/twl4030.h
diff --git a/include/twl4030.h b/include/twl4030.h new file mode 100644 index 0000000..9a485da --- /dev/null +++ b/include/twl4030.h @@ -0,0 +1,245 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix Tom.Rix@windriver.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + */ + +#ifndef TWL4030_H +#define TWL4030_H + +#include <common.h> +#include <i2c.h> + +/* I2C chip addresses */ + +/* USB */ +#define TWL4030_CHIP_USB 0x48 +/* AUD */ +#define TWL4030_CHIP_AUDIO_VOICE 0x49 +#define TWL4030_CHIP_GPIO 0x49 +#define TWL4030_CHIP_INTBR 0x49 +#define TWL4030_CHIP_PIH 0x49 +#define TWL4030_CHIP_TEST 0x49 +/* AUX */ +#define TWL4030_CHIP_KEYPAD 0x4a +#define TWL4030_CHIP_MADC 0x4a +#define TWL4030_CHIP_INTERRUPTS 0x4a +#define TWL4030_CHIP_LED 0x4a +#define TWL4030_CHIP_MAIN_CHARGE 0x4a +#define TWL4030_CHIP_PRECHARGE 0x4a +#define TWL4030_CHIP_PWM0 0x4a +#define TWL4030_CHIP_PWM1 0x4a +#define TWL4030_CHIP_PWMA 0x4a +#define TWL4030_CHIP_PWMB 0x4a +/* POWER */ +#define TWL4030_CHIP_BACKUP 0x4b +#define TWL4030_CHIP_INT 0x4b +#define TWL4030_CHIP_PM_MASTER 0x4b +#define TWL4030_CHIP_PM_RECEIVER 0x4b +#define TWL4030_CHIP_RTC 0x4b +#define TWL4030_CHIP_SECURED_REG 0x4b + +/* Register base addresses */ + +/* USB */ +#define TWL4030_BASEADD_USB 0x0000 +/* AUD */ +#define TWL4030_BASEADD_AUDIO_VOICE 0x0000 +#define TWL4030_BASEADD_GPIO 0x0098 +#define TWL4030_BASEADD_INTBR 0x0085 +#define TWL4030_BASEADD_PIH 0x0080 +#define TWL4030_BASEADD_TEST 0x004C +/* AUX */ +#define TWL4030_BASEADD_INTERRUPTS 0x00B9 +#define TWL4030_BASEADD_LED 0x00EE +#define TWL4030_BASEADD_MADC 0x0000 +#define TWL4030_BASEADD_MAIN_CHARGE 0x0074 +#define TWL4030_BASEADD_PRECHARGE 0x00AA +#define TWL4030_BASEADD_PWM0 0x00F8 +#define TWL4030_BASEADD_PWM1 0x00FB +#define TWL4030_BASEADD_PWMA 0x00EF +#define TWL4030_BASEADD_PWMB 0x00F1 +#define TWL4030_BASEADD_KEYPAD 0x00D2 +/* POWER */ +#define TWL4030_BASEADD_BACKUP 0x0014 +#define TWL4030_BASEADD_INT 0x002E +#define TWL4030_BASEADD_PM_MASTER 0x0036 +#define TWL4030_BASEADD_PM_RECIEVER 0x005B +#define TWL4030_BASEADD_RTC 0x001C +#define TWL4030_BASEADD_SECURED_REG 0x0000 + +/* + * Power Management Master + */ +#define TWL4030_PM_MASTER_CFG_P1_TRANSITION 0x36 +#define TWL4030_PM_MASTER_CFG_P2_TRANSITION 0x37 +#define TWL4030_PM_MASTER_CFG_P3_TRANSITION 0x38 +#define TWL4030_PM_MASTER_CFG_P123_TRANSITION 0x39 +#define TWL4030_PM_MASTER_STS_BOOT 0x3A +#define TWL4030_PM_MASTER_CFG_BOOT 0x3B +#define TWL4030_PM_MASTER_SHUNDAN 0x3C +#define TWL4030_PM_MASTER_BOOT_BCI 0x3D +#define TWL4030_PM_MASTER_CFG_PWRANA1 0x3E +#define TWL4030_PM_MASTER_CFG_PWRANA2 0x3F +#define TWL4030_PM_MASTER_BGAP_TRIM 0x40 +#define TWL4030_PM_MASTER_BACKUP_MISC_STS 0x41 +#define TWL4030_PM_MASTER_BACKUP_MISC_CFG 0x42 +#define TWL4030_PM_MASTER_BACKUP_MISC_TST 0x43 +#define TWL4030_PM_MASTER_PROTECT_KEY 0x44 +#define TWL4030_PM_MASTER_STS_HW_CONDITIONS 0x45 +#define TWL4030_PM_MASTER_P1_SW_EVENTS 0x46 +#define TWL4030_PM_MASTER_P2_SW_EVENTS 0x47 +#define TWL4030_PM_MASTER_P3_SW_EVENTS 0x48 +#define TWL4030_PM_MASTER_STS_P123_STATE 0x49 +#define TWL4030_PM_MASTER_PB_CFG 0x4A +#define TWL4030_PM_MASTER_PB_WORD_MSB 0x4B +#define TWL4030_PM_MASTER_PB_WORD_LSB 0x4C +#define TWL4030_PM_MASTER_SEQ_ADD_W2P 0x52 +#define TWL4030_PM_MASTER_SEQ_ADD_P2A 0x53 +#define TWL4030_PM_MASTER_SEQ_ADD_A2W 0x54 +#define TWL4030_PM_MASTER_SEQ_ADD_A2S 0x55 +#define TWL4030_PM_MASTER_SEQ_ADD_S2A12 0x56 +#define TWL4030_PM_MASTER_SEQ_ADD_S2A3 0x57 +#define TWL4030_PM_MASTER_SEQ_ADD_WARM 0x58 +#define TWL4030_PM_MASTER_MEMORY_ADDRESS 0x59 +#define TWL4030_PM_MASTER_MEMORY_DATA 0x5A +#define TWL4030_PM_MASTER_SC_CONFIG 0x5B +#define TWL4030_PM_MASTER_SC_DETECT1 0x5C +#define TWL4030_PM_MASTER_SC_DETECT2 0x5D +#define TWL4030_PM_MASTER_WATCHDOG_CFG 0x5E +#define TWL4030_PM_MASTER_IT_CHECK_CFG 0x5F +#define TWL4030_PM_MASTER_VIBRATOR_CFG 0x60 +#define TWL4030_PM_MASTER_DCDC_GLOBAL_CFG 0x61 +#define TWL4030_PM_MASTER_VDD1_TRIM1 0x62 +#define TWL4030_PM_MASTER_VDD1_TRIM2 0x63 +#define TWL4030_PM_MASTER_VDD2_TRIM1 0x64 +#define TWL4030_PM_MASTER_VDD2_TRIM2 0x65 +#define TWL4030_PM_MASTER_VIO_TRIM1 0x66 +#define TWL4030_PM_MASTER_VIO_TRIM2 0x67 +#define TWL4030_PM_MASTER_MISC_CFG 0x68 +#define TWL4030_PM_MASTER_LS_TST_A 0x69 +#define TWL4030_PM_MASTER_LS_TST_B 0x6A +#define TWL4030_PM_MASTER_LS_TST_C 0x6B +#define TWL4030_PM_MASTER_LS_TST_D 0x6C +#define TWL4030_PM_MASTER_BB_CFG 0x6D +#define TWL4030_PM_MASTER_MISC_TST 0x6E +#define TWL4030_PM_MASTER_TRIM1 0x6F +/* P[1-3]_SW_EVENTS */ +#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON (1 << 6) +#define TWL4030_PM_MASTER_SW_EVENTS_STOPON_SYSEN (1 << 5) +#define TWL4030_PM_MASTER_SW_EVENTS_ENABLE_WARMRESET (1 << 4) +#define TWL4030_PM_MASTER_SW_EVENTS_LVL_WAKEUP (1 << 3) +#define TWL4030_PM_MASTER_SW_EVENTS_DEVACT (1 << 2) +#define TWL4030_PM_MASTER_SW_EVENTS_DEVSLP (1 << 1) +#define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0) + +/* Power Managment Receiver */ +#define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC +#define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD +#define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE +#define TWL4030_PM_RECEIVER_VUSB1V8_DEV_GRP 0xCF +#define TWL4030_PM_RECEIVER_VUSB1V8_TYPE 0xD0 +#define TWL4030_PM_RECEIVER_VUSB1V8_REMAP 0xD1 +#define TWL4030_PM_RECEIVER_VUSB3V1_DEV_GRP 0xD2 +#define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 +#define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 +#define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 +#define TWL4030_PM_RECEIVER_VUSBCP_DEV_TYPE 0xD6 +#define TWL4030_PM_RECEIVER_VUSBCP_DEV_REMAP 0xD7 +#define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 +#define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 + +/* Keypad */ +#define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 +#define TWL4030_KEYPAD_KEY_DEB_REG 0xD3 +#define TWL4030_KEYPAD_LONG_KEY_REG1 0xD4 +#define TWL4030_KEYPAD_LK_PTV_REG 0xD5 +#define TWL4030_KEYPAD_TIME_OUT_REG1 0xD6 +#define TWL4030_KEYPAD_TIME_OUT_REG2 0xD7 +#define TWL4030_KEYPAD_KBC_REG 0xD8 +#define TWL4030_KEYPAD_KBR_REG 0xD9 +#define TWL4030_KEYPAD_KEYP_SMS 0xDA +#define TWL4030_KEYPAD_FULL_CODE_7_0 0xDB +#define TWL4030_KEYPAD_FULL_CODE_15_8 0xDC +#define TWL4030_KEYPAD_FULL_CODE_23_16 0xDD +#define TWL4030_KEYPAD_FULL_CODE_31_24 0xDE +#define TWL4030_KEYPAD_FULL_CODE_39_32 0xDF +#define TWL4030_KEYPAD_FULL_CODE_47_40 0xE0 +#define TWL4030_KEYPAD_FULL_CODE_55_48 0xE1 +#define TWL4030_KEYPAD_FULL_CODE_63_56 0xE2 +#define TWL4030_KEYPAD_KEYP_ISR1 0xE3 +#define TWL4030_KEYPAD_KEYP_IMR1 0xE4 +#define TWL4030_KEYPAD_KEYP_ISR2 0xE5 +#define TWL4030_KEYPAD_KEYP_IMR2 0xE6 +#define TWL4030_KEYPAD_KEYP_SIR 0xE7 +#define TWL4030_KEYPAD_KEYP_EDR 0xE8 +#define TWL4030_KEYPAD_KEYP_SIH_CTRL 0xE9 + +#define TWL4030_KEYPAD_CTRL_KBD_ON (1 << 6) +#define TWL4030_KEYPAD_CTRL_RP_EN (1 << 5) +#define TWL4030_KEYPAD_CTRL_TOLE_EN (1 << 4) +#define TWL4030_KEYPAD_CTRL_TOE_EN (1 << 3) +#define TWL4030_KEYPAD_CTRL_LK_EN (1 << 2) +#define TWL4030_KEYPAD_CTRL_SOFTMODEN (1 << 1) +#define TWL4030_KEYPAD_CTRL_SOFT_NRST (1 << 0) + +/* USB */ +#define TWL4030_USB_FUNC_CTRL (0x04) +#define TWL4030_USB_OPMODE_MASK (3 << 3) +#define TWL4030_USB_XCVRSELECT_MASK (3 << 0) +#define TWL4030_USB_IFC_CTRL (0x07) +#define TWL4030_USB_CARKITMODE (1 << 2) +#define TWL4030_USB_POWER_CTRL (0xAC) +#define TWL4030_USB_OTG_ENAB (1 << 5) +#define TWL4030_USB_PHY_PWR_CTRL (0xFD) +#define TWL4030_USB_PHYPWD (1 << 0) +#define TWL4030_USB_PHY_CLK_CTRL (0xFE) +#define TWL4030_USB_CLOCKGATING_EN (1 << 2) +#define TWL4030_USB_CLK32K_EN (1 << 1) +#define TWL4030_USB_REQ_PHY_DPLL_CLK (1 << 0) +#define TWL4030_USB_PHY_CLK_CTRL_STS (0xFF) +#define TWL4030_USB_PHY_DPLL_CLK (1 << 0) + +/* + * Convience functions to read and write from TWL4030 + * + * chip_no is the i2c address, it must be one of the chip addresses + * defined at the top of this file with the prefix TWL4030_CHIP_ + * examples are TWL4030_CHIP_PM_RECEIVER and TWL4030_CHIP_KEYPAD + * + * val is the data either written to or read from the twl4030 + * + * reg is the register to act on, it must be one of the defines + * above and with the format TWL4030_<chip suffix>_<register name> + * examples are TWL4030_PM_RECEIVER_VMMC1_DEV_GRP and + * TWL4030_LED_LEDEN. + */ +static inline int twl4030_i2c_write_u8(u8 chip_no, u8 val, u8 reg) +{ + return i2c_write(chip_no, reg, 1, &val, 1); +} + +static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) +{ + return i2c_read(chip_no, reg, 1, val, 1); +} + +#endif /* TWL4030_H */

The Zoom2 power reset button is on the top right side of the main board. Press and hold for about to 8 seconds to completely reset the board.
Some of the beta boards have a hardware problem that prevents using this feature. If is difficult to further characterize the boards that fail. So disable resetting for all beta boards.
The Zoom1 reset button is the red circle on the top right, front of the board. Press and hold the button for 8 seconds to completely reset the board.
After analyzing beagle, it was determined that other boards that use the twl4030 for power managment can also make use this function.
The resetting is done by the power management part of the twl4030. Since there is no existing drivers/power, add one.
The compilation of power/twl4030.h is controlled by the config variable CONFIG_TWL4030_POWER
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- Makefile | 1 + board/omap3/zoom1/zoom1.c | 9 +++++++ board/omap3/zoom2/zoom2.c | 14 ++++++++++++ drivers/power/Makefile | 47 +++++++++++++++++++++++++++++++++++++++++ drivers/power/twl4030.c | 47 +++++++++++++++++++++++++++++++++++++++++ include/configs/omap3_zoom1.h | 5 ++++ include/configs/omap3_zoom2.h | 5 ++++ include/twl4030.h | 3 ++ 8 files changed, 131 insertions(+), 0 deletions(-) create mode 100644 drivers/power/Makefile create mode 100644 drivers/power/twl4030.c
diff --git a/Makefile b/Makefile index 81a5cd0..3851c58 100644 --- a/Makefile +++ b/Makefile @@ -247,6 +247,7 @@ LIBS += drivers/net/phy/libphy.a LIBS += drivers/net/sk98lin/libsk98lin.a LIBS += drivers/pci/libpci.a LIBS += drivers/pcmcia/libpcmcia.a +LIBS += drivers/power/libpower.a LIBS += drivers/spi/libspi.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a diff --git a/board/omap3/zoom1/zoom1.c b/board/omap3/zoom1/zoom1.c index db4d087..94437d5 100644 --- a/board/omap3/zoom1/zoom1.c +++ b/board/omap3/zoom1/zoom1.c @@ -31,6 +31,7 @@ * MA 02111-1307 USA */ #include <common.h> +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> @@ -62,6 +63,14 @@ int misc_init_r(void) { power_init_r(); dieid_num_r(); + + /* + * Board Reset + * The board is reset by holding the red button on the + * top right front face for eight seconds. + */ + twl4030_power_reset_init(); + return 0; }
diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c index 08fdafb..d0fd55b 100644 --- a/board/omap3/zoom2/zoom2.c +++ b/board/omap3/zoom2/zoom2.c @@ -32,6 +32,7 @@ #ifdef CONFIG_STATUS_LED #include <status_led.h> #endif +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/gpio.h> #include <asm/arch/mem.h> @@ -156,6 +157,19 @@ int misc_init_r(void) zoom2_identify(); power_init_r(); dieid_num_r(); + + /* + * Board Reset + * The board is reset by holding the the large button + * on the top right side of the main board for + * eight seconds. + * + * There are reported problems of some beta boards + * continously resetting. For those boards, disable resetting. + */ + if (ZOOM2_REVISION_PRODUCTION <= zoom2_get_revision()) + twl4030_power_reset_init(); + return 0; }
diff --git a/drivers/power/Makefile b/drivers/power/Makefile new file mode 100644 index 0000000..05fdc2f --- /dev/null +++ b/drivers/power/Makefile @@ -0,0 +1,47 @@ +# +# Copyright (c) 2009 Wind River Systems, Inc. +# Tom Rix Tom.Rix@windriver.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libpower.a + +COBJS-$(CONFIG_TWL4030_POWER) += twl4030.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################## diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c new file mode 100644 index 0000000..2f62228 --- /dev/null +++ b/drivers/power/twl4030.c @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix Tom.Rix@windriver.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git + * + * Copyright (C) 2007-2009 Texas Instruments, Inc. + */ + +#include <twl4030.h> + +/* + * Power Reset + */ +void twl4030_power_reset_init(void) +{ + u8 val = 0; + if (twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, &val, + TWL4030_PM_MASTER_P1_SW_EVENTS)) { + printf("Error:TWL4030: failed to read the power register\n"); + printf("Could not initialize hardware reset\n"); + } else { + val |= TWL4030_PM_MASTER_SW_EVENTS_STOPON_PWRON; + if (twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, val, + TWL4030_PM_MASTER_P1_SW_EVENTS)) { + printf("Error:TWL4030: failed to write the power register\n"); + printf("Could not initialize hardware reset\n"); + } + } +} + + diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 9e000ed..8bd59df 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -126,6 +126,11 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* * Board NAND Info. */ #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index c2ad5bf..268b159 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -147,6 +147,11 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* * Board NAND Info. */ #define CONFIG_NAND_OMAP_GPMC diff --git a/include/twl4030.h b/include/twl4030.h index 9a485da..dc2ba9f 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -242,4 +242,7 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) return i2c_read(chip_no, reg, 1, val, 1); }
+/* For hardware resetting */ +void twl4030_power_reset_init(void); + #endif /* TWL4030_H */

Because twl4030 now has its own device files, move exiting omap3 power_init_r to a new location.
power_init_r is the only function in board/omap3/common. It initializes the twl4030 power for the board and enables the led.
The power part of the the function is moved to twl4030_power_init in drivers/power/twl4030.c The power compilation is conditional on the existing config variable CONFIG_TWL4030_POWER.
The led part is moved to twl4030_led_init in the new file drivers/misc/twl4030_led.c The led compilation is conditional on the new config variable CONFIG_TWL4030_LED
The directory board/omap3/common was removed because power_init_r was the only function in it.
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- board/omap3/beagle/beagle.c | 4 +- board/omap3/common/Makefile | 54 -------------- board/omap3/common/power.c | 74 ------------------- board/omap3/overo/overo.c | 4 +- board/omap3/pandora/pandora.c | 4 +- board/omap3/zoom1/zoom1.c | 3 +- board/omap3/zoom2/zoom2.c | 3 +- drivers/misc/Makefile | 1 + drivers/misc/twl4030_led.c | 52 +++++++++++++ drivers/power/twl4030.c | 55 ++++++++++++++- include/configs/omap3_beagle.h | 6 ++ include/configs/omap3_overo.h | 6 ++ include/configs/omap3_pandora.h | 6 ++ include/configs/omap3_zoom1.h | 1 + include/configs/omap3_zoom2.h | 1 + include/twl4030.h | 154 ++++++++++++++++++++++++++++++++++++++- 16 files changed, 292 insertions(+), 136 deletions(-) delete mode 100644 board/omap3/common/Makefile delete mode 100644 board/omap3/common/power.c create mode 100644 drivers/misc/twl4030_led.c
diff --git a/board/omap3/beagle/beagle.c b/board/omap3/beagle/beagle.c index d268e18..5423650 100644 --- a/board/omap3/beagle/beagle.c +++ b/board/omap3/beagle/beagle.c @@ -30,6 +30,7 @@ * MA 02111-1307 USA */ #include <common.h> +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> @@ -105,7 +106,8 @@ int misc_init_r(void) gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
- power_init_r(); + twl4030_power_init(); + twl4030_led_init();
/* Configure GPIOs to output */ writel(~(GPIO23 | GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe); diff --git a/board/omap3/common/Makefile b/board/omap3/common/Makefile deleted file mode 100644 index b8a0b14..0000000 --- a/board/omap3/common/Makefile +++ /dev/null @@ -1,54 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -ifneq ($(OBJTREE),$(SRCTREE)) -$(shell mkdir -p $(obj)board/$(VENDOR)/common) -endif - -LIB = $(obj)lib$(VENDOR).a - -COBJS-$(CONFIG_OMAP3_BEAGLE) += power.o -COBJS-$(CONFIG_OMAP3_OVERO) += power.o -COBJS-$(CONFIG_OMAP3_PANDORA) += power.o -COBJS-$(CONFIG_OMAP3_ZOOM1) += power.o -COBJS-$(CONFIG_OMAP3_ZOOM2) += power.o - -COBJS := $(COBJS-y) -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) - -all: $(LIB) - -$(LIB): $(obj).depend $(OBJS) - $(AR) $(ARFLAGS) $@ $(OBJS) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/omap3/common/power.c b/board/omap3/common/power.c deleted file mode 100644 index 4908e5b..0000000 --- a/board/omap3/common/power.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * (C) Copyright 2004-2008 - * Texas Instruments, <www.ti.com> - * - * Author : - * Sunil Kumar sunilsaini05@gmail.com - * Shashi Ranjan shashiranjanmca05@gmail.com - * - * Derived from Beagle Board and 3430 SDP code by - * Richard Woodruff r-woodruff2@ti.com - * Syed Mohammed Khasim khasim@ti.com - * - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#include <common.h> -#include <asm/arch/sys_proto.h> -#include <i2c.h> - -/****************************************************************************** - * Routine: power_init_r - * Description: Configure power supply - *****************************************************************************/ -void power_init_r(void) -{ - unsigned char byte; - -#ifdef CONFIG_DRIVER_OMAP34XX_I2C - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); -#endif - - /* - * Configure OMAP3 supply voltages in power management - * companion chip. - */ - - /* set VAUX3 to 2.8V */ - byte = DEV_GRP_P1; - i2c_write(PWRMGT_ADDR_ID4, VAUX3_DEV_GRP, 1, &byte, 1); - byte = VAUX3_VSEL_28; - i2c_write(PWRMGT_ADDR_ID4, VAUX3_DEDICATED, 1, &byte, 1); - - /* set VPLL2 to 1.8V */ - byte = DEV_GRP_ALL; - i2c_write(PWRMGT_ADDR_ID4, VPLL2_DEV_GRP, 1, &byte, 1); - byte = VPLL2_VSEL_18; - i2c_write(PWRMGT_ADDR_ID4, VPLL2_DEDICATED, 1, &byte, 1); - - /* set VDAC to 1.8V */ - byte = DEV_GRP_P1; - i2c_write(PWRMGT_ADDR_ID4, VDAC_DEV_GRP, 1, &byte, 1); - byte = VDAC_VSEL_18; - i2c_write(PWRMGT_ADDR_ID4, VDAC_DEDICATED, 1, &byte, 1); - - /* enable LED */ - byte = LEDBPWM | LEDAPWM | LEDBON | LEDAON; - i2c_write(PWRMGT_ADDR_ID3, LEDEN, 1, &byte, 1); -} diff --git a/board/omap3/overo/overo.c b/board/omap3/overo/overo.c index 809b77b..dd6d286 100644 --- a/board/omap3/overo/overo.c +++ b/board/omap3/overo/overo.c @@ -29,6 +29,7 @@ * MA 02111-1307 USA */ #include <common.h> +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> @@ -58,7 +59,8 @@ int board_init(void) */ int misc_init_r(void) { - power_init_r(); + twl4030_power_init(); + twl4030_led_init();
dieid_num_r();
diff --git a/board/omap3/pandora/pandora.c b/board/omap3/pandora/pandora.c index c2f98ea..1538efb 100644 --- a/board/omap3/pandora/pandora.c +++ b/board/omap3/pandora/pandora.c @@ -30,6 +30,7 @@ * MA 02111-1307 USA */ #include <common.h> +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/mux.h> #include <asm/arch/sys_proto.h> @@ -64,7 +65,8 @@ int misc_init_r(void) gpio_t *gpio5_base = (gpio_t *)OMAP34XX_GPIO5_BASE; gpio_t *gpio6_base = (gpio_t *)OMAP34XX_GPIO6_BASE;
- power_init_r(); + twl4030_power_init(); + twl4030_led_init();
/* Configure GPIOs to output */ writel(~(GPIO14 | GPIO15 | GPIO16 | GPIO23), &gpio1_base->oe); diff --git a/board/omap3/zoom1/zoom1.c b/board/omap3/zoom1/zoom1.c index 94437d5..f4d3754 100644 --- a/board/omap3/zoom1/zoom1.c +++ b/board/omap3/zoom1/zoom1.c @@ -61,7 +61,8 @@ int board_init(void) */ int misc_init_r(void) { - power_init_r(); + twl4030_power_init(); + twl4030_led_init(); dieid_num_r();
/* diff --git a/board/omap3/zoom2/zoom2.c b/board/omap3/zoom2/zoom2.c index d0fd55b..94a985d 100644 --- a/board/omap3/zoom2/zoom2.c +++ b/board/omap3/zoom2/zoom2.c @@ -155,7 +155,8 @@ int board_init (void) int misc_init_r(void) { zoom2_identify(); - power_init_r(); + twl4030_power_init(); + twl4030_led_init(); dieid_num_r();
/* diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index ea2bf87..f6df60f 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -30,6 +30,7 @@ COBJS-$(CONFIG_DS4510) += ds4510.o COBJS-$(CONFIG_FSL_LAW) += fsl_law.o COBJS-$(CONFIG_NS87308) += ns87308.o COBJS-$(CONFIG_STATUS_LED) += status_led.o +COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/misc/twl4030_led.c b/drivers/misc/twl4030_led.c new file mode 100644 index 0000000..06ae437 --- /dev/null +++ b/drivers/misc/twl4030_led.c @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2009 Wind River Systems, Inc. + * Tom Rix Tom.Rix@windriver.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * twl4030_led_init is from cpu/omap3/common.c, power_init_r + * + * (C) Copyright 2004-2008 + * Texas Instruments, <www.ti.com> + * + * Author : + * Sunil Kumar sunilsaini05@gmail.com + * Shashi Ranjan shashiranjanmca05@gmail.com + * + * Derived from Beagle Board and 3430 SDP code by + * Richard Woodruff r-woodruff2@ti.com + * Syed Mohammed Khasim khasim@ti.com + * + */ + +#include <twl4030.h> + +#define LEDAON (0x1 << 0) +#define LEDBON (0x1 << 1) +#define LEDAPWM (0x1 << 4) +#define LEDBPWM (0x1 << 5) + +void twl4030_led_init(void) +{ + unsigned char byte; + + /* enable LED */ + byte = LEDBPWM | LEDAPWM | LEDBON | LEDAON; + + twl4030_i2c_write_u8(TWL4030_CHIP_LED, byte, + TWL4030_LED_LEDEN); + +} diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index 2f62228..1454c2c 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -17,9 +17,24 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA * - * Derived from code on omapzoom, git://git.omapzoom.com/repo/u-boot.git + * twl4030_power_reset_init is derived from code on omapzoom, + * git://git.omapzoom.com/repo/u-boot.git * * Copyright (C) 2007-2009 Texas Instruments, Inc. + * + * twl4030_power_init is from cpu/omap3/common.c, power_init_r + * + * (C) Copyright 2004-2008 + * Texas Instruments, <www.ti.com> + * + * Author : + * Sunil Kumar sunilsaini05@gmail.com + * Shashi Ranjan shashiranjanmca05@gmail.com + * + * Derived from Beagle Board and 3430 SDP code by + * Richard Woodruff r-woodruff2@ti.com + * Syed Mohammed Khasim khasim@ti.com + * */
#include <twl4030.h> @@ -45,3 +60,41 @@ void twl4030_power_reset_init(void) }
+/* + * Power Init + */ +#define DEV_GRP_P1 0x20 +#define VAUX3_VSEL_28 0x03 +#define DEV_GRP_ALL 0xE0 +#define VPLL2_VSEL_18 0x05 +#define VDAC_VSEL_18 0x03 + +void twl4030_power_init(void) +{ + unsigned char byte; + + /* set VAUX3 to 2.8V */ + byte = DEV_GRP_P1; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VAUX3_DEV_GRP); + byte = VAUX3_VSEL_28; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VAUX3_DEDICATED); + + /* set VPLL2 to 1.8V */ + byte = DEV_GRP_ALL; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VPLL2_DEV_GRP); + byte = VPLL2_VSEL_18; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VPLL2_DEDICATED); + + /* set VDAC to 1.8V */ + byte = DEV_GRP_P1; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VDAC_DEV_GRP); + byte = VDAC_VSEL_18; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VDAC_DEDICATED); +} + diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index a3d9cf6..02272dc 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -129,6 +129,12 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1 + +/* * Board NAND Info. */ #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 8902312..9c99a68 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -116,6 +116,12 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1 + +/* * Board NAND Info. */ #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index dbd4dcc..798ee10 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -119,6 +119,12 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1 + +/* * Board NAND Info. */ #define CONFIG_NAND_OMAP_GPMC diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 8bd59df..73bca8b 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -129,6 +129,7 @@ * TWL4030 */ #define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1
/* * Board NAND Info. diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index 268b159..1288eda 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -150,6 +150,7 @@ * TWL4030 */ #define CONFIG_TWL4030_POWER 1 +#define CONFIG_TWL4030_LED 1
/* * Board NAND Info. diff --git a/include/twl4030.h b/include/twl4030.h index dc2ba9f..d6b61b8 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -152,6 +152,119 @@ #define TWL4030_PM_MASTER_SW_EVENTS_DEVOFF (1 << 0)
/* Power Managment Receiver */ +#define TWL4030_PM_RECEIVER_SC_CONFIG 0x5B +#define TWL4030_PM_RECEIVER_SC_DETECT1 0x5C +#define TWL4030_PM_RECEIVER_SC_DETECT2 0x5D +#define TWL4030_PM_RECEIVER_WATCHDOG_CFG 0x5E +#define TWL4030_PM_RECEIVER_IT_CHECK_CFG 0x5F +#define TWL4030_PM_RECEIVER_VIBRATOR_CFG 0x5F +#define TWL4030_PM_RECEIVER_DC_TO_DC_CFG 0x61 +#define TWL4030_PM_RECEIVER_VDD1_TRIM1 0x62 +#define TWL4030_PM_RECEIVER_VDD1_TRIM2 0x63 +#define TWL4030_PM_RECEIVER_VDD2_TRIM1 0x64 +#define TWL4030_PM_RECEIVER_VDD2_TRIM2 0x65 +#define TWL4030_PM_RECEIVER_VIO_TRIM1 0x66 +#define TWL4030_PM_RECEIVER_VIO_TRIM2 0x67 +#define TWL4030_PM_RECEIVER_MISC_CFG 0x68 +#define TWL4030_PM_RECEIVER_LS_TST_A 0x69 +#define TWL4030_PM_RECEIVER_LS_TST_B 0x6A +#define TWL4030_PM_RECEIVER_LS_TST_C 0x6B +#define TWL4030_PM_RECEIVER_LS_TST_D 0x6C +#define TWL4030_PM_RECEIVER_BB_CFG 0x6D +#define TWL4030_PM_RECEIVER_MISC_TST 0x6E +#define TWL4030_PM_RECEIVER_TRIM1 0x6F +#define TWL4030_PM_RECEIVER_TRIM2 0x70 +#define TWL4030_PM_RECEIVER_DC_DC_TIMEOUT 0x71 +#define TWL4030_PM_RECEIVER_VAUX1_DEV_GRP 0x72 +#define TWL4030_PM_RECEIVER_VAUX1_TYPE 0x73 +#define TWL4030_PM_RECEIVER_VAUX1_REMAP 0x74 +#define TWL4030_PM_RECEIVER_VAUX1_DEDICATED 0x75 +#define TWL4030_PM_RECEIVER_VAUX2_DEV_GRP 0x76 +#define TWL4030_PM_RECEIVER_VAUX2_TYPE 0x77 +#define TWL4030_PM_RECEIVER_VAUX2_REMAP 0x78 +#define TWL4030_PM_RECEIVER_VAUX2_DEDICATED 0x79 +#define TWL4030_PM_RECEIVER_VAUX3_DEV_GRP 0x7A +#define TWL4030_PM_RECEIVER_VAUX3_TYPE 0x7B +#define TWL4030_PM_RECEIVER_VAUX3_REMAP 0x7C +#define TWL4030_PM_RECEIVER_VAUX3_DEDICATED 0x7D +#define TWL4030_PM_RECEIVER_VAUX4_DEV_GRP 0x7E +#define TWL4030_PM_RECEIVER_VAUX4_TYPE 0x7F +#define TWL4030_PM_RECEIVER_VAUX4_REMAP 0x80 +#define TWL4030_PM_RECEIVER_VAUX4_DEDICATED 0x81 +#define TWL4030_PM_RECEIVER_VMMC1_DEV_GRP 0x82 +#define TWL4030_PM_RECEIVER_VMMC1_TYPE 0x83 +#define TWL4030_PM_RECEIVER_VMMC1_REMAP 0x84 +#define TWL4030_PM_RECEIVER_VMMC1_DEDICATED 0x85 +#define TWL4030_PM_RECEIVER_VMMC2_DEV_GRP 0x86 +#define TWL4030_PM_RECEIVER_VMMC2_TYPE 0x87 +#define TWL4030_PM_RECEIVER_VMMC2_REMAP 0x88 +#define TWL4030_PM_RECEIVER_VMMC2_DEDICATED 0x89 +#define TWL4030_PM_RECEIVER_VPLL1_DEV_GRP 0x8A +#define TWL4030_PM_RECEIVER_VPLL1_TYPE 0x8B +#define TWL4030_PM_RECEIVER_VPLL1_REMAP 0x8C +#define TWL4030_PM_RECEIVER_VPLL1_DEDICATED 0x8D +#define TWL4030_PM_RECEIVER_VPLL2_DEV_GRP 0x8E +#define TWL4030_PM_RECEIVER_VPLL2_TYPE 0x8F +#define TWL4030_PM_RECEIVER_VPLL2_REMAP 0x90 +#define TWL4030_PM_RECEIVER_VPLL2_DEDICATED 0x91 +#define TWL4030_PM_RECEIVER_VSIM_DEV_GRP 0x92 +#define TWL4030_PM_RECEIVER_VSIM_TYPE 0x93 +#define TWL4030_PM_RECEIVER_VSIM_REMAP 0x94 +#define TWL4030_PM_RECEIVER_VSIM_DEDICATED 0x95 +#define TWL4030_PM_RECEIVER_VDAC_DEV_GRP 0x96 +#define TWL4030_PM_RECEIVER_VDAC_TYPE 0x97 +#define TWL4030_PM_RECEIVER_VDAC_REMAP 0x98 +#define TWL4030_PM_RECEIVER_VDAC_DEDICATED 0x99 +#define TWL4030_PM_RECEIVER_VINTANA1_DEV_GRP 0x9A +#define TWL4030_PM_RECEIVER_VINTANA1_TYP 0x9B +#define TWL4030_PM_RECEIVER_VINTANA1_REMAP 0x9C +#define TWL4030_PM_RECEIVER_VINTANA1_DEDICATED 0x9D +#define TWL4030_PM_RECEIVER_VINTANA2_DEV_GRP 0x9E +#define TWL4030_PM_RECEIVER_VINTANA2_TYPE 0x9F +#define TWL4030_PM_RECEIVER_VINTANA2_REMAP 0xA0 +#define TWL4030_PM_RECEIVER_VINTANA2_DEDICATED 0xA1 +#define TWL4030_PM_RECEIVER_VINTDIG_DEV_GRP 0xA2 +#define TWL4030_PM_RECEIVER_VINTDIG_TYPE 0xA3 +#define TWL4030_PM_RECEIVER_VINTDIG_REMAP 0xA4 +#define TWL4030_PM_RECEIVER_VINTDIG_DEDICATED 0xA5 +#define TWL4030_PM_RECEIVER_VIO_DEV_GRP 0xA6 +#define TWL4030_PM_RECEIVER_VIO_TYPE 0xA7 +#define TWL4030_PM_RECEIVER_VIO_REMAP 0xA8 +#define TWL4030_PM_RECEIVER_VIO_CFG 0xA9 +#define TWL4030_PM_RECEIVER_VIO_MISC_CFG 0xAA +#define TWL4030_PM_RECEIVER_VIO_TEST1 0xAB +#define TWL4030_PM_RECEIVER_VIO_TEST2 0xAC +#define TWL4030_PM_RECEIVER_VIO_OSC 0xAD +#define TWL4030_PM_RECEIVER_VIO_RESERVED 0xAE +#define TWL4030_PM_RECEIVER_VIO_VSEL 0xAF +#define TWL4030_PM_RECEIVER_VDD1_DEV_GRP 0xB0 +#define TWL4030_PM_RECEIVER_VDD1_TYPE 0xB1 +#define TWL4030_PM_RECEIVER_VDD1_REMAP 0xB2 +#define TWL4030_PM_RECEIVER_VDD1_CFG 0xB3 +#define TWL4030_PM_RECEIVER_VDD1_MISC_CFG 0xB4 +#define TWL4030_PM_RECEIVER_VDD1_TEST1 0xB5 +#define TWL4030_PM_RECEIVER_VDD1_TEST2 0xB6 +#define TWL4030_PM_RECEIVER_VDD1_OSC 0xB7 +#define TWL4030_PM_RECEIVER_VDD1_RESERVED 0xB8 +#define TWL4030_PM_RECEIVER_VDD1_VSEL 0xB9 +#define TWL4030_PM_RECEIVER_VDD1_VMODE_CFG 0xBA +#define TWL4030_PM_RECEIVER_VDD1_VFLOOR 0xBB +#define TWL4030_PM_RECEIVER_VDD1_VROOF 0xBC +#define TWL4030_PM_RECEIVER_VDD1_STEP 0xBD +#define TWL4030_PM_RECEIVER_VDD2_DEV_GRP 0xBE +#define TWL4030_PM_RECEIVER_VDD2_TYPE 0xBF +#define TWL4030_PM_RECEIVER_VDD2_REMAP 0xC0 +#define TWL4030_PM_RECEIVER_VDD2_CFG 0xC1 +#define TWL4030_PM_RECEIVER_VDD2_MISC_CFG 0xC2 +#define TWL4030_PM_RECEIVER_VDD2_TEST1 0xC3 +#define TWL4030_PM_RECEIVER_VDD2_TEST2 0xC4 +#define TWL4030_PM_RECEIVER_VDD2_OSC 0xC5 +#define TWL4030_PM_RECEIVER_VDD2_RESERVED 0xC6 +#define TWL4030_PM_RECEIVER_VDD2_VSEL 0xC7 +#define TWL4030_PM_RECEIVER_VDD2_VMODE_CFG 0xC8 +#define TWL4030_PM_RECEIVER_VDD2_VFLOOR 0xC9 +#define TWL4030_PM_RECEIVER_VDD2_VROOF 0xCA +#define TWL4030_PM_RECEIVER_VDD2_STEP 0xCB #define TWL4030_PM_RECEIVER_VUSB1V5_DEV_GRP 0xCC #define TWL4030_PM_RECEIVER_VUSB1V5_TYPE 0xCD #define TWL4030_PM_RECEIVER_VUSB1V5_REMAP 0xCE @@ -162,10 +275,37 @@ #define TWL4030_PM_RECEIVER_VUSB3V1_TYPE 0xD3 #define TWL4030_PM_RECEIVER_VUSB3V1_REMAP 0xD4 #define TWL4030_PM_RECEIVER_VUSBCP_DEV_GRP 0xD5 -#define TWL4030_PM_RECEIVER_VUSBCP_DEV_TYPE 0xD6 -#define TWL4030_PM_RECEIVER_VUSBCP_DEV_REMAP 0xD7 +#define TWL4030_PM_RECEIVER_VUSBCP_TYPE 0xD6 +#define TWL4030_PM_RECEIVER_VUSBCP_REMAP 0xD7 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED1 0xD8 #define TWL4030_PM_RECEIVER_VUSB_DEDICATED2 0xD9 +#define TWL4030_PM_RECEIVER_REGEN_DEV_GRP 0xDA +#define TWL4030_PM_RECEIVER_REGEN_TYPE 0xDB +#define TWL4030_PM_RECEIVER_REGEN_REMAP 0xDC +#define TWL4030_PM_RECEIVER_NRESPWRON_DEV_GRP 0xDD +#define TWL4030_PM_RECEIVER_NRESPWRON_TYPE 0xDE +#define TWL4030_PM_RECEIVER_NRESPWRON_REMAP 0xDF +#define TWL4030_PM_RECEIVER_CLKEN_DEV_GRP 0xE0 +#define TWL4030_PM_RECEIVER_CLKEN_TYPE 0xE1 +#define TWL4030_PM_RECEIVER_CLKEN_REMAP 0xE2 +#define TWL4030_PM_RECEIVER_SYSEN_DEV_GRP 0xE3 +#define TWL4030_PM_RECEIVER_SYSEN_TYPE 0xE4 +#define TWL4030_PM_RECEIVER_SYSEN_REMAP 0xE5 +#define TWL4030_PM_RECEIVER_HFCLKOUT_DEV_GRP 0xE6 +#define TWL4030_PM_RECEIVER_HFCLKOUT_TYPE 0xE7 +#define TWL4030_PM_RECEIVER_HFCLKOUT_REMAP 0xE8 +#define TWL4030_PM_RECEIVER_32KCLKOUT_DEV_GRP 0xE9 +#define TWL4030_PM_RECEIVER_32KCLKOUT_TYPE 0xEA +#define TWL4030_PM_RECEIVER_32KCLKOUT_REMAP 0xEB +#define TWL4030_PM_RECEIVER_TRITON_RESET_DEV_GRP 0xEC +#define TWL4030_PM_RECEIVER_TRITON_RESET_TYPE 0xED +#define TWL4030_PM_RECEIVER_TRITON_RESET_REMAP 0xEE +#define TWL4030_PM_RECEIVER_MAINREF_DEV_GRP 0xEF +#define TWL4030_PM_RECEIVER_MAINREF_TYPE 0xF0 +#define TWL4030_PM_RECEIVER_MAINREF_REMAP 0xF1 + +/* LED */ +#define TWL4030_LED_LEDEN 0xEE
/* Keypad */ #define TWL4030_KEYPAD_KEYP_CTRL_REG 0xD2 @@ -242,7 +382,17 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) return i2c_read(chip_no, reg, 1, val, 1); }
+/* + * Power + */ + /* For hardware resetting */ void twl4030_power_reset_init(void); +/* For initializing power device */ +void twl4030_power_init(void); +/* + * LED + */ +void twl4030_led_init(void);
#endif /* TWL4030_H */

Because twl4030 now has its own device files, move and rename twl4030_mmc_config.
twl4030_mmc_config initializes the twl4030 power setting to the mmc device. Because it is in the twl4030 power domain, move it out of drivers/mmc/omap3_mmc.c and into drivers/power/twl4030.c.
The function was renamed to twl4030_power_mmc_init because all the functions in this file are to have the format
twl4030_power_<device>_<action>
In this case the suffix is mmc_init so device : mmc action : init
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- drivers/mmc/omap3_mmc.c | 13 ++----------- drivers/power/twl4030.c | 15 +++++++++++++++ include/configs/omap3_evm.h | 5 +++++ include/twl4030.h | 3 +++ 4 files changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/omap3_mmc.c b/drivers/mmc/omap3_mmc.c index e90db7e..9e09434 100644 --- a/drivers/mmc/omap3_mmc.c +++ b/drivers/mmc/omap3_mmc.c @@ -28,6 +28,7 @@ #include <mmc.h> #include <part.h> #include <i2c.h> +#include <twl4030.h> #include <asm/io.h> #include <asm/arch/mmc.h>
@@ -58,21 +59,11 @@ block_dev_desc_t *mmc_get_dev(int dev) return (block_dev_desc_t *) &mmc_blk_dev; }
-void twl4030_mmc_config(void) -{ - unsigned char data; - - data = DEV_GRP_P1; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEV_GRP, 1, &data, 1); - data = VMMC1_VSEL_30; - i2c_write(PWRMGT_ADDR_ID4, VMMC1_DEDICATED, 1, &data, 1); -} - unsigned char mmc_board_init(void) { t2_t *t2_base = (t2_t *)T2_BASE;
- twl4030_mmc_config(); + twl4030_power_mmc_init();
writel(readl(&t2_base->pbias_lite) | PBIASLITEPWRDNZ1 | PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, diff --git a/drivers/power/twl4030.c b/drivers/power/twl4030.c index 1454c2c..5e3d217 100644 --- a/drivers/power/twl4030.c +++ b/drivers/power/twl4030.c @@ -98,3 +98,18 @@ void twl4030_power_init(void) TWL4030_PM_RECEIVER_VDAC_DEDICATED); }
+#define VMMC1_VSEL_30 0x02 + +void twl4030_power_mmc_init(void) +{ + unsigned char byte; + + byte = DEV_GRP_P1; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VMMC1_DEV_GRP); + + /* 3 Volts */ + byte = VMMC1_VSEL_30; + twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER, byte, + TWL4030_PM_RECEIVER_VMMC1_DEDICATED); +} diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index e205c01..315404a 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -128,6 +128,11 @@ #define CONFIG_DRIVER_OMAP34XX_I2C 1
/* + * TWL4030 + */ +#define CONFIG_TWL4030_POWER 1 + +/* * Board NAND Info. */ #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ diff --git a/include/twl4030.h b/include/twl4030.h index d6b61b8..6f480d8 100644 --- a/include/twl4030.h +++ b/include/twl4030.h @@ -390,6 +390,9 @@ static inline int twl4030_i2c_read_u8(u8 chip_no, u8 *val, u8 reg) void twl4030_power_reset_init(void); /* For initializing power device */ void twl4030_power_init(void); +/* For initializing mmc power */ +void twl4030_power_mmc_init(void); + /* * LED */

These defines have been subplanted by the equivelent defines in include/twl4030.h
Signed-off-by: Tom Rix Tom.Rix@windriver.com --- include/asm-arm/arch-omap3/omap3.h | 35 ----------------------------------- 1 files changed, 0 insertions(+), 35 deletions(-)
diff --git a/include/asm-arm/arch-omap3/omap3.h b/include/asm-arm/arch-omap3/omap3.h index 7c11019..fa8f46d 100644 --- a/include/asm-arm/arch-omap3/omap3.h +++ b/include/asm-arm/arch-omap3/omap3.h @@ -181,39 +181,4 @@ typedef struct gpio { #define WIDTH_8BIT 0x0000 #define WIDTH_16BIT 0x1000 /* bit pos for 16 bit in gpmc */
-/* I2C power management companion definitions */ -#define PWRMGT_ADDR_ID1 0x48 -#define PWRMGT_ADDR_ID2 0x49 -#define PWRMGT_ADDR_ID3 0x4A -#define PWRMGT_ADDR_ID4 0x4B - -/* I2C ID3 (slave3) register */ -#define LEDEN 0xEE - -#define LEDAON (0x1 << 0) -#define LEDBON (0x1 << 1) -#define LEDAPWM (0x1 << 4) -#define LEDBPWM (0x1 << 5) - -/* I2C ID4 (slave4) register */ -#define VAUX2_DEV_GRP 0x76 -#define VAUX2_DEDICATED 0x79 -#define VAUX3_DEV_GRP 0x7A -#define VAUX3_DEDICATED 0x7D -#define VMMC1_DEV_GRP 0x82 -#define VMMC1_DEDICATED 0x85 -#define VPLL2_DEV_GRP 0x8E -#define VPLL2_DEDICATED 0x91 -#define VDAC_DEV_GRP 0x96 -#define VDAC_DEDICATED 0x99 - -#define DEV_GRP_P1 0x20 -#define DEV_GRP_ALL 0xE0 - -#define VAUX2_VSEL_28 0x09 -#define VAUX3_VSEL_28 0x03 -#define VPLL2_VSEL_18 0x05 -#define VDAC_VSEL_18 0x03 -#define VMMC1_VSEL_30 0x02 - #endif

On 12:52 Sun 28 Jun , Tom Rix wrote:
The issue of 3.4M speed has been taken care of. I have added the support and tested it on the Zooms, beagle and overo.
The issue of a better a better comment for the twl4030 read and write functions has been done.
The big new thing is that existing twl4030 code is moved. This is the omap3 board power and mmc initializing.
looks fine and really better than the current implementation but two thinks please all boards ack the change what is the status of the omap2?
Best Regards, J.

Jean-Christophe PLAGNIOL-VILLARD wrote:
On 12:52 Sun 28 Jun , Tom Rix wrote:
The issue of 3.4M speed has been taken care of. I have added the support and tested it on the Zooms, beagle and overo.
The issue of a better a better comment for the twl4030 read and write functions has been done.
The big new thing is that existing twl4030 code is moved. This is the omap3 board power and mmc initializing.
looks fine and really better than the current implementation but two thinks please all boards ack the change what is the status of the omap2?
Omap2 is pending.
Best Regards, J.

On 15:04 Sun 28 Jun , Tom wrote:
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 12:52 Sun 28 Jun , Tom Rix wrote:
The issue of 3.4M speed has been taken care of. I have added the support and tested it on the Zooms, beagle and overo.
The issue of a better a better comment for the twl4030 read and write functions has been done.
The big new thing is that existing twl4030 code is moved. This is the omap3 board power and mmc initializing.
looks fine and really better than the current implementation but two thinks please all boards ack the change
board maintainer I mean
what is the status of the omap2?
Omap2 is pending.
please update when you will have news
Best Regards, J.
participants (3)
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Jean-Christophe PLAGNIOL-VILLARD
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Tom
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Tom Rix