We must invalidate TLBs before MMU turn on, but currently the code is not, if there are some stale TLB entry valid in the TLBs, it will cause strange issue.

Signed-off-by: Dave Liu daveliu@freescale.com --- cpu/mpc86xx/start.S | 5 ++++- 1 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 159f3e1..30e6047 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -202,8 +202,12 @@ boot_warm: mtmsr 0 #endif

+ /* Invalidate BATs */ bl invalidate_bats sync + /* Invalidate all of TLB before MMU turn on */ + bl clear_tlbs + sync

#ifdef CONFIG_SYS_L2 /* init the L2 cache */ @@ -275,7 +279,6 @@ in_flash:

/* setup the rest of the bats */ bl setup_bats - bl clear_tlbs sync

#if (CONFIG_SYS_CCSRBAR_DEFAULT != CONFIG_SYS_CCSRBAR)