Hi yogesh,

I don't know what is exactly happening with your porting but I suggest you to take a look in the porting done for the Lite5200B in the 1.1.4 U-Boot version. The mapping for the Lite5200B is quite similar to your board, it has to flash memories mapped in the 0xFF000000 (CS0) and 0xFE000000 (CS1). I think the Lite5200B porting could be a better starting point for your porting than the IceCube,(and the last U-Boot version too). Anyway, something is not very clear in your explanation: Is the flash mapped at the 0xFE000000 address or at the 0xFC000000 address? You say that it is mapped at the 0xFE000000 but CFG_CS1_START is 0xFC000000.

Best Regards, José María López.

-----Mensaje original----- De: u-boot-users-bounces@lists.sourceforge.net [mailto:u-boot-users-bounces@lists.sourceforge.net] En nombre de Yogesh Kumar M Enviado el: viernes, 01 de septiembre de 2006 13:52 Para: u-boot-users@lists.sourceforge.net Asunto: [U-Boot-Users] FW: Please help out to solve this flash problen inU-boot

<<Archivo: icecube.c>> <<Archivo: IceCube.h>> <<Archivo: ATT1253471.txt>> <<Archivo: ATT1253472.txt>> Hi All This is yogesh,we have a custom made board with

1)MPC5200B(with host bridge support) 2)PCI2PCI Bridge device from texas instruments 3)DM642 dsp based processor and other I/O devices like serial port,HDD interface,ethernet etc

we have successfully ported U-BOOT 1.1.2 and linux-2.4.25 where all the interfaces are working fine

we have interfaced with the GUI application also.

we have 2 16 MB flash in this MPC5200 board

which are mapped as FF000000 CS0 or BOOTCS FE000000 CS1 as my storage flash

CS0 which is mapped to FF000000 is working fine without any issue. CS1 which is mapped to FE000000 has no response means chipselect it self is not generated

#define CFG_FLASH1_BASE 0xFC000000 #define CFG_FLASH1_SIZE 0x01000000

#define CFG_CS1_START 0xFC000000 #define CFG_CS1_SIZE CFG_FLASH1_SIZE which i have defined in Icecube.h

and i have enabled bit 14 and 15 as explained in mpc5200 datasheet

*(vu_long *)MPC5XXX_ADDECR |= (3 << 16); /* enable CS1 added for CS1 chip Select */

I have enabled CE (chip enable bit) and ME (Master enable bit)

and when i read my F000000C i can see the masked bits and if i read F00000054 i am able to see the address mapped as 0000fe00 ie is fe000000

can you please tell me what could be wrong since i am struck with this problem since long time.

thanks yogesh