Signed-off-by: Hannes Schmelzer hannes.schmelzer@br-automation.com ---

board/BuR/common/common.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 513872a..28ebb84 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -266,6 +266,11 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; }

+int overwrite_console(void) +{ + return 1; +} + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX) #include <asm/arch/hardware.h> #include <asm/arch/omap.h> @@ -359,7 +364,3 @@ void set_mux_conf_regs(void) }

#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */ -int overwrite_console(void) -{ - return 1; -}

Many B&R boards are equipped with an I2C-EEPROM where various information can be stored.

Today there is only a single byte for 'board_id' used.

We write this 'board_id' into environment for later use during boot.

If the value != 0xFF, meaning the byte is programmed, we modify the "brdefaultip" environment variable for setting an IP-Address based on board_id.

Signed-off-by: Hannes Schmelzer hannes.schmelzer@br-automation.com ---

board/BuR/common/bur_common.h | 2 ++ board/BuR/common/common.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 36 insertions(+)

diff --git a/board/BuR/common/bur_common.h b/board/BuR/common/bur_common.h index f743194..2591bf4 100644 --- a/board/BuR/common/bur_common.h +++ b/board/BuR/common/bur_common.h @@ -21,4 +21,6 @@ void enable_i2c_pin_mux(void); void enable_board_pin_mux(void); int board_eth_init(bd_t *bis);

+int brdefaultip_setup(int bus, int chip); + #endif diff --git a/board/BuR/common/common.c b/board/BuR/common/common.c index 28ebb84..89087d7 100644 --- a/board/BuR/common/common.c +++ b/board/BuR/common/common.c @@ -266,6 +266,40 @@ int ft_board_setup(void *blob, bd_t *bd) return 0; }

+int brdefaultip_setup(int bus, int chip) +{ + int rc; + struct udevice *i2cdev; + u8 u8buf = 0; + char defip[256] = { 0 }; + + rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev); + if (rc != 0) { + printf("WARN: cannot probe baseboard EEPROM!\n"); + return -1; + } + + rc = dm_i2c_read(i2cdev, 0, &u8buf, 1); + if (rc != 0) { + printf("WARN: cannot read baseboard EEPROM!\n"); + return -1; + } + + if (u8buf != 0xFF) + snprintf(defip, sizeof(defip), + "if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;", + u8buf); + else + strncpy(defip, + "if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;", + sizeof(defip)); + + env_set("brdefaultip", defip); + env_set_hex("board_id", u8buf); + + return 0; +} + int overwrite_console(void) { return 1;

On many B&R boards we have a reset-controller, responsible for very early board-bringup (voltages, clocks, ...) and bootmode selection.

To be ready for adding more B&R boards to source tree while avoiding duplicate code, we add the resetcontroller implementation to the common part of B&R boards.

Signed-off-by: Hannes Schmelzer hannes.schmelzer@br-automation.com ---

board/BuR/common/br_resetc.c | 234 +++++++++++++++++++++++++++++++++++++++++++ board/BuR/common/br_resetc.h | 26 +++++ 2 files changed, 260 insertions(+) create mode 100644 board/BuR/common/br_resetc.c create mode 100644 board/BuR/common/br_resetc.h

diff --git a/board/BuR/common/br_resetc.c b/board/BuR/common/br_resetc.c new file mode 100644 index 0000000..190f141 --- /dev/null +++ b/board/BuR/common/br_resetc.c @@ -0,0 +1,234 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * common reset-controller functions for B&R boards + * + * Copyright (C) 2019 Hannes Schmelzer oe5hpm@oevsv.at + * B&R Industrial Automation GmbH - http://www.br-automation.com/ * + */ +#include <common.h> +#include <errno.h> +#include <i2c.h> +#include <dm/uclass.h> +#include "br_resetc.h" + +/* I2C Address of controller */ +#define RSTCTRL_ADDR_PSOC 0x75 +#define RSTCTRL_ADDR_STM32 0x60 + +#define BMODE_DEFAULTAR 0 +#define BMODE_SERVICE 2 +#define BMODE_RUN 4 +#define BMODE_PME 12 +#define BMODE_DIAG 15 + +#ifdef CONFIG_LCD +#include <lcd.h> +#define LCD_SETCURSOR(x, y) lcd_position_cursor(x, y) +#define LCD_PUTS(x) lcd_puts(x) +#else +#define LCD_SETCURSOR(x, y) +#define LCD_PUTS(x) +#endif /* CONFIG_LCD */ + +static const char *bootmodeascii[16] = { + "BOOT", "reserved", "reserved", "reserved", + "RUN", "reserved", "reserved", "reserved", + "reserved", "reserved", "reserved", "reserved", + "PME", "reserved", "reserved", "DIAG", +}; + +struct br_reset_t { + struct udevice *i2cdev; + u8 is_psoc; +}; + +static struct br_reset_t resetc; + +__weak int board_boot_key(void) +{ + return 0; +} + +__weak void board_boot_led(unsigned int on) +{ +} + +static int resetc_init(void) +{ + struct udevice *i2cbus; + int rc; + + rc = uclass_get_device_by_seq(UCLASS_I2C, 0, &i2cbus); + if (rc) { + printf("Cannot find I2C bus #0!\n"); + return -1; + } + + rc = dm_i2c_probe(i2cbus, + RSTCTRL_ADDR_PSOC, 0, &resetc.i2cdev); + if (rc) { + resetc.is_psoc = 0; + rc = dm_i2c_probe(i2cbus, + RSTCTRL_ADDR_STM32, 0, &resetc.i2cdev); + } + + if (rc) + printf("Warning: cannot probe BuR resetcontroller!\n"); + + return rc; +} + +int br_resetc_regget(u8 reg, u8 *dst) +{ + int rc = 0; + + if (!resetc.i2cdev) + rc = resetc_init(); + + if (rc != 0) + return rc; + + return dm_i2c_read(resetc.i2cdev, reg, dst, 1); +} + +int br_resetc_regset(u8 reg, u8 val) +{ + int rc = 0; + u16 regw = (val << 8) | val; + + if (!resetc.i2cdev) + rc = resetc_init(); + + if (rc != 0) + return rc; + + if (resetc.is_psoc) + return dm_i2c_write(resetc.i2cdev, reg, (u8 *)&regw, 2); + + return dm_i2c_write(resetc.i2cdev, reg, (u8 *)&regw, 1); +} + +int br_resetc_bmode(void) +{ + int rc = 0; + u16 regw; + u8 regb, scr; + int cnt; + unsigned int bmode = 0; + + if (!resetc.i2cdev) + rc = resetc_init(); + + if (rc != 0) + return rc; + + rc = dm_i2c_read(resetc.i2cdev, RSTCTRL_ENHSTATUS, &regb, 1); + if (rc != 0) { + printf("WARN: cannot read ENHSTATUS from resetcontroller!\n"); + return -1; + } + + rc = dm_i2c_read(resetc.i2cdev, RSTCTRL_SCRATCHREG0, &scr, 1); + if (rc != 0) { + printf("WARN: cannot read SCRATCHREG from resetcontroller!\n"); + return -1; + } + + board_boot_led(1); + + /* special bootmode from resetcontroller */ + if (regb & 0x4) { + bmode = BMODE_DIAG; + } else if (regb & 0x8) { + bmode = BMODE_DEFAULTAR; + } else if (board_boot_key() != 0) { + cnt = 4; + do { + LCD_SETCURSOR(1, 8); + switch (cnt) { + case 4: + LCD_PUTS + ("release KEY to enter SERVICE-mode. "); + break; + case 3: + LCD_PUTS + ("release KEY to enter DIAGNOSE-mode. "); + break; + case 2: + LCD_PUTS + ("release KEY to enter BOOT-mode. "); + break; + } + mdelay(1000); + cnt--; + if (board_boot_key() == 0) + break; + } while (cnt); + + switch (cnt) { + case 0: + bmode = BMODE_PME; + break; + case 1: + bmode = BMODE_DEFAULTAR; + break; + case 2: + bmode = BMODE_DIAG; + break; + case 3: + bmode = BMODE_SERVICE; + break; + } + } else if ((regb & 0x1) || scr == 0xCC) { + bmode = BMODE_PME; + } else { + bmode = BMODE_RUN; + } + + LCD_SETCURSOR(1, 8); + + switch (bmode) { + case BMODE_PME: + LCD_PUTS("entering PME-Mode (netscript). "); + regw = 0x0C0C; + break; + case BMODE_DEFAULTAR: + LCD_PUTS("entering BOOT-mode. "); + regw = 0x0000; + break; + case BMODE_DIAG: + LCD_PUTS("entering DIAGNOSE-mode. "); + regw = 0x0F0F; + break; + case BMODE_SERVICE: + LCD_PUTS("entering SERVICE mode. "); + regw = 0xB4B4; + break; + case BMODE_RUN: + LCD_PUTS("loading OS... "); + regw = 0x0404; + break; + } + + board_boot_led(0); + + if (resetc.is_psoc) + rc = dm_i2c_write(resetc.i2cdev, RSTCTRL_SCRATCHREG0, + (u8 *)&regw, 2); + else + rc = dm_i2c_write(resetc.i2cdev, RSTCTRL_SCRATCHREG0, + (u8 *)&regw, 1); + + if (rc != 0) + printf("WARN: cannot write into resetcontroller!\n"); + + if (resetc.is_psoc) + printf("Reset: PSOC controller\n"); + else + printf("Reset: STM32 controller\n"); + + printf("Mode: %s\n", bootmodeascii[regw & 0x0F]); + env_set_ulong("b_mode", regw & 0x0F); + + return rc; +} diff --git a/board/BuR/common/br_resetc.h b/board/BuR/common/br_resetc.h new file mode 100644 index 0000000..ba0689b --- /dev/null +++ b/board/BuR/common/br_resetc.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * common reset-controller functions for B&R boards + * + * Copyright (C) 2019 Hannes Schmelzer oe5hpm@oevsv.at + * B&R Industrial Automation GmbH - http://www.br-automation.com/ * + */ +#ifndef __CONFIG_BRRESETC_H__ +#define __CONFIG_BRRESETC_H__ +#include <common.h> + +int br_resetc_regget(u8 reg, u8 *dst); +int br_resetc_regset(u8 reg, u8 val); +int br_resetc_bmode(void); + +/* reset controller register defines */ +#define RSTCTRL_CTRLREG 0x01 +#define RSTCTRL_SCRATCHREG0 0x04 +#define RSTCTRL_ENHSTATUS 0x07 +#define RSTCTRL_SCRATCHREG1 0x08 +#define RSTCTRL_RSTCAUSE 0x00 +#define RSTCTRL_ERSTCAUSE 0x09 +#define RSTCTRL_SPECGPIO_I 0x0A +#define RSTCTRL_SPECGPIO_O 0x0B + +#endif /* __CONFIG_BRRESETC_H__ */

- fixup coding style - drop unused 'PUSH_KEY' define

Signed-off-by: Hannes Schmelzer hannes.schmelzer@br-automation.com ---

board/BuR/brxre1/board.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index 2d0ed41..6639f22 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -30,11 +30,9 @@

/* -------------------------------------------------------------------------*/ /* -- defines for used GPIO Hardware -- */ -#define ESC_KEY (0+19) -#define LCD_PWR (0+5) -#define PUSH_KEY (0+31) -/* -------------------------------------------------------------------------*/ /* -- PSOC Resetcontroller Register defines -- */ +#define ESC_KEY (0 + 19) +#define LCD_PWR (0 + 5)

/* I2C Address of controller */ #define RSTCTRL_ADDR 0x75 @@ -69,13 +67,13 @@ static int rstctrl_rw(u8 reg, unsigned char rnw, void *pdat, int size) }

#if defined(CONFIG_SPL_BUILD) -/* TODO: check ram-timing ! */ static const struct ddr_data ddr3_data = { .datardsratio0 = MT41K256M16HA125E_RD_DQS, .datawdsratio0 = MT41K256M16HA125E_WR_DQS, .datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE, .datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA, }; + static const struct cmd_control ddr3_cmd_ctrl_data = { .cmd0csratio = MT41K256M16HA125E_RATIO, .cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT, @@ -86,6 +84,7 @@ static const struct cmd_control ddr3_cmd_ctrl_data = { .cmd2csratio = MT41K256M16HA125E_RATIO, .cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT, }; + static struct emif_regs ddr3_emif_reg_data = { .sdram_config = MT41K256M16HA125E_EMIF_SDCFG, .ref_ctrl = MT41K256M16HA125E_EMIF_SDREF, @@ -104,8 +103,8 @@ static const struct ctrl_ioregs ddr3_ioregs = { .dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE, };

-#define OSC (V_OSCK/1000000) -const struct dpll_params dpll_ddr3 = { 400, OSC-1, 1, -1, -1, -1, -1}; +#define OSC (V_OSCK / 1000000) +const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};

void am33xx_spl_board_init(void) { @@ -289,8 +288,8 @@ int board_late_init(void) char othbootargs[128]; snprintf(othbootargs, sizeof(othbootargs), "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x", - (unsigned int) gd->fb_base-0x20, - (u32)env_get_ulong("vx_memtop", 16, gd->fb_base-0x20), + (u32)gd->fb_base - 0x20, + (u32)env_get_ulong("vx_memtop", 16, gd->fb_base - 0x20), (u32)env_get_ulong("vx_romfsbase", 16, 0), (u32)env_get_ulong("vx_romfssize", 16, 0)); env_set("othbootargs", othbootargs);

The handling of regarding bootmode and early setup has been moved to central location 'common/br_resetc.c', so use this on brxre1 board.

Signed-off-by: Hannes Schmelzer hannes.schmelzer@br-automation.com

---

board/BuR/brxre1/Makefile | 1 + board/BuR/brxre1/board.c | 159 +++++----------------------------------------- 2 files changed, 18 insertions(+), 142 deletions(-)

diff --git a/board/BuR/brxre1/Makefile b/board/BuR/brxre1/Makefile index 1cf7124..1d224e9 100644 --- a/board/BuR/brxre1/Makefile +++ b/board/BuR/brxre1/Makefile @@ -6,5 +6,6 @@ # Bernecker & Rainer Industrielektronik GmbH - http://www.br-automation.com/

obj-$(CONFIG_SPL_BUILD) += mux.o +obj-y += ../common/br_resetc.o obj-y += ../common/common.o obj-y += board.o diff --git a/board/BuR/brxre1/board.c b/board/BuR/brxre1/board.c index 6639f22..0d1c6c4 100644 --- a/board/BuR/brxre1/board.c +++ b/board/BuR/brxre1/board.c @@ -23,49 +23,20 @@ #include <asm/emif.h> #include <asm/gpio.h> #include <dm.h> -#include <i2c.h> #include <power/tps65217.h> #include "../common/bur_common.h" -#include <lcd.h> +#include "../common/br_resetc.h"

/* -------------------------------------------------------------------------*/ /* -- defines for used GPIO Hardware -- */ -/* -- PSOC Resetcontroller Register defines -- */ #define ESC_KEY (0 + 19) #define LCD_PWR (0 + 5)

-/* I2C Address of controller */ -#define RSTCTRL_ADDR 0x75 -/* Register for CTRL-word */ -#define RSTCTRL_CTRLREG 0x01 -/* Register for giving some information to VxWorks OS */ -#define RSTCTRL_SCRATCHREG 0x04 - -/* -- defines for RSTCTRL_CTRLREG -- */ -#define RSTCTRL_FORCE_PWR_NEN 0x0404 -#define RSTCTRL_CAN_STB 0x4040 +#define RSTCTRL_FORCE_PWR_NEN 0x04 +#define RSTCTRL_CAN_STB 0x40

DECLARE_GLOBAL_DATA_PTR;

-static int rstctrl_rw(u8 reg, unsigned char rnw, void *pdat, int size) -{ - struct udevice *i2cdev; - int rc; - - rc = i2c_get_chip_for_busnum(0, RSTCTRL_ADDR, 1, &i2cdev); - if (rc >= 0) { - if (rnw) - rc = dm_i2c_read(i2cdev, reg, pdat, size); - else - rc = dm_i2c_write(i2cdev, reg, pdat, size); - } else { - printf("%s: cannot get udevice for chip 0x%02x!\n", - __func__, RSTCTRL_ADDR); - } - - return rc; -} - #if defined(CONFIG_SPL_BUILD) static const struct ddr_data ddr3_data = { .datardsratio0 = MT41K256M16HA125E_RD_DQS, @@ -108,7 +79,6 @@ const struct dpll_params dpll_ddr3 = { 400, OSC - 1, 1, -1, -1, -1, -1};

void am33xx_spl_board_init(void) { - unsigned short buf; int rc;

struct cm_perpll *const cmper = (struct cm_perpll *)CM_PER; @@ -142,10 +112,10 @@ void am33xx_spl_board_init(void) enable_i2c_pin_mux();

/* power-ON 3V3 via Resetcontroller */ - buf = RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB; - rc = rstctrl_rw(RSTCTRL_CTRLREG, 0, (uint8_t *)&buf, sizeof(buf)); + rc = br_resetc_regset(RSTCTRL_CTRLREG, + RSTCTRL_FORCE_PWR_NEN | RSTCTRL_CAN_STB); if (rc != 0) - printf("ERROR: cannot write to resetc (turn on PWR_nEN)\n"); + printf("ERROR: cannot write to resetc (turn on PWR_nEN)!\n");

pmicsetup(0, 0); } @@ -168,6 +138,9 @@ void sdram_init(void) */ int board_init(void) { + /* request common used gpios */ + gpio_request(ESC_KEY, "boot-key"); + if (power_tps65217_init(0)) printf("WARN: cannot setup PMIC 0x24 @ bus #0, not found!.\n");

@@ -175,117 +148,19 @@ int board_init(void) }

#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ - const unsigned int toff = 1000; - unsigned int cnt = 3; - unsigned short buf = 0xAAAA; - unsigned char scratchreg = 0; - int rc;

- /* try to read out some boot-instruction from resetcontroller */ - rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 1, &scratchreg, sizeof(scratchreg)); - if (rc != 0) - printf("ERROR: read scratchregister (resetc) failed!\n"); +int board_boot_key(void) +{ + return gpio_get_value(ESC_KEY); +}

- if (gpio_request(ESC_KEY, "boot-key") != 0) { - printf("cannot request boot-key!\n"); - } else if (gpio_get_value(ESC_KEY)) { - do { - lcd_position_cursor(1, 8); - switch (cnt) { - case 3: - lcd_puts( - "release ESC-KEY to enter SERVICE-mode."); - break; - case 2: - lcd_puts( - "release ESC-KEY to enter DIAGNOSE-mode."); - break; - case 1: - lcd_puts( - "release ESC-KEY to enter BOOT-mode. "); - break; - } - mdelay(toff); - cnt--; - if (!gpio_get_value(ESC_KEY) && - gpio_get_value(PUSH_KEY) && 2 == cnt) { - lcd_position_cursor(1, 8); - lcd_puts( - "switching to network-console ... "); - env_set("bootcmd", "run netconsole"); - cnt = 4; - break; - } else if (!gpio_get_value(ESC_KEY) && - gpio_get_value(PUSH_KEY) && 1 == cnt) { - lcd_position_cursor(1, 8); - lcd_puts( - "starting u-boot script from USB ... "); - env_set("bootcmd", "run usbscript"); - cnt = 4; - break; - } else if ((!gpio_get_value(ESC_KEY) && - gpio_get_value(PUSH_KEY) && cnt == 0) || - (gpio_get_value(ESC_KEY) && - gpio_get_value(PUSH_KEY) && cnt == 0)) { - lcd_position_cursor(1, 8); - lcd_puts( - "starting script from network ... "); - env_set("bootcmd", "run netscript"); - cnt = 4; - break; - } else if (!gpio_get_value(ESC_KEY)) { - break; - } - } while (cnt); - } else if (scratchreg == 0xCC) { - lcd_position_cursor(1, 8); - lcd_puts( - "starting vxworks from network ... "); - env_set("bootcmd", "run netboot"); - cnt = 4; - } else if (scratchreg == 0xCD) { - lcd_position_cursor(1, 8); - lcd_puts( - "starting script from network ... "); - env_set("bootcmd", "run netscript"); - cnt = 4; - } else if (scratchreg == 0xCE) { - lcd_position_cursor(1, 8); - lcd_puts( - "starting AR from eMMC ... "); - env_set("bootcmd", "run mmcboot"); - cnt = 4; - } +int board_late_init(void) +{ + char othbootargs[128];

- lcd_position_cursor(1, 8); - switch (cnt) { - case 0: - lcd_puts("entering BOOT-mode. "); - env_set("bootcmd", "run defaultAR"); - buf = 0x0000; - break; - case 1: - lcd_puts("entering DIAGNOSE-mode. "); - buf = 0x0F0F; - break; - case 2: - lcd_puts("entering SERVICE mode. "); - buf = 0xB4B4; - break; - case 3: - lcd_puts("loading OS... "); - buf = 0x0404; - break; - } - /* write bootinfo into scratchregister of resetcontroller */ - rc = rstctrl_rw(RSTCTRL_SCRATCHREG, 0, (uint8_t *)&buf, sizeof(buf)); - if (rc != 0) - printf("ERROR: write scratchregister (resetc) failed!\n"); + br_resetc_bmode();

/* setup othbootargs for bootvx-command (vxWorks bootline) */ - char othbootargs[128]; snprintf(othbootargs, sizeof(othbootargs), "u=vxWorksFTP pw=vxWorks o=0x%08x;0x%08x;0x%08x;0x%08x", (u32)gd->fb_base - 0x20,