[PATCH v4 0/4] fix npcm bmc error

1. Add name for gpio pinctrl function 2. Add baud rate table 3. Fix ecc ram size - ECC ram size - Fix wrong place to set dram bank size
4. Modify configs
Jim Liu (4): pinctrl: npcm8xx: add name for gpio function configs: npcm: support more uart baud rate board: nuvuton: arbel: fix incorrect ram size configs: nuvoton: npcm8xx: disable CONFIG_SPI_FLASH_USE_4K_SECTORS
board/nuvoton/arbel_evb/arbel_evb.c | 36 +++++++++++------------ configs/arbel_evb_defconfig | 1 + drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + include/configs/arbel.h | 5 +++- include/configs/poleg.h | 2 ++ 5 files changed, 26 insertions(+), 19 deletions(-)

GPIO function name is needed in the debug log
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2: - add commit message Changes for v3: - no change Changes for v4: - no change --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 7976e3b3ed..ff49819b58 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -329,6 +329,7 @@ struct group_info {
static const struct group_info npcm8xx_groups[] = { FUNC_LIST + {FN_gpio, "GPIO", NULL, 0, 0, 0} };
/* Pin flags */

On Mon, Oct 23, 2023 at 03:02:22PM +0800, Jim Liu wrote:
GPIO function name is needed in the debug log
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2:
- add commit message
Changes for v3:
- no change
Changes for v4:
- no change
Applied to u-boot/master, thanks!

Add uart baud rate table to arbel(npcm8xx) and poleg(npcm7xx)
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2: - Add commit message Changes for v3: - Modify CONFIG_SYS_BAUDRATE_TABLE Changes for v4: - No change
--- include/configs/arbel.h | 5 ++++- include/configs/poleg.h | 2 ++ 2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 891257bc93..29010503d3 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -7,11 +7,14 @@ #define __CONFIG_ARBEL_H
#define CFG_SYS_SDRAM_BASE 0x0 -#define CFG_SYS_BOOTMAPSZ (30 << 20) +#define CFG_SYS_BOOTMAPSZ (128 << 20) #define CFG_SYS_BOOTM_LEN (20 << 20) #define CFG_SYS_INIT_RAM_ADDR CFG_SYS_SDRAM_BASE #define CFG_SYS_INIT_RAM_SIZE 0x8000
+#define CFG_SYS_BAUDRATE_TABLE { 9600, 14400, 19200, 38400, 57600, 115200, 230400, \ 380400, 460800, 921600 } + + /* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ "stdin=serial\0" \ diff --git a/include/configs/poleg.h b/include/configs/poleg.h index 1e96e838be..2a2d85c8ec 100644 --- a/include/configs/poleg.h +++ b/include/configs/poleg.h @@ -13,6 +13,8 @@ #define CFG_SYS_BOOTMAPSZ (0x30 << 20) #define CFG_SYS_SDRAM_BASE 0x0
+#define CFG_SYS_BAUDRATE_TABLE { 57600, 115200, 230400, 460800 } + /* Default environemnt variables */ #define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80200000\0" \ "stdin=serial\0" \

On Mon, Oct 23, 2023 at 03:02:23PM +0800, Jim Liu wrote:
Add uart baud rate table to arbel(npcm8xx) and poleg(npcm7xx)
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2:
- Add commit message
Changes for v3:
- Modify CONFIG_SYS_BAUDRATE_TABLE
Changes for v4:
- No change
Applied to u-boot/master, thanks!

1. Fix incorrect ram size of 4GB dram with ECC enabled 2. Fix wrong place to set dram bank size - The dram bank size should be set in dram_init_banksize - Dram_init should not access gd->bd because the board info struct is not reserved yet.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2: - add commit message Changes for v3: - no change Changes for v4: - Add Fix wrong place to set dram bank size
--- board/nuvoton/arbel_evb/arbel_evb.c | 36 ++++++++++++++--------------- 1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index e52e0a59ab..8516a37b78 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -16,7 +16,7 @@ #define DRAM_1GB_SIZE 0x40000000ULL #define DRAM_2GB_ECC_SIZE 0x70000000ULL #define DRAM_2GB_SIZE 0x80000000ULL -#define DRAM_4GB_ECC_SIZE 0xE00000000ULL +#define DRAM_4GB_ECC_SIZE 0xE0000000ULL #define DRAM_4GB_SIZE 0x100000000ULL
DECLARE_GLOBAL_DATA_PTR; @@ -29,7 +29,6 @@ int board_init(void) int dram_init(void) { struct npcm_gcr *gcr = (struct npcm_gcr *)NPCM_GCR_BA; - uint64_t delta = 0ULL;
/* * get dram active size value from bootblock. @@ -38,18 +37,23 @@ int dram_init(void) */
gd->ram_size = readl(&gcr->scrpad_c); - debug("%s: scrpad_c: %llx ", __func__, gd->ram_size);
if (gd->ram_size == 0) { gd->ram_size = readl(&gcr->scrpad_b); - debug("%s: scrpad_b: %llx ", __func__, gd->ram_size); - } else { + else gd->ram_size *= 0x100000ULL; }
- gd->bd->bi_dram[0].start = 0; debug("ram_size: %llx ", gd->ram_size);
+ return 0; +} + +int dram_init_banksize(void) +{ + + gd->bd->bi_dram[0].start = 0; + switch (gd->ram_size) { case DRAM_512MB_ECC_SIZE: case DRAM_512MB_SIZE: @@ -62,32 +66,28 @@ int dram_init(void) gd->bd->bi_dram[1].size = 0; break; case DRAM_4GB_ECC_SIZE: - gd->bd->bi_dram[0].size = DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; - gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_ECC_SIZE; + gd->bd->bi_dram[1].size = DRAM_2GB_SIZE - + (DRAM_4GB_SIZE - DRAM_4GB_ECC_SIZE); + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; case DRAM_4GB_SIZE: gd->bd->bi_dram[0].size = DRAM_2GB_SIZE; gd->bd->bi_dram[1].start = DRAM_4GB_SIZE; gd->bd->bi_dram[1].size = DRAM_2GB_SIZE; - delta = DRAM_4GB_SIZE - DRAM_2GB_SIZE; + /* use bank0 only */ + gd->ram_size = DRAM_2GB_SIZE; break; default: gd->bd->bi_dram[0].size = DRAM_1GB_SIZE; gd->bd->bi_dram[1].start = 0; gd->bd->bi_dram[1].size = 0; + gd->ram_size = DRAM_1GB_SIZE; break; }
- gd->ram_size -= delta; - return 0; }
-int dram_init_banksize(void) -{ - dram_init(); - - return 0; -}

On Mon, Oct 23, 2023 at 03:02:24PM +0800, Jim Liu wrote:
- Fix incorrect ram size of 4GB dram with ECC enabled
- Fix wrong place to set dram bank size
- The dram bank size should be set in dram_init_banksize
- Dram_init should not access gd->bd because the board info struct is not reserved yet.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2:
- add commit message
Changes for v3:
- no change
Changes for v4:
- Add Fix wrong place to set dram bank size
Applied to u-boot/master, thanks!

disable this config to improve flash program time
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2: - add commit message Changes for v3: - no change Changes for v4: - no change
--- configs/arbel_evb_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 8c32b4b20d..6cfb5a7d32 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -58,6 +58,7 @@ CONFIG_MMC_SDHCI_NPCM=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_PHY_BROADCOM=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y

On Mon, Oct 23, 2023 at 03:02:25PM +0800, Jim Liu wrote:
disable this config to improve flash program time
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
Changes for v2:
- add commit message
Changes for v3:
- no change
Changes for v4:
- no change
Applied to u-boot/master, thanks!
participants (2)
-
Jim Liu
-
Tom Rini