From: Tien Fong Chee tien.fong.chee@intel.com

Klockwork reported there is potential value overflow with incorrect typecast, but this is not valid in this arithmetic implementation because result is never over 32-bit size. The code is improved to ensure correct size of result returned with correct type casting for the sake of good coding practice.

Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Signed-off-by: Jit Loon Lim jit.loon.lim@intel.com --- drivers/ddr/altera/sdram_n5x.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/ddr/altera/sdram_n5x.c b/drivers/ddr/altera/sdram_n5x.c index 72c231b3f1..0e944b7a15 100644 --- a/drivers/ddr/altera/sdram_n5x.c +++ b/drivers/ddr/altera/sdram_n5x.c @@ -2898,9 +2898,9 @@ int sdram_mmr_init_full(struct udevice *dev) * subsystem in complete reset state before init DDR clock * and DDR controller */ - ret = wait_for_bit_le32((const void *)((uintptr_t)(readl + ret = wait_for_bit_le32((const void *)((uintptr_t)readl (ddr_handoff_info.mem_reset_base) + - MEM_RST_MGR_STATUS)), + MEM_RST_MGR_STATUS), MEM_RST_MGR_STATUS_RESET_COMPLETE, true, TIMEOUT_200MS, false); if (ret) { @@ -2923,8 +2923,8 @@ int sdram_mmr_init_full(struct udevice *dev)

/* Release the controller from reset */ setbits_le32((uintptr_t) - (readl(ddr_handoff_info.mem_reset_base) + - MEM_RST_MGR_STATUS), MEM_RST_MGR_STATUS_AXI_RST | + readl(ddr_handoff_info.mem_reset_base) + + MEM_RST_MGR_STATUS, MEM_RST_MGR_STATUS_AXI_RST | MEM_RST_MGR_STATUS_CONTROLLER_RST | MEM_RST_MGR_STATUS_RESET_COMPLETE);