[U-Boot] [PATCH v2 01/14] ARM: zynq: Remove PHYLIB from config to defconfig
Move PHYLIB from board config to defconfig
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
configs/zynq_microzed_defconfig | 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + include/configs/zynq-common.h | 1 - 11 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 3bf17cfc7ab7..0608d8a733cf 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index 600ca8b2f347..d6f0ce388832 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -8,3 +8,4 @@ CONFIG_SPL=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index e3c1e23638ff..8318b94ecbb2 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -14,4 +14,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index eaf15f2d700c..533aff9a7531 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 381ace8ace6f..689d19e992da 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -17,5 +17,6 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index 49dd02554c88..c7125c304ab8 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM011" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index d50594371aaa..a8f28da11767 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -10,3 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index c2ae2ab2809d..6b2fd8ca4ebb 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -12,3 +12,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index f603bb360106..4076c30707b1 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHYLIB=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 1227b7a14c32..c51049e664b1 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -11,6 +11,7 @@ CONFIG_FIT_SIGNATURE=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_PHYLIB=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index fa83ac7b15d0..a9e6bf046a97 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -50,7 +50,6 @@ # define CONFIG_ZYNQ_GEM # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_PHYLIB # define CONFIG_PHY_MARVELL # define CONFIG_BOOTP_SERVERIP # define CONFIG_BOOTP_BOOTPATH
CONFIG_API is causing compilation error when DM_ETH is enabled because eth_get_dev() is not available.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
include/configs/zynq-common.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index a9e6bf046a97..5db501188b18 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -297,7 +297,6 @@
/* Boot FreeBSD/vxWorks from an ELF image */ #if defined(CONFIG_ZYNQ_BOOT_FREEBSD) -# define CONFIG_API # define CONFIG_SYS_MMC_MAX_DEVICE 1 #endif
Add return value for phy detection algorithm to stop init function when phy is not found.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 858093f0d7e2..1a5a366c9444 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -241,7 +241,7 @@ static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); }
-static void phy_detection(struct eth_device *dev) +static int phy_detection(struct eth_device *dev) { int i; u16 phyreg; @@ -254,7 +254,7 @@ static void phy_detection(struct eth_device *dev) /* Found a valid PHY address */ debug("Default phy address %d is valid\n", priv->phyaddr); - return; + return 0; } else { debug("PHY address is not setup correctly %d\n", priv->phyaddr); @@ -272,11 +272,12 @@ static void phy_detection(struct eth_device *dev) /* Found a valid PHY address */ priv->phyaddr = i; debug("Found valid phy address, %d\n", i); - return; + return 0; } } } printf("PHY is not detected\n"); + return -1; }
static int zynq_gem_setup_mac(struct eth_device *dev) @@ -310,6 +311,7 @@ static int zynq_gem_setup_mac(struct eth_device *dev) static int zynq_gem_init(struct eth_device *dev, bd_t * bis) { u32 i; + int ret; unsigned long clk_rate = 0; struct phy_device *phydev; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; @@ -384,7 +386,11 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) priv->init++; }
- phy_detection(dev); + ret = phy_detection(dev); + if (ret) { + printf("GEM PHY init failed\n"); + return ret; + }
/* interface - look at tsec */ phydev = phy_connect(priv->bus, priv->phyaddr, dev,
Pass regs instead of dev because this will be chagned by driver model.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 1a5a366c9444..7f801d5c4c03 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -172,9 +172,8 @@ struct zynq_gem_priv { struct mii_dev *bus; };
-static inline int mdio_wait(struct eth_device *dev) +static inline int mdio_wait(struct zynq_gem_regs *regs) { - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; u32 timeout = 20000;
/* Wait till MDIO interface is ready to accept a new transaction. */ @@ -198,7 +197,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, u32 mgtcr; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
- if (mdio_wait(dev)) + if (mdio_wait(regs)) return 1;
/* Construct mgtcr mask for the operation */ @@ -209,7 +208,7 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, /* Write mgtcr and wait for completion */ writel(mgtcr, ®s->phymntnc);
- if (mdio_wait(dev)) + if (mdio_wait(regs)) return 1;
if (op == ZYNQ_GEM_PHYMNTNC_OP_R_MASK)
Next step to move driver to driver model. Do not use eth_device structure. Use private structure instead. Add iobase to private structure to store gem iobase.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 7f801d5c4c03..65ea5deb23c6 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -167,6 +167,7 @@ struct zynq_gem_priv { int phyaddr; u32 emio; int init; + struct zynq_gem_regs *iobase; phy_interface_t interface; struct phy_device *phydev; struct mii_dev *bus; @@ -191,11 +192,11 @@ static inline int mdio_wait(struct zynq_gem_regs *regs) return 0; }
-static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, - u32 op, u16 *data) +static u32 phy_setup_op(struct zynq_gem_priv *priv, u32 phy_addr, u32 regnum, + u32 op, u16 *data) { u32 mgtcr; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_regs *regs = priv->iobase;
if (mdio_wait(regs)) return 1; @@ -217,12 +218,13 @@ static u32 phy_setup_op(struct eth_device *dev, u32 phy_addr, u32 regnum, return 0; }
-static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val) +static u32 phyread(struct zynq_gem_priv *priv, u32 phy_addr, + u32 regnum, u16 *val) { u32 ret;
- ret = phy_setup_op(dev, phy_addr, regnum, - ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val); + ret = phy_setup_op(priv, phy_addr, regnum, + ZYNQ_GEM_PHYMNTNC_OP_R_MASK, val);
if (!ret) debug("%s: phy_addr %d, regnum 0x%x, val 0x%x\n", __func__, @@ -231,13 +233,14 @@ static u32 phyread(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 *val) return ret; }
-static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) +static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr, + u32 regnum, u16 data) { debug("%s: phy_addr %d, regnum 0x%x, data 0x%x\n", __func__, phy_addr, regnum, data);
- return phy_setup_op(dev, phy_addr, regnum, - ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); + return phy_setup_op(priv, phy_addr, regnum, + ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); }
static int phy_detection(struct eth_device *dev) @@ -247,7 +250,7 @@ static int phy_detection(struct eth_device *dev) struct zynq_gem_priv *priv = dev->priv;
if (priv->phyaddr != -1) { - phyread(dev, priv->phyaddr, PHY_DETECT_REG, &phyreg); + phyread(priv, priv->phyaddr, PHY_DETECT_REG, &phyreg); if ((phyreg != 0xFFFF) && ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { /* Found a valid PHY address */ @@ -265,7 +268,7 @@ static int phy_detection(struct eth_device *dev) if (priv->phyaddr == -1) { /* detect the PHY address */ for (i = 31; i >= 0; i--) { - phyread(dev, i, PHY_DETECT_REG, &phyreg); + phyread(priv, i, PHY_DETECT_REG, &phyreg); if ((phyreg != 0xFFFF) && ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { /* Found a valid PHY address */ @@ -561,9 +564,10 @@ static int zynq_gem_miiphyread(const char *devname, uchar addr, uchar reg, ushort *val) { struct eth_device *dev = eth_get_dev(); + struct zynq_gem_priv *priv = dev->priv; int ret;
- ret = phyread(dev, addr, reg, val); + ret = phyread(priv, addr, reg, val); debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, *val); return ret; } @@ -572,9 +576,10 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr, uchar reg, ushort val) { struct eth_device *dev = eth_get_dev(); + struct zynq_gem_priv *priv = dev->priv;
debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val); - return phywrite(dev, addr, reg, val); + return phywrite(priv, addr, reg, val); }
int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, @@ -620,6 +625,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, sprintf(dev->name, "Gem.%lx", base_addr);
dev->iobase = base_addr; + priv->iobase = (struct zynq_gem_regs *)base_addr;
dev->init = zynq_gem_init; dev->halt = zynq_gem_halt;
Resort code to use priv->phydev variable directly. It will simplify move to DM.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 65ea5deb23c6..8f3fe9130066 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -315,7 +315,6 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) u32 i; int ret; unsigned long clk_rate = 0; - struct phy_device *phydev; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; @@ -394,23 +393,21 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) return ret; }
- /* interface - look at tsec */ - phydev = phy_connect(priv->bus, priv->phyaddr, dev, - priv->interface); + priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, + priv->interface);
- phydev->supported = supported | ADVERTISED_Pause | - ADVERTISED_Asym_Pause; - phydev->advertising = phydev->supported; - priv->phydev = phydev; - phy_config(phydev); - phy_startup(phydev); + priv->phydev->supported = supported | ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + priv->phydev->advertising = priv->phydev->supported; + phy_config(priv->phydev); + phy_startup(priv->phydev);
- if (!phydev->link) { - printf("%s: No link.\n", phydev->dev->name); + if (!priv->phydev->link) { + printf("%s: No link.\n", priv->phydev->dev->name); return -1; }
- switch (phydev->speed) { + switch (priv->phydev->speed) { case SPEED_1000: writel(ZYNQ_GEM_NWCFG_INIT | ZYNQ_GEM_NWCFG_SPEED1000, ®s->nwcfg);
Move phy init code out of zynq_gem_init. DM drivers are normally calling this code from probe function.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 47 ++++++++++++++++++++++++++++++----------------- 1 file changed, 30 insertions(+), 17 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 8f3fe9130066..86bb75905071 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -310,15 +310,10 @@ static int zynq_gem_setup_mac(struct eth_device *dev) return 0; }
-static int zynq_gem_init(struct eth_device *dev, bd_t * bis) +static int zynq_phy_init(struct eth_device *dev) { - u32 i; int ret; - unsigned long clk_rate = 0; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; - struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; - struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -326,6 +321,33 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
+ ret = phy_detection(dev); + if (ret) { + printf("GEM PHY init failed\n"); + return ret; + } + + priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, + priv->interface); + + priv->phydev->supported = supported | ADVERTISED_Pause | + ADVERTISED_Asym_Pause; + priv->phydev->advertising = priv->phydev->supported; + phy_config(priv->phydev); + + return 0; +} + +static int zynq_gem_init(struct eth_device *dev, bd_t *bis) +{ + u32 i; + int ret; + unsigned long clk_rate = 0; + struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev->priv; + struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; + struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2]; + if (!priv->init) { /* Disable all interrupts */ writel(0xFFFFFFFF, ®s->idr); @@ -387,19 +409,10 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) priv->init++; }
- ret = phy_detection(dev); - if (ret) { - printf("GEM PHY init failed\n"); + ret = zynq_phy_init(dev); + if (ret) return ret; - } - - priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, - priv->interface);
- priv->phydev->supported = supported | ADVERTISED_Pause | - ADVERTISED_Asym_Pause; - priv->phydev->advertising = priv->phydev->supported; - phy_config(priv->phydev); phy_startup(priv->phydev);
if (!priv->phydev->link) {
Check return value.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 86bb75905071..d5540ec2155c 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -329,6 +329,8 @@ static int zynq_phy_init(struct eth_device *dev)
priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); + if (!priv->phydev) + return -ENODEV;
priv->phydev->supported = supported | ADVERTISED_Pause | ADVERTISED_Asym_Pause;
Enable access to MDIO before zynq_gem_init is called. It enables read information about phy earlier.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index d5540ec2155c..9ce1221e8d0f 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -314,6 +314,7 @@ static int zynq_phy_init(struct eth_device *dev) { int ret; struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -321,6 +322,9 @@ static int zynq_phy_init(struct eth_device *dev) SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
+ /* Enable only MDIO bus */ + writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, ®s->nwctrl); + ret = phy_detection(dev); if (ret) { printf("GEM PHY init failed\n"); @@ -343,7 +347,6 @@ static int zynq_phy_init(struct eth_device *dev) static int zynq_gem_init(struct eth_device *dev, bd_t *bis) { u32 i; - int ret; unsigned long clk_rate = 0; struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; struct zynq_gem_priv *priv = dev->priv; @@ -411,10 +414,6 @@ static int zynq_gem_init(struct eth_device *dev, bd_t *bis) priv->init++; }
- ret = zynq_phy_init(dev); - if (ret) - return ret; - phy_startup(priv->phydev);
if (!priv->phydev->link) { @@ -597,6 +596,7 @@ static int zynq_gem_miiphy_write(const char *devname, uchar addr, int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, int phy_addr, u32 emio) { + int ret; struct eth_device *dev; struct zynq_gem_priv *priv; void *bd_space; @@ -650,6 +650,10 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, miiphy_register(dev->name, zynq_gem_miiphyread, zynq_gem_miiphy_write); priv->bus = miiphy_get_dev_by_name(dev->name);
+ ret = zynq_phy_init(dev); + if (ret) + return ret; + return 1; }
This function was used for OF init before DM. Remove this function as the part of move to DM.
Signed-off-by: Michal Simek michal.simek@xilinx.com Reviewed-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
drivers/net/zynq_gem.c | 42 ------------------------------------------ include/netdev.h | 1 - 2 files changed, 43 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 9ce1221e8d0f..a569c77aeb60 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -13,8 +13,6 @@ #include <net.h> #include <netdev.h> #include <config.h> -#include <fdtdec.h> -#include <libfdt.h> #include <malloc.h> #include <asm/io.h> #include <phy.h> @@ -656,43 +654,3 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
return 1; } - -#if CONFIG_IS_ENABLED(OF_CONTROL) -int zynq_gem_of_init(const void *blob) -{ - int offset = 0; - u32 ret = 0; - u32 reg, phy_reg; - - debug("ZYNQ GEM: Initialization\n"); - - do { - offset = fdt_node_offset_by_compatible(blob, offset, - "xlnx,ps7-ethernet-1.00.a"); - if (offset != -1) { - reg = fdtdec_get_addr(blob, offset, "reg"); - if (reg != FDT_ADDR_T_NONE) { - offset = fdtdec_lookup_phandle(blob, offset, - "phy-handle"); - if (offset != -1) - phy_reg = fdtdec_get_addr(blob, offset, - "reg"); - else - phy_reg = 0; - - debug("ZYNQ GEM: addr %x, phyaddr %x\n", - reg, phy_reg); - - ret |= zynq_gem_initialize(NULL, reg, - phy_reg, 0); - - } else { - debug("ZYNQ GEM: Can't get base address\n"); - return -1; - } - } - } while (offset != -1); - - return ret; -} -#endif diff --git a/include/netdev.h b/include/netdev.h index 28eab4640760..5c6ae5b5624e 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -87,7 +87,6 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_of_init(const void *blob); int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, int phy_addr, u32 emio); /*
Sync it with write function.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index a569c77aeb60..4e93707c7ab1 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -569,7 +569,7 @@ static void zynq_gem_halt(struct eth_device *dev) ZYNQ_GEM_NWCTRL_TXEN_MASK, 0); }
-static int zynq_gem_miiphyread(const char *devname, uchar addr, +static int zynq_gem_miiphy_read(const char *devname, uchar addr, uchar reg, ushort *val) { struct eth_device *dev = eth_get_dev(); @@ -645,7 +645,7 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
eth_register(dev);
- miiphy_register(dev->name, zynq_gem_miiphyread, zynq_gem_miiphy_write); + miiphy_register(dev->name, zynq_gem_miiphy_read, zynq_gem_miiphy_write); priv->bus = miiphy_get_dev_by_name(dev->name);
ret = zynq_phy_init(dev);
- Enable DM_ETH by default for Zynq and ZynqMP - Remove board_eth_init code - Change miiphy_read function to return value instead of error code based on DM requirement - Do not enable EMIO DT support by default
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: - Remove accidentially added mmc code - Sort dm.h header - add platdata_auto_alloc_size - Read iobase from pdata instead of via gev_get_addr - Check positive return value from fdtdec_lookup_phandles instead of -1
arch/arm/Kconfig | 2 + board/xilinx/zynq/board.c | 13 ---- board/xilinx/zynqmp/zynqmp.c | 25 ------- drivers/net/zynq_gem.c | 167 +++++++++++++++++++++++++----------------- include/configs/zynq-common.h | 6 -- include/netdev.h | 2 - 6 files changed, 100 insertions(+), 115 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6542c38304a5..f989ab521469 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -551,6 +551,7 @@ config ARCH_ZYNQ select OF_CONTROL select SPL_OF_CONTROL select DM + select DM_ETH select SPL_DM select DM_SPI select DM_SERIAL @@ -562,6 +563,7 @@ config ARCH_ZYNQMP select ARM64 select DM select OF_CONTROL + select DM_ETH select DM_SERIAL
config TEGRA diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 237f2c2a2bf6..572b1468bf51 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -119,19 +119,6 @@ int board_eth_init(bd_t *bis) ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, txpp, rxpp); #endif - -#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, - CONFIG_ZYNQ_GEM_PHY_ADDR0, - CONFIG_ZYNQ_GEM_EMIO0); -# endif -# if defined(CONFIG_ZYNQ_GEM1) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1, - CONFIG_ZYNQ_GEM_PHY_ADDR1, - CONFIG_ZYNQ_GEM_EMIO1); -# endif -#endif return ret; }
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d105bb4de32f..51dc30f90d7e 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -65,31 +65,6 @@ void scsi_init(void) } #endif
-int board_eth_init(bd_t *bis) -{ - u32 ret = 0; - -#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0, - CONFIG_ZYNQ_GEM_PHY_ADDR0, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM1) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1, - CONFIG_ZYNQ_GEM_PHY_ADDR1, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM2) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR2, - CONFIG_ZYNQ_GEM_PHY_ADDR2, 0); -# endif -# if defined(CONFIG_ZYNQ_GEM3) - ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR3, - CONFIG_ZYNQ_GEM_PHY_ADDR3, 0); -# endif -#endif - return ret; -} - #ifdef CONFIG_CMD_MMC int board_mmc_init(bd_t *bd) { diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 4e93707c7ab1..d800f58c0229 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -10,6 +10,7 @@ */
#include <common.h> +#include <dm.h> #include <net.h> #include <netdev.h> #include <config.h> @@ -23,6 +24,8 @@ #include <asm/arch/sys_proto.h> #include <asm-generic/errno.h>
+DECLARE_GLOBAL_DATA_PTR; + #if !defined(CONFIG_PHYLIB) # error XILINX_GEM_ETHERNET requires PHYLIB #endif @@ -241,7 +244,7 @@ static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr, ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); }
-static int phy_detection(struct eth_device *dev) +static int phy_detection(struct udevice *dev) { int i; u16 phyreg; @@ -280,20 +283,22 @@ static int phy_detection(struct eth_device *dev) return -1; }
-static int zynq_gem_setup_mac(struct eth_device *dev) +static int zynq_gem_setup_mac(struct udevice *dev) { u32 i, macaddrlow, macaddrhigh; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct eth_pdata *pdata = dev_get_platdata(dev); + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase;
/* Set the MAC bits [31:0] in BOT */ - macaddrlow = dev->enetaddr[0]; - macaddrlow |= dev->enetaddr[1] << 8; - macaddrlow |= dev->enetaddr[2] << 16; - macaddrlow |= dev->enetaddr[3] << 24; + macaddrlow = pdata->enetaddr[0]; + macaddrlow |= pdata->enetaddr[1] << 8; + macaddrlow |= pdata->enetaddr[2] << 16; + macaddrlow |= pdata->enetaddr[3] << 24;
/* Set MAC bits [47:32] in TOP */ - macaddrhigh = dev->enetaddr[4]; - macaddrhigh |= dev->enetaddr[5] << 8; + macaddrhigh = pdata->enetaddr[4]; + macaddrhigh |= pdata->enetaddr[5] << 8;
for (i = 0; i < 4; i++) { writel(0, ®s->laddr[i][LADDR_LOW]); @@ -308,11 +313,11 @@ static int zynq_gem_setup_mac(struct eth_device *dev) return 0; }
-static int zynq_phy_init(struct eth_device *dev) +static int zynq_phy_init(struct udevice *dev) { int ret; - struct zynq_gem_priv *priv = dev->priv; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | @@ -342,12 +347,12 @@ static int zynq_phy_init(struct eth_device *dev) return 0; }
-static int zynq_gem_init(struct eth_device *dev, bd_t *bis) +static int zynq_gem_init(struct udevice *dev) { u32 i; unsigned long clk_rate = 0; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2];
@@ -437,7 +442,7 @@ static int zynq_gem_init(struct eth_device *dev, bd_t *bis)
/* Change the rclk and clk only not using EMIO interface */ if (!priv->emio) - zynq_slcr_gem_clk_setup(dev->iobase != + zynq_slcr_gem_clk_setup((ulong)priv->iobase != ZYNQ_GEM_BASEADDR0, clk_rate);
setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | @@ -473,11 +478,11 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, return -ETIMEDOUT; }
-static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) +static int zynq_gem_send(struct udevice *dev, void *ptr, int len) { u32 addr, size; - struct zynq_gem_priv *priv = dev->priv; - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *current_bd = &priv->tx_bd[1];
/* Setup Tx BD */ @@ -518,10 +523,10 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) }
/* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */ -static int zynq_gem_recv(struct eth_device *dev) +static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) { int frame_len; - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current]; struct emac_bd *first_bd;
@@ -561,54 +566,41 @@ static int zynq_gem_recv(struct eth_device *dev) return frame_len; }
-static void zynq_gem_halt(struct eth_device *dev) +static void zynq_gem_halt(struct udevice *dev) { - struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase; + struct zynq_gem_priv *priv = dev_get_priv(dev); + struct zynq_gem_regs *regs = priv->iobase;
clrsetbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK, 0); }
-static int zynq_gem_miiphy_read(const char *devname, uchar addr, - uchar reg, ushort *val) +static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr, + int devad, int reg) { - struct eth_device *dev = eth_get_dev(); - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = bus->priv; int ret; + u16 val;
- ret = phyread(priv, addr, reg, val); - debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, *val); - return ret; + ret = phyread(priv, addr, reg, &val); + debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret); + return val; }
-static int zynq_gem_miiphy_write(const char *devname, uchar addr, - uchar reg, ushort val) +static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) { - struct eth_device *dev = eth_get_dev(); - struct zynq_gem_priv *priv = dev->priv; + struct zynq_gem_priv *priv = bus->priv;
- debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val); - return phywrite(priv, addr, reg, val); + debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, value); + return phywrite(priv, addr, reg, value); }
-int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, - int phy_addr, u32 emio) +static int zynq_gem_probe(struct udevice *dev) { - int ret; - struct eth_device *dev; - struct zynq_gem_priv *priv; void *bd_space; - - dev = calloc(1, sizeof(*dev)); - if (dev == NULL) - return -1; - - dev->priv = calloc(1, sizeof(struct zynq_gem_priv)); - if (dev->priv == NULL) { - free(dev); - return -1; - } - priv = dev->priv; + struct zynq_gem_priv *priv = dev_get_priv(dev); + int ret;
/* Align rxbuffers to ARCH_DMA_MINALIGN */ priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN); @@ -623,8 +615,11 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->tx_bd = (struct emac_bd *)bd_space; priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
- priv->phyaddr = phy_addr; - priv->emio = emio; + priv->bus = mdio_alloc(); + priv->bus->read = zynq_gem_miiphy_read; + priv->bus->write = zynq_gem_miiphy_write; + priv->bus->priv = priv; + strcpy(priv->bus->name, "gem");
#ifndef CONFIG_ZYNQ_GEM_INTERFACE priv->interface = PHY_INTERFACE_MODE_MII; @@ -632,25 +627,59 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; #endif
- sprintf(dev->name, "Gem.%lx", base_addr); + ret = mdio_register(priv->bus); + if (ret) + return ret;
- dev->iobase = base_addr; - priv->iobase = (struct zynq_gem_regs *)base_addr; + zynq_phy_init(dev);
- dev->init = zynq_gem_init; - dev->halt = zynq_gem_halt; - dev->send = zynq_gem_send; - dev->recv = zynq_gem_recv; - dev->write_hwaddr = zynq_gem_setup_mac; + return 0; +}
- eth_register(dev); +static const struct eth_ops zynq_gem_ops = { + .start = zynq_gem_init, + .send = zynq_gem_send, + .recv = zynq_gem_recv, + .stop = zynq_gem_halt, + .write_hwaddr = zynq_gem_setup_mac, +};
- miiphy_register(dev->name, zynq_gem_miiphy_read, zynq_gem_miiphy_write); - priv->bus = miiphy_get_dev_by_name(dev->name); +static int zynq_gem_ofdata_to_platdata(struct udevice *dev) +{ + struct eth_pdata *pdata = dev_get_platdata(dev); + struct zynq_gem_priv *priv = dev_get_priv(dev); + int offset = 0;
- ret = zynq_phy_init(dev); - if (ret) - return ret; + pdata->iobase = (phys_addr_t)dev_get_addr(dev); + priv->iobase = (struct zynq_gem_regs *)pdata->iobase; + /* Hardcode for now */ + priv->emio = 0; + + offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset, + "phy-handle"); + if (offset > 0) + priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
- return 1; + printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase, + priv->phyaddr); + + return 0; } + +static const struct udevice_id zynq_gem_ids[] = { + { .compatible = "cdns,zynqmp-gem" }, + { .compatible = "cdns,zynq-gem" }, + { .compatible = "cdns,gem" }, + { } +}; + +U_BOOT_DRIVER(zynq_gem) = { + .name = "zynq_gem", + .id = UCLASS_ETH, + .of_match = zynq_gem_ids, + .ofdata_to_platdata = zynq_gem_ofdata_to_platdata, + .probe = zynq_gem_probe, + .ops = &zynq_gem_ops, + .priv_auto_alloc_size = sizeof(struct zynq_gem_priv), + .platdata_auto_alloc_size = sizeof(struct eth_pdata), +}; diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5db501188b18..faff0e9b70f7 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -56,12 +56,6 @@ # define CONFIG_BOOTP_GATEWAY # define CONFIG_BOOTP_HOSTNAME # define CONFIG_BOOTP_MAY_FAIL -# if !defined(CONFIG_ZYNQ_GEM_EMIO0) -# define CONFIG_ZYNQ_GEM_EMIO0 0 -# endif -# if !defined(CONFIG_ZYNQ_GEM_EMIO1) -# define CONFIG_ZYNQ_GEM_EMIO1 0 -# endif #endif
/* SPI */ diff --git a/include/netdev.h b/include/netdev.h index 5c6ae5b5624e..de74b9a534b1 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -87,8 +87,6 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, - int phy_addr, u32 emio); /* * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface * exported by a public hader file, we need a global definition at this point.
Hi Michal,
On Wed, Dec 2, 2015 at 7:36 PM, Michal Simek michal.simek@xilinx.com wrote:
- Enable DM_ETH by default for Zynq and ZynqMP
- Remove board_eth_init code
- Change miiphy_read function to return value instead of error code based on DM requirement
- Do not enable EMIO DT support by default
Signed-off-by: Michal Simek michal.simek@xilinx.com
Changes in v2:
- Remove accidentially added mmc code
- Sort dm.h header
- add platdata_auto_alloc_size
- Read iobase from pdata instead of via gev_get_addr
- Check positive return value from fdtdec_lookup_phandles instead of -1
arch/arm/Kconfig | 2 + board/xilinx/zynq/board.c | 13 ---- board/xilinx/zynqmp/zynqmp.c | 25 ------- drivers/net/zynq_gem.c | 167 +++++++++++++++++++++++++----------------- include/configs/zynq-common.h | 6 -- include/netdev.h | 2 - 6 files changed, 100 insertions(+), 115 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 6542c38304a5..f989ab521469 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -551,6 +551,7 @@ config ARCH_ZYNQ select OF_CONTROL select SPL_OF_CONTROL select DM
select DM_ETH select SPL_DM select DM_SPI select DM_SERIAL@@ -562,6 +563,7 @@ config ARCH_ZYNQMP select ARM64 select DM select OF_CONTROL
select DM_ETH select DM_SERIALconfig TEGRA diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c index 237f2c2a2bf6..572b1468bf51 100644 --- a/board/xilinx/zynq/board.c +++ b/board/xilinx/zynq/board.c @@ -119,19 +119,6 @@ int board_eth_init(bd_t *bis) ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR, txpp, rxpp); #endif
-#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,CONFIG_ZYNQ_GEM_PHY_ADDR0,CONFIG_ZYNQ_GEM_EMIO0);-# endif -# if defined(CONFIG_ZYNQ_GEM1)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,CONFIG_ZYNQ_GEM_PHY_ADDR1,CONFIG_ZYNQ_GEM_EMIO1);-# endif -#endif return ret; }
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index d105bb4de32f..51dc30f90d7e 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -65,31 +65,6 @@ void scsi_init(void) } #endif
-int board_eth_init(bd_t *bis) -{
u32 ret = 0;-#if defined(CONFIG_ZYNQ_GEM) -# if defined(CONFIG_ZYNQ_GEM0)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,CONFIG_ZYNQ_GEM_PHY_ADDR0, 0);-# endif -# if defined(CONFIG_ZYNQ_GEM1)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR1,CONFIG_ZYNQ_GEM_PHY_ADDR1, 0);-# endif -# if defined(CONFIG_ZYNQ_GEM2)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR2,CONFIG_ZYNQ_GEM_PHY_ADDR2, 0);-# endif -# if defined(CONFIG_ZYNQ_GEM3)
ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR3,CONFIG_ZYNQ_GEM_PHY_ADDR3, 0);-# endif -#endif
return ret;-}
#ifdef CONFIG_CMD_MMC int board_mmc_init(bd_t *bd) { diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index 4e93707c7ab1..d800f58c0229 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -10,6 +10,7 @@ */
#include <common.h> +#include <dm.h> #include <net.h> #include <netdev.h> #include <config.h> @@ -23,6 +24,8 @@ #include <asm/arch/sys_proto.h> #include <asm-generic/errno.h>
+DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_PHYLIB) # error XILINX_GEM_ETHERNET requires PHYLIB #endif @@ -241,7 +244,7 @@ static u32 phywrite(struct zynq_gem_priv *priv, u32 phy_addr, ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); }
-static int phy_detection(struct eth_device *dev) +static int phy_detection(struct udevice *dev) { int i; u16 phyreg; @@ -280,20 +283,22 @@ static int phy_detection(struct eth_device *dev) return -1; }
-static int zynq_gem_setup_mac(struct eth_device *dev) +static int zynq_gem_setup_mac(struct udevice *dev) { u32 i, macaddrlow, macaddrhigh;
struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
struct eth_pdata *pdata = dev_get_platdata(dev);struct zynq_gem_priv *priv = dev_get_priv(dev);struct zynq_gem_regs *regs = priv->iobase; /* Set the MAC bits [31:0] in BOT */
macaddrlow = dev->enetaddr[0];macaddrlow |= dev->enetaddr[1] << 8;macaddrlow |= dev->enetaddr[2] << 16;macaddrlow |= dev->enetaddr[3] << 24;
macaddrlow = pdata->enetaddr[0];macaddrlow |= pdata->enetaddr[1] << 8;macaddrlow |= pdata->enetaddr[2] << 16;macaddrlow |= pdata->enetaddr[3] << 24; /* Set MAC bits [47:32] in TOP */
macaddrhigh = dev->enetaddr[4];macaddrhigh |= dev->enetaddr[5] << 8;
macaddrhigh = pdata->enetaddr[4];macaddrhigh |= pdata->enetaddr[5] << 8; for (i = 0; i < 4; i++) { writel(0, ®s->laddr[i][LADDR_LOW]);@@ -308,11 +313,11 @@ static int zynq_gem_setup_mac(struct eth_device *dev) return 0; }
-static int zynq_phy_init(struct eth_device *dev) +static int zynq_phy_init(struct udevice *dev) { int ret;
struct zynq_gem_priv *priv = dev->priv;struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
struct zynq_gem_priv *priv = dev_get_priv(dev);struct zynq_gem_regs *regs = priv->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half |@@ -342,12 +347,12 @@ static int zynq_phy_init(struct eth_device *dev) return 0; }
-static int zynq_gem_init(struct eth_device *dev, bd_t *bis) +static int zynq_gem_init(struct udevice *dev) { u32 i; unsigned long clk_rate = 0;
struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;struct zynq_gem_priv *priv = dev->priv;
struct zynq_gem_priv *priv = dev_get_priv(dev);struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *dummy_tx_bd = &priv->tx_bd[TX_FREE_DESC]; struct emac_bd *dummy_rx_bd = &priv->tx_bd[TX_FREE_DESC + 2];@@ -437,7 +442,7 @@ static int zynq_gem_init(struct eth_device *dev, bd_t *bis)
/* Change the rclk and clk only not using EMIO interface */ if (!priv->emio)
zynq_slcr_gem_clk_setup(dev->iobase !=
zynq_slcr_gem_clk_setup((ulong)priv->iobase != ZYNQ_GEM_BASEADDR0, clk_rate); setbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK |@@ -473,11 +478,11 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, return -ETIMEDOUT; }
-static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) +static int zynq_gem_send(struct udevice *dev, void *ptr, int len) { u32 addr, size;
struct zynq_gem_priv *priv = dev->priv;struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
struct zynq_gem_priv *priv = dev_get_priv(dev);struct zynq_gem_regs *regs = priv->iobase; struct emac_bd *current_bd = &priv->tx_bd[1]; /* Setup Tx BD */@@ -518,10 +523,10 @@ static int zynq_gem_send(struct eth_device *dev, void *ptr, int len) }
/* Do not check frame_recd flag in rx_status register 0x20 - just poll BD */ -static int zynq_gem_recv(struct eth_device *dev) +static int zynq_gem_recv(struct udevice *dev, int flags, uchar **packetp) { int frame_len;
struct zynq_gem_priv *priv = dev->priv;
struct zynq_gem_priv *priv = dev_get_priv(dev); struct emac_bd *current_bd = &priv->rx_bd[priv->rxbd_current]; struct emac_bd *first_bd;@@ -561,54 +566,41 @@ static int zynq_gem_recv(struct eth_device *dev) return frame_len; }
-static void zynq_gem_halt(struct eth_device *dev) +static void zynq_gem_halt(struct udevice *dev) {
struct zynq_gem_regs *regs = (struct zynq_gem_regs *)dev->iobase;
struct zynq_gem_priv *priv = dev_get_priv(dev);struct zynq_gem_regs *regs = priv->iobase; clrsetbits_le32(®s->nwctrl, ZYNQ_GEM_NWCTRL_RXEN_MASK | ZYNQ_GEM_NWCTRL_TXEN_MASK, 0);}
-static int zynq_gem_miiphy_read(const char *devname, uchar addr,
uchar reg, ushort *val)+static int zynq_gem_miiphy_read(struct mii_dev *bus, int addr,
int devad, int reg){
struct eth_device *dev = eth_get_dev();struct zynq_gem_priv *priv = dev->priv;
struct zynq_gem_priv *priv = bus->priv; int ret;u16 val;
ret = phyread(priv, addr, reg, val);debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, *val);return ret;
ret = phyread(priv, addr, reg, &val);debug("%s 0x%x, 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val, ret);return val;}
-static int zynq_gem_miiphy_write(const char *devname, uchar addr,
uchar reg, ushort val)+static int zynq_gem_miiphy_write(struct mii_dev *bus, int addr, int devad,
int reg, u16 value){
struct eth_device *dev = eth_get_dev();struct zynq_gem_priv *priv = dev->priv;
struct zynq_gem_priv *priv = bus->priv;
debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, val);return phywrite(priv, addr, reg, val);
debug("%s 0x%x, 0x%x, 0x%x\n", __func__, addr, reg, value);return phywrite(priv, addr, reg, value);}
-int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
int phy_addr, u32 emio)+static int zynq_gem_probe(struct udevice *dev) {
int ret;struct eth_device *dev;struct zynq_gem_priv *priv; void *bd_space;dev = calloc(1, sizeof(*dev));if (dev == NULL)return -1;dev->priv = calloc(1, sizeof(struct zynq_gem_priv));if (dev->priv == NULL) {free(dev);return -1;}priv = dev->priv;
struct zynq_gem_priv *priv = dev_get_priv(dev);int ret; /* Align rxbuffers to ARCH_DMA_MINALIGN */ priv->rxbuffers = memalign(ARCH_DMA_MINALIGN, RX_BUF * PKTSIZE_ALIGN);@@ -623,8 +615,11 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->tx_bd = (struct emac_bd *)bd_space; priv->rx_bd = (struct emac_bd *)((ulong)bd_space + BD_SEPRN_SPACE);
priv->phyaddr = phy_addr;priv->emio = emio;
priv->bus = mdio_alloc();priv->bus->read = zynq_gem_miiphy_read;priv->bus->write = zynq_gem_miiphy_write;priv->bus->priv = priv;strcpy(priv->bus->name, "gem");#ifndef CONFIG_ZYNQ_GEM_INTERFACE priv->interface = PHY_INTERFACE_MODE_MII; @@ -632,25 +627,59 @@ int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr, priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; #endif
sprintf(dev->name, "Gem.%lx", base_addr);
ret = mdio_register(priv->bus);if (ret)return ret;
dev->iobase = base_addr;priv->iobase = (struct zynq_gem_regs *)base_addr;
zynq_phy_init(dev);
dev->init = zynq_gem_init;dev->halt = zynq_gem_halt;dev->send = zynq_gem_send;dev->recv = zynq_gem_recv;dev->write_hwaddr = zynq_gem_setup_mac;
return 0;+}
eth_register(dev);+static const struct eth_ops zynq_gem_ops = {
.start = zynq_gem_init,.send = zynq_gem_send,.recv = zynq_gem_recv,.stop = zynq_gem_halt,.write_hwaddr = zynq_gem_setup_mac,+};
miiphy_register(dev->name, zynq_gem_miiphy_read, zynq_gem_miiphy_write);priv->bus = miiphy_get_dev_by_name(dev->name);+static int zynq_gem_ofdata_to_platdata(struct udevice *dev) +{
struct eth_pdata *pdata = dev_get_platdata(dev);struct zynq_gem_priv *priv = dev_get_priv(dev);int offset = 0;
ret = zynq_phy_init(dev);if (ret)return ret;
pdata->iobase = (phys_addr_t)dev_get_addr(dev);priv->iobase = (struct zynq_gem_regs *)pdata->iobase;/* Hardcode for now */priv->emio = 0;offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,"phy-handle");if (offset > 0)priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
I don't see where is this priv->phyaddr used in this driver?
return 1;
printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase,priv->phyaddr);return 0;}
+static const struct udevice_id zynq_gem_ids[] = {
{ .compatible = "cdns,zynqmp-gem" },{ .compatible = "cdns,zynq-gem" },{ .compatible = "cdns,gem" },{ }+};
+U_BOOT_DRIVER(zynq_gem) = {
.name = "zynq_gem",.id = UCLASS_ETH,.of_match = zynq_gem_ids,.ofdata_to_platdata = zynq_gem_ofdata_to_platdata,.probe = zynq_gem_probe,
Please add .remove function, otherwise there will be memory leak when removing the device. See designware.c for example.
.ops = &zynq_gem_ops,.priv_auto_alloc_size = sizeof(struct zynq_gem_priv),.platdata_auto_alloc_size = sizeof(struct eth_pdata),+}; diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 5db501188b18..faff0e9b70f7 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -56,12 +56,6 @@ # define CONFIG_BOOTP_GATEWAY # define CONFIG_BOOTP_HOSTNAME # define CONFIG_BOOTP_MAY_FAIL -# if !defined(CONFIG_ZYNQ_GEM_EMIO0) -# define CONFIG_ZYNQ_GEM_EMIO0 0 -# endif -# if !defined(CONFIG_ZYNQ_GEM_EMIO1) -# define CONFIG_ZYNQ_GEM_EMIO1 0 -# endif #endif
/* SPI */ diff --git a/include/netdev.h b/include/netdev.h index 5c6ae5b5624e..de74b9a534b1 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -87,8 +87,6 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_initialize(bd_t *bis, phys_addr_t base_addr,
int phy_addr, u32 emio);/*
- As long as the Xilinx xps_ll_temac ethernet driver has not its own interface
- exported by a public hader file, we need a global definition at this point.
--
Regards, Bin
On 2.12.2015 14:16, Bin Meng wrote:
Hi Michal,
On Wed, Dec 2, 2015 at 7:36 PM, Michal Simek michal.simek@xilinx.com wrote:
...
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,"phy-handle");if (offset > 0)priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);I don't see where is this priv->phyaddr used in this driver?
phy_detection function called from zynq_phy_init/
return 1;
printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase,priv->phyaddr);return 0;}
+static const struct udevice_id zynq_gem_ids[] = {
{ .compatible = "cdns,zynqmp-gem" },{ .compatible = "cdns,zynq-gem" },{ .compatible = "cdns,gem" },{ }+};
+U_BOOT_DRIVER(zynq_gem) = {
.name = "zynq_gem",.id = UCLASS_ETH,.of_match = zynq_gem_ids,.ofdata_to_platdata = zynq_gem_ofdata_to_platdata,.probe = zynq_gem_probe,Please add .remove function, otherwise there will be memory leak when removing the device. See designware.c for example.
No problem to do it. It will be almost c&p from that driver. Do we have any way how to detect these leaks?
I have never tried to remove devices. How to do it?
Thanks, Michal
Hi Michal,
On Wed, Dec 2, 2015 at 9:51 PM, Michal Simek michal.simek@xilinx.com wrote:
On 2.12.2015 14:16, Bin Meng wrote:
Hi Michal,
On Wed, Dec 2, 2015 at 7:36 PM, Michal Simek michal.simek@xilinx.com wrote:
...
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,"phy-handle");if (offset > 0)priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);I don't see where is this priv->phyaddr used in this driver?
phy_detection function called from zynq_phy_init/
return 1;
printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase,priv->phyaddr);return 0;}
+static const struct udevice_id zynq_gem_ids[] = {
{ .compatible = "cdns,zynqmp-gem" },{ .compatible = "cdns,zynq-gem" },{ .compatible = "cdns,gem" },{ }+};
+U_BOOT_DRIVER(zynq_gem) = {
.name = "zynq_gem",.id = UCLASS_ETH,.of_match = zynq_gem_ids,.ofdata_to_platdata = zynq_gem_ofdata_to_platdata,.probe = zynq_gem_probe,Please add .remove function, otherwise there will be memory leak when removing the device. See designware.c for example.
No problem to do it. It will be almost c&p from that driver. Do we have any way how to detect these leaks?
None that I am aware of.
I have never tried to remove devices. How to do it?
This can be tested by adding test codes to call device_remove(dev).
Regards, Bin
Hi Michal,
On 2 December 2015 at 22:00, Bin Meng bmeng.cn@gmail.com wrote:
Hi Michal,
On Wed, Dec 2, 2015 at 9:51 PM, Michal Simek michal.simek@xilinx.com wrote:
On 2.12.2015 14:16, Bin Meng wrote:
Hi Michal,
On Wed, Dec 2, 2015 at 7:36 PM, Michal Simek michal.simek@xilinx.com wrote:
...
offset = fdtdec_lookup_phandle(gd->fdt_blob, dev->of_offset,"phy-handle");if (offset > 0)priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);I don't see where is this priv->phyaddr used in this driver?
phy_detection function called from zynq_phy_init/
return 1;
printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase,priv->phyaddr);return 0;}
+static const struct udevice_id zynq_gem_ids[] = {
{ .compatible = "cdns,zynqmp-gem" },{ .compatible = "cdns,zynq-gem" },{ .compatible = "cdns,gem" },{ }+};
+U_BOOT_DRIVER(zynq_gem) = {
.name = "zynq_gem",.id = UCLASS_ETH,.of_match = zynq_gem_ids,.ofdata_to_platdata = zynq_gem_ofdata_to_platdata,.probe = zynq_gem_probe,Please add .remove function, otherwise there will be memory leak when removing the device. See designware.c for example.
No problem to do it. It will be almost c&p from that driver. Do we have any way how to detect these leaks?
None that I am aware of.
I have never tried to remove devices. How to do it?
This can be tested by adding test codes to call device_remove(dev).
You could create a 'dm remove' command which operates on the full device path, if you like. It think that would be useful for testing.
Regards, Simon
Do not set interface via configs. Read information from DT.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
drivers/net/zynq_gem.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c index d800f58c0229..c9a588b517d2 100644 --- a/drivers/net/zynq_gem.c +++ b/drivers/net/zynq_gem.c @@ -621,12 +621,6 @@ static int zynq_gem_probe(struct udevice *dev) priv->bus->priv = priv; strcpy(priv->bus->name, "gem");
-#ifndef CONFIG_ZYNQ_GEM_INTERFACE - priv->interface = PHY_INTERFACE_MODE_MII; -#else - priv->interface = CONFIG_ZYNQ_GEM_INTERFACE; -#endif - ret = mdio_register(priv->bus); if (ret) return ret; @@ -649,6 +643,7 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) struct eth_pdata *pdata = dev_get_platdata(dev); struct zynq_gem_priv *priv = dev_get_priv(dev); int offset = 0; + const char *phy_mode;
pdata->iobase = (phys_addr_t)dev_get_addr(dev); priv->iobase = (struct zynq_gem_regs *)pdata->iobase; @@ -660,8 +655,17 @@ static int zynq_gem_ofdata_to_platdata(struct udevice *dev) if (offset > 0) priv->phyaddr = fdtdec_get_int(gd->fdt_blob, offset, "reg", 0);
- printf("ZYNQ GEM: %lx, phyaddr %d\n", (ulong)priv->iobase, - priv->phyaddr); + phy_mode = fdt_getprop(gd->fdt_blob, dev->of_offset, "phy-mode", NULL); + if (phy_mode) + pdata->phy_interface = phy_get_interface_by_name(phy_mode); + if (pdata->phy_interface == -1) { + debug("%s: Invalid PHY interface '%s'\n", __func__, phy_mode); + return -EINVAL; + } + priv->interface = pdata->phy_interface; + + printf("ZYNQ GEM: %lx, phyaddr %d, interface %s\n", (ulong)priv->iobase, + priv->phyaddr, phy_string_for_interface(priv->interface));
return 0; }
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
Changes in v2: None
configs/xilinx_zynqmp_ep_defconfig | 1 + configs/zynq_microzed_defconfig | 1 + configs/zynq_picozed_defconfig | 1 + configs/zynq_zc702_defconfig | 1 + configs/zynq_zc706_defconfig | 1 + configs/zynq_zc770_xm010_defconfig | 1 + configs/zynq_zc770_xm011_defconfig | 1 + configs/zynq_zc770_xm012_defconfig | 1 + configs/zynq_zc770_xm013_defconfig | 1 + configs/zynq_zed_defconfig | 1 + configs/zynq_zybo_defconfig | 1 + drivers/net/Kconfig | 6 ++++++ include/configs/xilinx_zynqmp.h | 4 +--- include/configs/xilinx_zynqmp_ep.h | 3 --- include/configs/zynq-common.h | 3 +-- include/configs/zynq_microzed.h | 3 --- include/configs/zynq_picozed.h | 3 --- include/configs/zynq_zc70x.h | 3 --- include/configs/zynq_zc770.h | 4 ---- include/configs/zynq_zed.h | 3 --- include/configs/zynq_zybo.h | 3 --- 21 files changed, 19 insertions(+), 27 deletions(-)
diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 79304c1fb121..22915f19bfbb 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -22,4 +22,5 @@ CONFIG_CMD_TIME=y CONFIG_CMD_TIMER=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_ZYNQ_GEM=y # CONFIG_REGEX is not set diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 0608d8a733cf..c68efc8f41af 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_picozed_defconfig b/configs/zynq_picozed_defconfig index d6f0ce388832..62eb79f630e3 100644 --- a/configs/zynq_picozed_defconfig +++ b/configs/zynq_picozed_defconfig @@ -9,3 +9,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 8318b94ecbb2..dd588aff72db 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -15,4 +15,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 533aff9a7531..2e525b42d42a 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 689d19e992da..6f2ad17985e1 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -18,5 +18,6 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm011_defconfig b/configs/zynq_zc770_xm011_defconfig index c7125c304ab8..d20b3edf5cb3 100644 --- a/configs/zynq_zc770_xm011_defconfig +++ b/configs/zynq_zc770_xm011_defconfig @@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index a8f28da11767..4e963a45e2cf 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -11,3 +11,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 6b2fd8ca4ebb..f2d8f14f8784 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -13,3 +13,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 4076c30707b1..2e7c68d6a49e 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -16,4 +16,5 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index c51049e664b1..6f0bd0b79c5e 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -12,6 +12,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_PHYLIB=y +CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y CONFIG_DEBUG_UART_BASE=0xe0001000 diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index a03a95d0fbff..6905cc02e392 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -101,4 +101,10 @@ config PCH_GBE This MAC is present in Intel Platform Controller Hub EG20T. It supports 10/100/1000 Mbps operation.
+config ZYNQ_GEM + depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) + bool "Xilinx Ethernet GEM" + help + This MAC is presetn in Xilinx Zynq and ZynqMP SoCs. + endif # NETDEVICES diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 6b8b9f83e9fd..a8aa9522b212 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -176,10 +176,8 @@ #define CONFIG_SYS_MAXARGS 64
/* Ethernet driver */ -#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) || \ - defined(CONFIG_ZYNQ_GEM2) || defined(CONFIG_ZYNQ_GEM3) +#if defined(CONFIG_ZYNQ_GEM) # define CONFIG_NET_MULTI -# define CONFIG_ZYNQ_GEM # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHYLIB diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 8bdb5c9c6d5c..e9b904bcdc38 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -15,9 +15,6 @@ #ifndef __CONFIG_ZYNQMP_EP_H #define __CONFIG_ZYNQMP_EP_H
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 - #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 #define CONFIG_ZYNQ_I2C0 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index faff0e9b70f7..d3d5470ad801 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -46,8 +46,7 @@ #define CONFIG_ZYNQ_GPIO
/* Ethernet driver */ -#if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) -# define CONFIG_ZYNQ_GEM +#if defined(CONFIG_ZYNQ_GEM) # define CONFIG_MII # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN # define CONFIG_PHY_MARVELL diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h index b5ffafb5616e..169ee36d3f57 100644 --- a/include/configs/zynq_microzed.h +++ b/include/configs/zynq_microzed.h @@ -12,9 +12,6 @@
#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0 diff --git a/include/configs/zynq_picozed.h b/include/configs/zynq_picozed.h index ffc73bd0e316..47fad66acdde 100644 --- a/include/configs/zynq_picozed.h +++ b/include/configs/zynq_picozed.h @@ -12,9 +12,6 @@
#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI1 diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 468a6bc7bf79..c52a6552e78b 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -12,9 +12,6 @@
#define CONFIG_SYS_SDRAM_SIZE (1024 * 1024 * 1024)
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 - #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0 diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index dbc829e6e409..32ea1f37d6a4 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_NO_FLASH
#if defined(CONFIG_ZC770_XM010) -# define CONFIG_ZYNQ_GEM0 -# define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 # define CONFIG_ZYNQ_SDHCI0
#elif defined(CONFIG_ZC770_XM011) @@ -25,8 +23,6 @@ # undef CONFIG_SYS_NO_FLASH
#elif defined(CONFIG_ZC770_XM013) -# define CONFIG_ZYNQ_GEM1 -# define CONFIG_ZYNQ_GEM_PHY_ADDR1 7
#endif
diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index 6ec6117f17db..1488bfe165d9 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -12,9 +12,6 @@
#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_USB diff --git a/include/configs/zynq_zybo.h b/include/configs/zynq_zybo.h index e2270cd2ea4f..5d1a9d5572a5 100644 --- a/include/configs/zynq_zybo.h +++ b/include/configs/zynq_zybo.h @@ -13,9 +13,6 @@
#define CONFIG_SYS_SDRAM_SIZE (512 * 1024 * 1024)
-#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 0 - #define CONFIG_SYS_NO_FLASH
#define CONFIG_ZYNQ_SDHCI0
Hi Michal,
On Wed, Dec 2, 2015 at 5:36 AM, Michal Simek michal.simek@xilinx.com wrote:
Move PHYLIB from board config to defconfig
Signed-off-by: Michal Simek michal.simek@xilinx.com
Acked-by: Joe Hershberger joe.hershberger@ni.com
participants (4)
-
Bin Meng -
Joe Hershberger -
Michal Simek -
Simon Glass