[U-Boot] [PATCH v7 01/21] include: Add log2 header from the kernel
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
include/linux/log2.h | 205 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 205 insertions(+) create mode 100644 include/linux/log2.h
diff --git a/include/linux/log2.h b/include/linux/log2.h new file mode 100644 index 0000000..aa1de63 --- /dev/null +++ b/include/linux/log2.h @@ -0,0 +1,205 @@ +/* Integer base 2 logarithm calculation + * + * Copyright (C) 2006 Red Hat, Inc. All Rights Reserved. + * Written by David Howells (dhowells@redhat.com) + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _LINUX_LOG2_H +#define _LINUX_LOG2_H + +#include <linux/types.h> +#include <linux/bitops.h> + +/* + * deal with unrepresentable constant logarithms + */ +extern __attribute__((const, noreturn)) +int ____ilog2_NaN(void); + +/* + * non-constant log of base 2 calculators + * - the arch may override these in asm/bitops.h if they can be implemented + * more efficiently than using fls() and fls64() + * - the arch is not required to handle n==0 if implementing the fallback + */ +#ifndef CONFIG_ARCH_HAS_ILOG2_U32 +static inline __attribute__((const)) +int __ilog2_u32(u32 n) +{ + return fls(n) - 1; +} +#endif + +#ifndef CONFIG_ARCH_HAS_ILOG2_U64 +static inline __attribute__((const)) +int __ilog2_u64(u64 n) +{ + return fls64(n) - 1; +} +#endif + +/* + * Determine whether some value is a power of two, where zero is + * *not* considered a power of two. + */ + +static inline __attribute__((const)) +bool is_power_of_2(unsigned long n) +{ + return (n != 0 && ((n & (n - 1)) == 0)); +} + +/* + * round up to nearest power of two + */ +static inline __attribute__((const)) +unsigned long __roundup_pow_of_two(unsigned long n) +{ + return 1UL << fls_long(n - 1); +} + +/* + * round down to nearest power of two + */ +static inline __attribute__((const)) +unsigned long __rounddown_pow_of_two(unsigned long n) +{ + return 1UL << (fls_long(n) - 1); +} + +/** + * ilog2 - log of base 2 of 32-bit or a 64-bit unsigned value + * @n - parameter + * + * constant-capable log of base 2 calculation + * - this can be used to initialise global variables from constant data, hence + * the massive ternary operator construction + * + * selects the appropriately-sized optimised version depending on sizeof(n) + */ +#define ilog2(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n) < 1 ? ____ilog2_NaN() : \ + (n) & (1ULL << 63) ? 63 : \ + (n) & (1ULL << 62) ? 62 : \ + (n) & (1ULL << 61) ? 61 : \ + (n) & (1ULL << 60) ? 60 : \ + (n) & (1ULL << 59) ? 59 : \ + (n) & (1ULL << 58) ? 58 : \ + (n) & (1ULL << 57) ? 57 : \ + (n) & (1ULL << 56) ? 56 : \ + (n) & (1ULL << 55) ? 55 : \ + (n) & (1ULL << 54) ? 54 : \ + (n) & (1ULL << 53) ? 53 : \ + (n) & (1ULL << 52) ? 52 : \ + (n) & (1ULL << 51) ? 51 : \ + (n) & (1ULL << 50) ? 50 : \ + (n) & (1ULL << 49) ? 49 : \ + (n) & (1ULL << 48) ? 48 : \ + (n) & (1ULL << 47) ? 47 : \ + (n) & (1ULL << 46) ? 46 : \ + (n) & (1ULL << 45) ? 45 : \ + (n) & (1ULL << 44) ? 44 : \ + (n) & (1ULL << 43) ? 43 : \ + (n) & (1ULL << 42) ? 42 : \ + (n) & (1ULL << 41) ? 41 : \ + (n) & (1ULL << 40) ? 40 : \ + (n) & (1ULL << 39) ? 39 : \ + (n) & (1ULL << 38) ? 38 : \ + (n) & (1ULL << 37) ? 37 : \ + (n) & (1ULL << 36) ? 36 : \ + (n) & (1ULL << 35) ? 35 : \ + (n) & (1ULL << 34) ? 34 : \ + (n) & (1ULL << 33) ? 33 : \ + (n) & (1ULL << 32) ? 32 : \ + (n) & (1ULL << 31) ? 31 : \ + (n) & (1ULL << 30) ? 30 : \ + (n) & (1ULL << 29) ? 29 : \ + (n) & (1ULL << 28) ? 28 : \ + (n) & (1ULL << 27) ? 27 : \ + (n) & (1ULL << 26) ? 26 : \ + (n) & (1ULL << 25) ? 25 : \ + (n) & (1ULL << 24) ? 24 : \ + (n) & (1ULL << 23) ? 23 : \ + (n) & (1ULL << 22) ? 22 : \ + (n) & (1ULL << 21) ? 21 : \ + (n) & (1ULL << 20) ? 20 : \ + (n) & (1ULL << 19) ? 19 : \ + (n) & (1ULL << 18) ? 18 : \ + (n) & (1ULL << 17) ? 17 : \ + (n) & (1ULL << 16) ? 16 : \ + (n) & (1ULL << 15) ? 15 : \ + (n) & (1ULL << 14) ? 14 : \ + (n) & (1ULL << 13) ? 13 : \ + (n) & (1ULL << 12) ? 12 : \ + (n) & (1ULL << 11) ? 11 : \ + (n) & (1ULL << 10) ? 10 : \ + (n) & (1ULL << 9) ? 9 : \ + (n) & (1ULL << 8) ? 8 : \ + (n) & (1ULL << 7) ? 7 : \ + (n) & (1ULL << 6) ? 6 : \ + (n) & (1ULL << 5) ? 5 : \ + (n) & (1ULL << 4) ? 4 : \ + (n) & (1ULL << 3) ? 3 : \ + (n) & (1ULL << 2) ? 2 : \ + (n) & (1ULL << 1) ? 1 : \ + (n) & (1ULL << 0) ? 0 : \ + ____ilog2_NaN() \ + ) : \ + (sizeof(n) <= 4) ? \ + __ilog2_u32(n) : \ + __ilog2_u64(n) \ + ) + +/** + * roundup_pow_of_two - round the given value up to nearest power of two + * @n - parameter + * + * round the given value up to the nearest power of two + * - the result is undefined when n == 0 + * - this can be used to initialise global variables from constant data + */ +#define roundup_pow_of_two(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (n == 1) ? 1 : \ + (1UL << (ilog2((n) - 1) + 1)) \ + ) : \ + __roundup_pow_of_two(n) \ + ) + +/** + * rounddown_pow_of_two - round the given value down to nearest power of two + * @n - parameter + * + * round the given value down to the nearest power of two + * - the result is undefined when n == 0 + * - this can be used to initialise global variables from constant data + */ +#define rounddown_pow_of_two(n) \ +( \ + __builtin_constant_p(n) ? ( \ + (1UL << ilog2(n))) : \ + __rounddown_pow_of_two(n) \ + ) + +/** + * order_base_2 - calculate the (rounded up) base 2 order of the argument + * @n: parameter + * + * The first few values calculated by this routine: + * ob2(0) = 0 + * ob2(1) = 0 + * ob2(2) = 1 + * ob2(3) = 2 + * ob2(4) = 2 + * ob2(5) = 3 + * ... and so on. + */ + +#define order_base_2(n) ilog2(roundup_pow_of_two(n)) + +#endif /* _LINUX_LOG2_H */
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v6: - Do not touch include/linux/bitops here to avoid build warnings (Daniel)
include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h
diff --git a/include/asm-generic/bitops/__ffs.h b/include/asm-generic/bitops/__ffs.h new file mode 100644 index 0000000..937d7c4 --- /dev/null +++ b/include/asm-generic/bitops/__ffs.h @@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FFS_H_ +#define _ASM_GENERIC_BITOPS___FFS_H_ + +#include <asm/types.h> + +/** + * __ffs - find first bit in word. + * @word: The word to search + * + * Undefined if no bit exists, so code should check against 0 first. + */ +static __always_inline unsigned long __ffs(unsigned long word) +{ + int num = 0; + +#if BITS_PER_LONG == 64 + if ((word & 0xffffffff) == 0) { + num += 32; + word >>= 32; + } +#endif + if ((word & 0xffff) == 0) { + num += 16; + word >>= 16; + } + if ((word & 0xff) == 0) { + num += 8; + word >>= 8; + } + if ((word & 0xf) == 0) { + num += 4; + word >>= 4; + } + if ((word & 0x3) == 0) { + num += 2; + word >>= 2; + } + if ((word & 0x1) == 0) + num += 1; + return num; +} + +#endif /* _ASM_GENERIC_BITOPS___FFS_H_ */ diff --git a/include/asm-generic/bitops/__fls.h b/include/asm-generic/bitops/__fls.h new file mode 100644 index 0000000..a60a7cc --- /dev/null +++ b/include/asm-generic/bitops/__fls.h @@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FLS_H_ +#define _ASM_GENERIC_BITOPS___FLS_H_ + +#include <asm/types.h> + +/** + * __fls - find last (most-significant) set bit in a long word + * @word: the word to search + * + * Undefined if no set bit exists, so code should check against 0 first. + */ +static __always_inline unsigned long __fls(unsigned long word) +{ + int num = BITS_PER_LONG - 1; + +#if BITS_PER_LONG == 64 + if (!(word & (~0ul << 32))) { + num -= 32; + word <<= 32; + } +#endif + if (!(word & (~0ul << (BITS_PER_LONG-16)))) { + num -= 16; + word <<= 16; + } + if (!(word & (~0ul << (BITS_PER_LONG-8)))) { + num -= 8; + word <<= 8; + } + if (!(word & (~0ul << (BITS_PER_LONG-4)))) { + num -= 4; + word <<= 4; + } + if (!(word & (~0ul << (BITS_PER_LONG-2)))) { + num -= 2; + word <<= 2; + } + if (!(word & (~0ul << (BITS_PER_LONG-1)))) + num -= 1; + return num; +} + +#endif /* _ASM_GENERIC_BITOPS___FLS_H_ */ diff --git a/include/asm-generic/bitops/fls.h b/include/asm-generic/bitops/fls.h new file mode 100644 index 0000000..0576d1f --- /dev/null +++ b/include/asm-generic/bitops/fls.h @@ -0,0 +1,41 @@ +#ifndef _ASM_GENERIC_BITOPS_FLS_H_ +#define _ASM_GENERIC_BITOPS_FLS_H_ + +/** + * fls - find last (most-significant) bit set + * @x: the word to search + * + * This is defined the same way as ffs. + * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. + */ + +static __always_inline int fls(int x) +{ + int r = 32; + + if (!x) + return 0; + if (!(x & 0xffff0000u)) { + x <<= 16; + r -= 16; + } + if (!(x & 0xff000000u)) { + x <<= 8; + r -= 8; + } + if (!(x & 0xf0000000u)) { + x <<= 4; + r -= 4; + } + if (!(x & 0xc0000000u)) { + x <<= 2; + r -= 2; + } + if (!(x & 0x80000000u)) { + x <<= 1; + r -= 1; + } + return r; +} + +#endif /* _ASM_GENERIC_BITOPS_FLS_H_ */ diff --git a/include/asm-generic/bitops/fls64.h b/include/asm-generic/bitops/fls64.h new file mode 100644 index 0000000..b097cf8 --- /dev/null +++ b/include/asm-generic/bitops/fls64.h @@ -0,0 +1,36 @@ +#ifndef _ASM_GENERIC_BITOPS_FLS64_H_ +#define _ASM_GENERIC_BITOPS_FLS64_H_ + +#include <asm/types.h> + +/** + * fls64 - find last set bit in a 64-bit word + * @x: the word to search + * + * This is defined in a similar way as the libc and compiler builtin + * ffsll, but returns the position of the most significant set bit. + * + * fls64(value) returns 0 if value is 0 or the position of the last + * set bit if value is nonzero. The last (most significant) bit is + * at position 64. + */ +#if BITS_PER_LONG == 32 +static __always_inline int fls64(__u64 x) +{ + __u32 h = x >> 32; + if (h) + return fls(h) + 32; + return fls(x); +} +#elif BITS_PER_LONG == 64 +static __always_inline int fls64(__u64 x) +{ + if (x == 0) + return 0; + return __fls(x) + 1; +} +#else +#error BITS_PER_LONG not 32 or 64 +#endif + +#endif /* _ASM_GENERIC_BITOPS_FLS64_H_ */
On Thu, Nov 05, 2015 at 12:43:23PM -0200, Fabio Estevam wrote:
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
On 11/05/2015 06:43 AM, Fabio Estevam wrote:
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Changes since v6:
- Do not touch include/linux/bitops here to avoid build warnings (Daniel)
include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h
<snip>
diff --git a/include/asm-generic/bitops/__fls.h b/include/asm-generic/bitops/__fls.h new file mode 100644 index 0000000..a60a7cc --- /dev/null +++ b/include/asm-generic/bitops/__fls.h @@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FLS_H_ +#define _ASM_GENERIC_BITOPS___FLS_H_
+#include <asm/types.h>
+/**
- __fls - find last (most-significant) set bit in a long word
- @word: the word to search
- Undefined if no set bit exists, so code should check against 0 first.
- */
+static __always_inline unsigned long __fls(unsigned long word) +{
- int num = BITS_PER_LONG - 1;
+#if BITS_PER_LONG == 64
- if (!(word & (~0ul << 32))) {
num -= 32;word <<= 32;- }
+#endif
- if (!(word & (~0ul << (BITS_PER_LONG-16)))) {
num -= 16;word <<= 16;- }
- if (!(word & (~0ul << (BITS_PER_LONG-8)))) {
num -= 8;word <<= 8;- }
- if (!(word & (~0ul << (BITS_PER_LONG-4)))) {
num -= 4;word <<= 4;- }
- if (!(word & (~0ul << (BITS_PER_LONG-2)))) {
num -= 2;word <<= 2;- }
- if (!(word & (~0ul << (BITS_PER_LONG-1))))
num -= 1;- return num;
+}
Sorry for catching this late. All above left shift causes compiling warning on 32-bit host (ubuntu 12.04 with gcc 4.6.3)
include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type [enabled by default]
The root cause may be in include/configs/sandbox.h #define CONFIG_SANDBOX_BITS_PER_LONG 64
York
Hi York,
On 1 December 2015 at 10:26, York Sun yorksun@freescale.com wrote:
On 11/05/2015 06:43 AM, Fabio Estevam wrote:
Use the generic bitops header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Changes since v6:
- Do not touch include/linux/bitops here to avoid build warnings (Daniel)
include/asm-generic/bitops/__ffs.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/__fls.h | 43 ++++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls.h | 41 ++++++++++++++++++++++++++++++++++++ include/asm-generic/bitops/fls64.h | 36 +++++++++++++++++++++++++++++++ 4 files changed, 163 insertions(+) create mode 100644 include/asm-generic/bitops/__ffs.h create mode 100644 include/asm-generic/bitops/__fls.h create mode 100644 include/asm-generic/bitops/fls.h create mode 100644 include/asm-generic/bitops/fls64.h
<snip>
diff --git a/include/asm-generic/bitops/__fls.h b/include/asm-generic/bitops/__fls.h new file mode 100644 index 0000000..a60a7cc --- /dev/null +++ b/include/asm-generic/bitops/__fls.h @@ -0,0 +1,43 @@ +#ifndef _ASM_GENERIC_BITOPS___FLS_H_ +#define _ASM_GENERIC_BITOPS___FLS_H_
+#include <asm/types.h>
+/**
- __fls - find last (most-significant) set bit in a long word
- @word: the word to search
- Undefined if no set bit exists, so code should check against 0 first.
- */
+static __always_inline unsigned long __fls(unsigned long word) +{
int num = BITS_PER_LONG - 1;+#if BITS_PER_LONG == 64
if (!(word & (~0ul << 32))) {num -= 32;word <<= 32;}+#endif
if (!(word & (~0ul << (BITS_PER_LONG-16)))) {num -= 16;word <<= 16;}if (!(word & (~0ul << (BITS_PER_LONG-8)))) {num -= 8;word <<= 8;}if (!(word & (~0ul << (BITS_PER_LONG-4)))) {num -= 4;word <<= 4;}if (!(word & (~0ul << (BITS_PER_LONG-2)))) {num -= 2;word <<= 2;}if (!(word & (~0ul << (BITS_PER_LONG-1))))num -= 1;return num;+}
Sorry for catching this late. All above left shift causes compiling warning on 32-bit host (ubuntu 12.04 with gcc 4.6.3)
include/asm-generic/bitops/__fls.h:17:2: warning: left shift count >= width of type [enabled by default]
The root cause may be in include/configs/sandbox.h #define CONFIG_SANDBOX_BITS_PER_LONG 64
I think sandbox has a few issues on 32-bit machines. Probably this should change to 32-bits. I don't have a 32-bit machine set up and in regular use so I have not looked a tthis.
Regards, Simon
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/arm/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 9b78043..d479a38 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -190,4 +190,9 @@ found_middle:
#endif /* __KERNEL__ */
+#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/fls64.h> + #endif /* _ARM_BITOPS_H */
On Thu, Nov 05, 2015 at 12:43:24PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
Use the generic bitops and also add custom __ffs() implementation as per the kernel.
Also align the ffs() implementation with the kernel.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/x86/include/asm/bitops.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h index 5a7e4cb..f97dc66 100644 --- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -14,6 +14,10 @@ * bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). */
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> + #ifdef CONFIG_SMP #define LOCK_PREFIX "lock ; " #else @@ -332,6 +336,20 @@ static __inline__ unsigned long ffz(unsigned long word) #ifdef __KERNEL__
/** + * __ffs - find first set bit in word + * @word: The word to search + * + * Undefined if no bit exists, so code should check against 0 first. + */ +static inline unsigned long __ffs(unsigned long word) +{ + __asm__("rep; bsf %1,%0" + : "=r" (word) + : "rm" (word)); + return word; +} + +/** * ffs - find first bit set * @x: the word to search * @@ -346,7 +364,8 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" - "1:" : "=r" (r) : "g" (x)); + "1:" : "=r" (r) : "rm" (x)); + return r+1; } #define PLATFORM_FFS
On Thu, Nov 05, 2015 at 12:43:25PM -0200, Fabio Estevam wrote:
Use the generic bitops and also add custom __ffs() implementation as per the kernel.
Also align the ffs() implementation with the kernel.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/m68k/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/m68k/include/asm/bitops.h b/arch/m68k/include/asm/bitops.h index f9c434b..69ea26a 100644 --- a/arch/m68k/include/asm/bitops.h +++ b/arch/m68k/include/asm/bitops.h @@ -6,6 +6,10 @@ #define _M68K_BITOPS_H
#include <asm/byteorder.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h>
extern void set_bit(int nr, volatile void *addr); extern void clear_bit(int nr, volatile void *addr);
On Thu, Nov 05, 2015 at 12:43:26PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/blackfin/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/blackfin/include/asm/bitops.h b/arch/blackfin/include/asm/bitops.h index cd7e356..6cde6db 100644 --- a/arch/blackfin/include/asm/bitops.h +++ b/arch/blackfin/include/asm/bitops.h @@ -15,6 +15,10 @@
#include <asm/byteorder.h> #include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h>
#ifdef __KERNEL__ /*
On Thu, Nov 05, 2015 at 12:43:27PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de --- Changes since v6: - None
arch/sh/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index c57d628..8cb8385 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -1,6 +1,11 @@ #ifndef __ASM_SH_BITOPS_H #define __ASM_SH_BITOPS_H
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #ifdef __KERNEL__ #include <asm/irqflags.h> /* For __swab32 */
On Thu, Nov 05, 2015 at 12:43:28PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v6: - None
arch/microblaze/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h index 0ac78d7..d24f2cf 100644 --- a/arch/microblaze/include/asm/bitops.h +++ b/arch/microblaze/include/asm/bitops.h @@ -7,6 +7,10 @@
#include <asm/byteorder.h> /* swab32 */ #include <asm/system.h> /* save_flags */ +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h>
#ifdef __KERNEL__ /*
On Thu, Nov 05, 2015 at 12:43:29PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/sandbox/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/sandbox/include/asm/bitops.h b/arch/sandbox/include/asm/bitops.h index f1a7aee..f27d5e9 100644 --- a/arch/sandbox/include/asm/bitops.h +++ b/arch/sandbox/include/asm/bitops.h @@ -21,6 +21,10 @@
#include <linux/compiler.h> #include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h>
#ifdef __KERNEL__
On Thu, Nov 05, 2015 at 12:43:30PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/sparc/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/sparc/include/asm/bitops.h b/arch/sparc/include/asm/bitops.h index fa39fa3..c66f730 100644 --- a/arch/sparc/include/asm/bitops.h +++ b/arch/sparc/include/asm/bitops.h @@ -9,4 +9,9 @@ #ifndef _SPARC_BITOPS_H #define _SPARC_BITOPS_H
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #endif /* _SPARC_BITOPS_H */
On Thu, Nov 05, 2015 at 12:43:31PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/openrisc/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/openrisc/include/asm/bitops.h b/arch/openrisc/include/asm/bitops.h index 6d0b57c..28c4658 100644 --- a/arch/openrisc/include/asm/bitops.h +++ b/arch/openrisc/include/asm/bitops.h @@ -12,6 +12,10 @@ #define PLATFORM_FFS #include <asm/bitops/ffs.h>
+#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #define hweight32(x) generic_hweight32(x) #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x)
On Thu, Nov 05, 2015 at 12:43:32PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/nds32/include/asm/bitops.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/nds32/include/asm/bitops.h b/arch/nds32/include/asm/bitops.h index f1aa9a3..7ee37c3 100644 --- a/arch/nds32/include/asm/bitops.h +++ b/arch/nds32/include/asm/bitops.h @@ -21,6 +21,10 @@ #ifdef __KERNEL__
#include <asm/system.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h>
#define smp_mb__before_clear_bit() do { } while (0) #define smp_mb__after_clear_bit() do { } while (0)
On Thu, Nov 05, 2015 at 12:43:33PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Acked-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/nios2/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/nios2/include/asm/bitops.h b/arch/nios2/include/asm/bitops.h index 3e17964..ee46f37 100644 --- a/arch/nios2/include/asm/bitops.h +++ b/arch/nios2/include/asm/bitops.h @@ -13,4 +13,9 @@ #include <asm/bitops/non-atomic.h> #include <asm/bitops/ffs.h>
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #endif /* __ASM_NIOS2_BITOPS_H */
On Thu, Nov 05, 2015 at 12:43:34PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Acked-by: Thomas Chou thomas@wytron.com.tw Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com --- Changes since v6: - Newly introduced in this series arch/mips/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index b5c2a63..c31ff6e 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -17,6 +17,11 @@ #include <asm/sgidefs.h> #include <asm/system.h>
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + /* * clear_bit() doesn't provide any barrier for the compiler. */
On Thu, Nov 05, 2015 at 12:43:35PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v6: - Newly introduced in this series
arch/arc/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arc/include/asm/bitops.h b/arch/arc/include/asm/bitops.h index 85721aa..370cb46 100644 --- a/arch/arc/include/asm/bitops.h +++ b/arch/arc/include/asm/bitops.h @@ -16,4 +16,9 @@ #define hweight16(x) generic_hweight16(x) #define hweight8(x) generic_hweight8(x)
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #endif /* __ASM_ARC_BITOPS_H */
On Thu, Nov 05, 2015 at 12:43:36PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic
functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v6: - Newly introduced in this series
arch/avr32/include/asm/bitops.h | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/avr32/include/asm/bitops.h b/arch/avr32/include/asm/bitops.h index 0ec6784..0d425c2 100644 --- a/arch/avr32/include/asm/bitops.h +++ b/arch/avr32/include/asm/bitops.h @@ -6,4 +6,9 @@ #ifndef __ASM_AVR32_BITOPS_H #define __ASM_AVR32_BITOPS_H
+#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/__ffs.h> + #endif /* __ASM_AVR32_BITOPS_H */
On Thu, Nov 05, 2015 at 12:43:37PM -0200, Fabio Estevam wrote:
The generic bitops headers are required when calling logarithmic functions, such as ilog2().
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
Add fls_long and __ffs64 support to align with the kernel bitops implementation.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v6: - Newly introduced in this series. - Only touch include/linux/bitops.h after all the arch bitops headers have been added. This is done to avoid build warnings (Daniel).
include/linux/bitops.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 7b4011f..1b2e491 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -2,6 +2,7 @@ #define _LINUX_BITOPS_H
#include <asm/types.h> +#include <linux/compiler.h>
#define BIT(nr) (1UL << (nr)) #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG)) @@ -139,6 +140,32 @@ static inline unsigned int generic_hweight8(unsigned int w) # define fls generic_fls #endif
+static inline unsigned fls_long(unsigned long l) +{ + if (sizeof(l) == 4) + return fls(l); + return fls64(l); +} + +/** + * __ffs64 - find first set bit in a 64 bit word + * @word: The 64 bit word + * + * On 64 bit arches this is a synomyn for __ffs + * The result is not defined if no bits are set, so check that @word + * is non-zero before calling this. + */ +static inline unsigned long __ffs64(u64 word) +{ +#if BITS_PER_LONG == 32 + if (((u32)word) == 0UL) + return __ffs((u32)(word >> 32)) + 32; +#elif BITS_PER_LONG != 64 +#error BITS_PER_LONG not 32 or 64 +#endif + return __ffs((unsigned long)word); +} + /** * __set_bit - Set a bit in memory * @nr: the bit to set
On Thu, Nov 05, 2015 at 12:43:38PM -0200, Fabio Estevam wrote:
Add fls_long and __ffs64 support to align with the kernel bitops implementation.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
Use the is_power_of_2() definition from log2.h to align with the kernel implementation.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
arch/arm/mach-mvebu/mbus.c | 2 +- drivers/mtd/mtdcore.c | 2 +- drivers/mtd/ubi/build.c | 2 +- fs/ubifs/super.c | 2 +- include/linux/compat.h | 6 ------ 5 files changed, 4 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-mvebu/mbus.c b/arch/arm/mach-mvebu/mbus.c index 771cce6..346278e 100644 --- a/arch/arm/mach-mvebu/mbus.c +++ b/arch/arm/mach-mvebu/mbus.c @@ -52,7 +52,7 @@ #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> -#include <linux/compat.h> +#include <linux/log2.h> #include <linux/mbus.h>
/* DDR target is the same on all platforms */ diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 2f2172b..81be0f7 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -27,8 +27,8 @@ #include <linux/gfp.h> #include <linux/slab.h> #else -#include <linux/compat.h> #include <linux/err.h> +#include <linux/log2.h> #include <ubi_uboot.h> #endif
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index f0a3b67..f484e62 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -30,7 +30,7 @@ #include <linux/slab.h> #include <linux/major.h> #else -#include <linux/compat.h> +#include <linux/log2.h> #endif #include <linux/err.h> #include <ubi_uboot.h> diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index c474313..abe861a 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -31,7 +31,7 @@ #include <common.h> #include <malloc.h> #include <memalign.h> -#include <linux/compat.h> +#include <linux/log2.h> #include <linux/stat.h> #include <linux/err.h> #include "ubifs.h" diff --git a/include/linux/compat.h b/include/linux/compat.h index 59937de..e561ee3 100644 --- a/include/linux/compat.h +++ b/include/linux/compat.h @@ -130,12 +130,6 @@ static inline void led_trigger_unregister_simple(struct led_trigger *trigger) {} static inline void led_trigger_event(struct led_trigger *trigger, enum led_brightness event) {}
-/* include/linux/log2.h */ -static inline int is_power_of_2(unsigned long n) -{ - return (n != 0 && ((n & (n - 1)) == 0)); -} - /* uapi/linux/limits.h */ #define XATTR_LIST_MAX 65536 /* size of extended attribute namelist (64k) */
On Thu, Nov 05, 2015 at 12:43:39PM -0200, Fabio Estevam wrote:
Use the is_power_of_2() definition from log2.h to align with the kernel implementation.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
With the minor fixup that was sent as a follow up in the thread on patch #1, Applied to u-boot/master, thanks!
Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation.
Use the generic __ffs64 instead of a custom powerpc implementation.
Cc: York Sun yorksun@freescale.com Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- arch/powerpc/cpu/mpc83xx/law.c | 5 +++-- arch/powerpc/cpu/mpc85xx/tlb.c | 2 ++ arch/powerpc/cpu/mpc8xxx/law.c | 5 +++-- arch/powerpc/include/asm/bitops.h | 11 +---------- arch/powerpc/include/asm/fsl_law.h | 1 + arch/powerpc/include/asm/fsl_srio.h | 2 ++ 6 files changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/law.c b/arch/powerpc/cpu/mpc83xx/law.c index 66c88b6..262ae7f 100644 --- a/arch/powerpc/cpu/mpc83xx/law.c +++ b/arch/powerpc/cpu/mpc83xx/law.c @@ -9,6 +9,7 @@ #include <common.h> #include <asm/fsl_law.h> #include <asm/mmu.h> +#include <linux/log2.h>
int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) { @@ -20,7 +21,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (start == 0) start_align = 1ull << (LAW_SIZE_2G + 1); else - start_align = 1ull << (ffs64(start) - 1); + start_align = 1ull << (__ffs64(start) - 1); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1;
@@ -40,7 +41,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (sz) { start += law_sz;
- start_align = 1ull << (ffs64(start) - 1); + start_align = 1ull << (__ffs64(start) - 1); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1; ecm = &immap->sysconf.ddrlaw[1]; diff --git a/arch/powerpc/cpu/mpc85xx/tlb.c b/arch/powerpc/cpu/mpc85xx/tlb.c index 8e0508f..cf31eb2 100644 --- a/arch/powerpc/cpu/mpc85xx/tlb.c +++ b/arch/powerpc/cpu/mpc85xx/tlb.c @@ -14,6 +14,8 @@ #include <addr_map.h> #endif
+#include <linux/log2.h> + DECLARE_GLOBAL_DATA_PTR;
void invalidate_tlb(u8 tlb) diff --git a/arch/powerpc/cpu/mpc8xxx/law.c b/arch/powerpc/cpu/mpc8xxx/law.c index 33d53a8..24baad4 100644 --- a/arch/powerpc/cpu/mpc8xxx/law.c +++ b/arch/powerpc/cpu/mpc8xxx/law.c @@ -11,6 +11,7 @@ #include <linux/compiler.h> #include <asm/fsl_law.h> #include <asm/io.h> +#include <linux/log2.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -187,7 +188,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (start == 0) start_align = 1ull << (LAW_SIZE_32G + 1); else - start_align = 1ull << (ffs64(start) - 1); + start_align = 1ull << (__ffs64(start) - 1); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1;
@@ -202,7 +203,7 @@ int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id) if (sz) { start += law_sz;
- start_align = 1ull << (ffs64(start) - 1); + start_align = 1ull << (__ffs64(start) - 1); law_sz = min(start_align, sz); law_sz_enc = __ilog2_u64(law_sz) - 1;
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index a6bcf3c..14217ef 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h @@ -6,6 +6,7 @@ #define _PPC_BITOPS_H
#include <asm/byteorder.h> +#include <asm-generic/bitops/__ffs.h>
extern void set_bit(int nr, volatile void *addr); extern void clear_bit(int nr, volatile void *addr); @@ -209,16 +210,6 @@ static inline int fls64(__u64 x) #error BITS_PER_LONG not 32 or 64 #endif
-static inline int __ilog2_u64(u64 n) -{ - return fls64(n) - 1; -} - -static inline int ffs64(u64 x) -{ - return __ilog2_u64(x & -x) + 1ull; -} - #ifdef __KERNEL__
/* diff --git a/arch/powerpc/include/asm/fsl_law.h b/arch/powerpc/include/asm/fsl_law.h index 3b50487..8e1d22a 100644 --- a/arch/powerpc/include/asm/fsl_law.h +++ b/arch/powerpc/include/asm/fsl_law.h @@ -10,6 +10,7 @@ #define _FSL_LAW_H_
#include <asm/io.h> +#include <linux/log2.h>
#define LAW_EN 0x80000000
diff --git a/arch/powerpc/include/asm/fsl_srio.h b/arch/powerpc/include/asm/fsl_srio.h index e5aab2a..ec25e16 100644 --- a/arch/powerpc/include/asm/fsl_srio.h +++ b/arch/powerpc/include/asm/fsl_srio.h @@ -7,6 +7,8 @@ #ifndef _FSL_SRIO_H_ #define _FSL_SRIO_H_
+#include <linux/log2.h> + enum atmu_size { ATMU_SIZE_4K = 0xb, ATMU_SIZE_8K,
On Thu, Nov 05, 2015 at 12:43:40PM -0200, Fabio Estevam wrote:
Remove __ilog2_u64 and ffs4 from powerpc bitops to align with the kernel implementation.
Use the generic __ffs64 instead of a custom powerpc implementation.
Cc: York Sun yorksun@freescale.com Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from Brian Norris computersforpeace@gmail.com Here is the commit details: "mtd: spi-nor: refactor block protection functions" (sha1: 62593cf40b23b523b9fc9334ca61ba6c595ebb09)
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- Changes since v1: - Use size_t in stm_lock/unlock functions and prototypes to avoid build error in Blackfin.
drivers/mtd/spi/sf_internal.h | 3 + drivers/mtd/spi/sf_ops.c | 170 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 173 insertions(+)
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index 8a3e5ec..ac493f1 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -105,6 +105,9 @@ enum spi_nor_option_flags { #define STATUS_QEB_WINSPAN (1 << 1) #define STATUS_QEB_MXIC (1 << 6) #define STATUS_PEC (1 << 7) +#define SR_BP0 BIT(2) /* Block protect 0 */ +#define SR_BP1 BIT(3) /* Block protect 1 */ +#define SR_BP2 BIT(4) /* Block protect 2 */
/* Flash timeout values */ #define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index f2a9244..6c87ba6 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -15,6 +15,7 @@ #include <spi_flash.h> #include <watchdog.h> #include <linux/compiler.h> +#include <linux/log2.h>
#include "sf_internal.h"
@@ -565,3 +566,172 @@ int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, return ret; } #endif + +#ifdef CONFIG_SPI_FLASH_STMICRO +static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs, + u32 *len) +{ + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + int shift = ffs(mask) - 1; + int pow; + + if (!(sr & mask)) { + /* No protection */ + *ofs = 0; + *len = 0; + } else { + pow = ((sr & mask) ^ mask) >> shift; + *len = flash->size >> pow; + *ofs = flash->size - *len; + } +} + +/* + * Return 1 if the entire region is locked, 0 otherwise + */ +static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u32 len, + u8 sr) +{ + loff_t lock_offs; + u32 lock_len; + + stm_get_locked_range(flash, sr, &lock_offs, &lock_len); + + return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs); +} + +/* + * Check if a region of the flash is (completely) locked. See stm_lock() for + * more info. + * + * Returns 1 if entire region is locked, 0 if any portion is unlocked, and + * negative on errors. + */ +int stm_is_locked(struct spi_flash *flash, loff_t ofs, u32 len) +{ + int status; + u8 sr; + + status = spi_flash_cmd_read_status(flash, &sr); + if (status < 0) + return status; + + return stm_is_locked_sr(flash, ofs, len, sr); +} + +/* + * Lock a region of the flash. Compatible with ST Micro and similar flash. + * Supports only the block protection bits BP{0,1,2} in the status register + * (SR). Does not support these features found in newer SR bitfields: + * - TB: top/bottom protect - only handle TB=0 (top protect) + * - SEC: sector/block protect - only handle SEC=0 (block protect) + * - CMP: complement protect - only support CMP=0 (range is not complemented) + * + * Sample table portion for 8MB flash (Winbond w25q64fw): + * + * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion + * -------------------------------------------------------------------------- + * X | X | 0 | 0 | 0 | NONE | NONE + * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64 + * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32 + * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16 + * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8 + * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4 + * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2 + * X | X | 1 | 1 | 1 | 8 MB | ALL + * + * Returns negative on errors, 0 on success. + */ +int stm_lock(struct spi_flash *flash, u32 ofs, size_t len) +{ + u8 status_old, status_new; + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + u8 shift = ffs(mask) - 1, pow, val; + + spi_flash_cmd_read_status(flash, &status_old); + + /* SPI NOR always locks to the end */ + if (ofs + len != flash->size) { + /* Does combined region extend to end? */ + if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len, + status_old)) + return -EINVAL; + len = flash->size - ofs; + } + + /* + * Need smallest pow such that: + * + * 1 / (2^pow) <= (len / size) + * + * so (assuming power-of-2 size) we do: + * + * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len)) + */ + pow = ilog2(flash->size) - ilog2(len); + val = mask - (pow << shift); + if (val & ~mask) + return -EINVAL; + + /* Don't "lock" with no region! */ + if (!(val & mask)) + return -EINVAL; + + status_new = (status_old & ~mask) | val; + + /* Only modify protection if it will not unlock other areas */ + if ((status_new & mask) <= (status_old & mask)) + return -EINVAL; + + spi_flash_cmd_write_status(flash, status_new); + + return 0; +} + +/* + * Unlock a region of the flash. See stm_lock() for more info + * + * Returns negative on errors, 0 on success. + */ +int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) +{ + uint8_t status_old, status_new; + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + u8 shift = ffs(mask) - 1, pow, val; + + spi_flash_cmd_read_status(flash, &status_old); + + /* Cannot unlock; would unlock larger region than requested */ + if (stm_is_locked_sr(flash, status_old, ofs - flash->erase_size, + flash->erase_size)) + return -EINVAL; + /* + * Need largest pow such that: + * + * 1 / (2^pow) >= (len / size) + * + * so (assuming power-of-2 size) we do: + * + * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len)) + */ + pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len)); + if (ofs + len == flash->size) { + val = 0; /* fully unlocked */ + } else { + val = mask - (pow << shift); + /* Some power-of-two sizes are not supported */ + if (val & ~mask) + return -EINVAL; + } + + status_new = (status_old & ~mask) | val; + + /* Only modify protection if it will not lock other areas */ + if ((status_new & mask) >= (status_old & mask)) + return -EINVAL; + + spi_flash_cmd_write_status(flash, status_new); + + return 0; +} +#endif /* CONFIG_SPI_FLASH_STMICRO */
On Thu, Nov 05, 2015 at 12:43:41PM -0200, Fabio Estevam wrote:
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from Brian Norris computersforpeace@gmail.com Here is the commit details: "mtd: spi-nor: refactor block protection functions" (sha1: 62593cf40b23b523b9fc9334ca61ba6c595ebb09)
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
Applied to u-boot/master, thanks!
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 offset 0x3f0000 is protected and cannot be erased SF: 65536 bytes @ 0x3f0000 Erased: ERROR => sf protect unlock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com [re-worked to fit the lock common to dm and non-dm] Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com --- Changes since v6: - None
common/cmd_sf.c | 35 +++++++++++++++++++++++++++++++++++ drivers/mtd/spi/sf_internal.h | 9 +++++++++ drivers/mtd/spi/sf_ops.c | 14 ++++++++++++-- drivers/mtd/spi/sf_probe.c | 13 +++++++++++++ include/spi_flash.h | 19 +++++++++++++++++++ 5 files changed, 88 insertions(+), 2 deletions(-)
diff --git a/common/cmd_sf.c b/common/cmd_sf.c index ac7f5df..42862d9 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -348,6 +348,37 @@ static int do_spi_flash_erase(int argc, char * const argv[]) return ret == 0 ? 0 : 1; }
+static int do_spi_protect(int argc, char * const argv[]) +{ + int ret = 0; + loff_t start, len; + bool prot = false; + + if (argc != 4) + return -1; + + if (!str2off(argv[2], &start)) { + puts("start sector is not a valid number\n"); + return 1; + } + + if (!str2off(argv[3], &len)) { + puts("len is not a valid number\n"); + return 1; + } + + if (strcmp(argv[1], "lock") == 0) + prot = true; + else if (strcmp(argv[1], "unlock") == 0) + prot = false; + else + return -1; /* Unknown parameter */ + + ret = spi_flash_protect(flash, start, len, prot); + + return ret == 0 ? 0 : 1; +} + #ifdef CONFIG_CMD_SF_TEST enum { STAGE_ERASE, @@ -540,6 +571,8 @@ static int do_spi_flash(cmd_tbl_t *cmdtp, int flag, int argc, ret = do_spi_flash_read_write(argc, argv); else if (strcmp(cmd, "erase") == 0) ret = do_spi_flash_erase(argc, argv); + else if (strcmp(cmd, "protect") == 0) + ret = do_spi_protect(argc, argv); #ifdef CONFIG_CMD_SF_TEST else if (!strcmp(cmd, "test")) ret = do_spi_flash_test(argc, argv); @@ -579,5 +612,7 @@ U_BOOT_CMD( "sf update addr offset|partition len - erase and write `len' bytes from memory\n" " at `addr' to flash at `offset'\n" " or to start of mtd `partition'\n" + "sf protect lock/unlock sector len - protect/unprotect 'len' bytes starting\n" + " at address 'sector'\n" SF_TEST_HELP ); diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index ac493f1..8793f18 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -176,6 +176,15 @@ int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs); /* Program the status register */ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws);
+/* Lock stmicro spi flash region */ +int stm_lock(struct spi_flash *flash, u32 ofs, size_t len); + +/* Unlock stmicro spi flash region */ +int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len); + +/* Check if a stmicro spi flash region is completely locked */ +int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len); + /* Read the config register */ int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc);
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 6c87ba6..d832464 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -268,6 +268,11 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) return -1; }
+ if (flash->flash_is_locked(flash, offset, len) > 0) { + printf("offset 0x%x is protected and cannot be erased\n", offset); + return -EINVAL; + } + cmd[0] = flash->erase_cmd; while (len) { erase_addr = offset; @@ -310,6 +315,11 @@ int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
page_size = flash->page_size;
+ if (flash->flash_is_locked(flash, offset, len) > 0) { + printf("offset 0x%x is protected and cannot be written\n", offset); + return -EINVAL; + } + cmd[0] = flash->write_cmd; for (actual = 0; actual < len; actual += chunk_len) { write_addr = offset; @@ -589,7 +599,7 @@ static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs, /* * Return 1 if the entire region is locked, 0 otherwise */ -static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u32 len, +static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len, u8 sr) { loff_t lock_offs; @@ -607,7 +617,7 @@ static int stm_is_locked_sr(struct spi_flash *flash, loff_t ofs, u32 len, * Returns 1 if entire region is locked, 0 if any portion is unlocked, and * negative on errors. */ -int stm_is_locked(struct spi_flash *flash, loff_t ofs, u32 len) +int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len) { int status; u8 sr; diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index c000c53..bc05d30 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -182,6 +182,19 @@ static int spi_flash_validate_params(struct spi_slave *spi, u8 *idcode, flash->read = spi_flash_cmd_read_ops; #endif
+ /* lock hooks are flash specific - assign them based on idcode0 */ + switch (idcode[0]) { +#ifdef CONFIG_SPI_FLASH_STMICRO + case SPI_FLASH_CFI_MFR_STMICRO: + flash->flash_lock = stm_lock; + flash->flash_unlock = stm_unlock; + flash->flash_is_locked = stm_is_locked; +#endif + break; + default: + debug("SF: Lock ops not supported for %02x flash\n", idcode[0]); + } + /* Compute the flash size */ flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; /* diff --git a/include/spi_flash.h b/include/spi_flash.h index 4312d3d..0ae0062 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -54,6 +54,9 @@ struct spi_slave; * @write_cmd: Write cmd - page and quad program. * @dummy_byte: Dummy cycles for read operation. * @memory_map: Address of read-only SPI flash access + * @flash_lock: lock a region of the SPI Flash + * @flash_unlock: unlock a region of the SPI Flash + * @flash_is_locked: check if a region of the SPI Flash is completely locked * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read * @write: Flash write ops: Write len bytes from buf into offset @@ -87,6 +90,10 @@ struct spi_flash { u8 dummy_byte;
void *memory_map; + + int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len); + int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len); + int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len); #ifndef CONFIG_DM_SPI_FLASH /* * These are not strictly needed for driver model, but keep them here @@ -227,6 +234,18 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, } #endif
+static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, + bool prot) +{ + if (!flash->flash_lock) + return -EOPNOTSUPP; + + if (prot) + return flash->flash_lock(flash, ofs, len); + else + return flash->flash_unlock(flash, ofs, len); +} + void spi_boot(void) __noreturn; void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);
On Thu, Nov 05, 2015 at 12:43:42PM -0200, Fabio Estevam wrote:
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 offset 0x3f0000 is protected and cannot be erased SF: 65536 bytes @ 0x3f0000 Erased: ERROR => sf protect unlock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com [re-worked to fit the lock common to dm and non-dm] Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
Hi Fabio,
On 6 November 2015 at 04:24, Tom Rini trini@konsulko.com wrote:
On Thu, Nov 05, 2015 at 12:43:42PM -0200, Fabio Estevam wrote:
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 offset 0x3f0000 is protected and cannot be erased SF: 65536 bytes @ 0x3f0000 Erased: ERROR => sf protect unlock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com [re-worked to fit the lock common to dm and non-dm] Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
Also I don't like the way this adds new operations to struct spi_flash. These should go in struct dm_spi_flash_ops for driver model, and be compatible with the driver-model way of doing things.
Can you please take a look?
Regards, Simon
On Tue, Nov 10, 2015 at 04:09:52PM -0800, Simon Glass wrote:
Hi Fabio,
On 6 November 2015 at 04:24, Tom Rini trini@konsulko.com wrote:
On Thu, Nov 05, 2015 at 12:43:42PM -0200, Fabio Estevam wrote:
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe SF: Detected M25P32 with page size 256 Bytes, erase size 64 KiB, total 4 MiB => sf protect lock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 offset 0x3f0000 is protected and cannot be erased SF: 65536 bytes @ 0x3f0000 Erased: ERROR => sf protect unlock 0x3f0000 0x10000 => sf erase 0x3f0000 0x10000 SF: 65536 bytes @ 0x3f0000 Erased: OK
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com [re-worked to fit the lock common to dm and non-dm] Signed-off-by: Jagan Teki jteki@openedev.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
Also I don't like the way this adds new operations to struct spi_flash. These should go in struct dm_spi_flash_ops for driver model, and be compatible with the driver-model way of doing things.
Can you please take a look?
I think it's a bit more complex, I thought we had covered the not supported case. I wonder if it's the same chip family and thus thought to be, but not in this case, supported?
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
Regards,
Fabio Estevam
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000058>] EFLAGS: 00010283 Original EIP :[<52fbb058>] EAX: 76d46bf0 EBX: acd46c20 ECX: 00010000 EDX: 533f94e0 ESI: 003e0000 EDI: 00000004 EBP: 00010000 ESP: acd3cf58 DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018 CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000 DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 DR6: ffff0ff0 DR7: 00000400 Stack: 0xacd3cf98 : 0x00010000 0xacd3cf94 : 0xacd3dd00 0xacd3cf90 : 0x00000028 0xacd3cf8c : 0xacf75917 0xacd3cf88 : 0x00000a30 0xacd3cf84 : 0xacd3cf9c 0xacd3cf80 : 0x00000008 0xacd3cf7c : 0x00001000 0xacd3cf78 : 0xacd44480 0xacd3cf74 : 0x00000a30 0xacd3cf70 : 0x00000a30 0xacd3cf6c : 0xacf67e75 0xacd3cf68 : 0xacd3cfd8 0xacd3cf64 : 0xacd444c8 0xacd3cf60 : 0xacd3d00c 0xacd3cf5c : 0xacf75c74 --->0xacd3cf58 : 0x00010000 0xacd3cf54 : 0x00010283 0xacd3cf50 : 0x00000010 0xacd3cf4c : 0x00000058 ### ERROR ### Please RESET the board ###
The flash is W25Q64CV.
Regards, Simon
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000058>] EFLAGS: 00010283 Original EIP :[<52fbb058>]
In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Jagan, would you have some ideas, please?
Thanks
On 11 November 2015 at 15:13, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000058>] EFLAGS: 00010283 Original EIP :[<52fbb058>]
In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Jagan, would you have some ideas, please?
Issue still there? because we added these lock ops only for ST Micro flash's.
thanks!
On Thu, Nov 12, 2015 at 12:25 AM, Jagan Teki jteki@openedev.com wrote:
On 11 November 2015 at 15:13, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000058>] EFLAGS: 00010283 Original EIP :[<52fbb058>]
In this patch we only assign the lock ops if the flash is of ST Micro type, so not sure why it affects Winbound flash as well.
Jagan, would you have some ideas, please?
Issue still there? because we added these lock ops only for ST Micro flash's.
thanks!
It now breaks SPI flash on Intel Crown Bay too ..
=> saveenv Saving Environment to SPI Flash... SF: Detected SST25VF016B with page size 256 Bytes, erase size 4 KiB, total 2 MiB Erasing SPI flash...Invalid Opcode (Undefined Opcode) EIP: 0010:[<00000006>] EFLAGS: 00010213 Original EIP :[<c0b9e006>] EAX: 3f164f30 EBX: 00000000 ECX: 00001000 EDX: 00000000 ESI: 00001000 EDI: 00001000 EBP: 3f164f30 ESP: 3f15b77c DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018 CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000600 DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000 DR6: ffff0ff0 DR7: 00000400 Stack: 0x3f15b7bc : 0x3f387b0e 0x3f15b7b8 : 0x3f3c6108 0x3f15b7b4 : 0x00000000 0x3f15b7b0 : 0x3f15b7e0 0x3f15b7ac : 0x3f3ab6cc 0x3f15b7a8 : 0x00001000 0x3f15b7a4 : 0x3f1610b8 0x3f15b7a0 : 0x3f3af400 0x3f15b79c : 0x3f388036 0x3f15b798 : 0x00000000 0x3f15b794 : 0x00000ffc 0x3f15b790 : 0x3f15b7bc 0x3f15b78c : 0x3f38e9ec 0x3f15b788 : 0x0000002e 0x3f15b784 : 0x3f1610b8 0x3f15b780 : 0x0000002e --->0x3f15b77c : 0x3f38838b 0x3f15b778 : 0x00010213 0x3f15b774 : 0x00000010 0x3f15b770 : 0x00000006 ### ERROR ### Please RESET the board ###
Regards, Bin
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n" - "1:" : "=r" (r) : "rm" (x)); + "1:" : "=r" (r) : "g" (x));
return r+1; }
Hi,
On Wed, Nov 11, 2015 at 10:04 PM, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
No, this does not resolve this issue.
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
"1:" : "=r" (r) : "g" (x)); return r+1;}
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Regards, Bin
Hi,
On 13 November 2015 at 03:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi,
On Wed, Nov 11, 2015 at 10:04 PM, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
No, this does not resolve this issue.
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
"1:" : "=r" (r) : "g" (x)); return r+1;}
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Regards, Simon
On Sun, Nov 15, 2015 at 06:34:51PM -0700, Simon Glass wrote:
Hi,
On 13 November 2015 at 03:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi,
On Wed, Nov 11, 2015 at 10:04 PM, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
This patch breaks chromebook_link - I think because it adds a new operation which is not supported by all flash chips. Those that are not supported (i.e that don't have the 'flash_is_locked' method) should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
No, this does not resolve this issue.
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
"1:" : "=r" (r) : "g" (x)); return r+1;}
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
Hi Tom,
On 15 November 2015 at 18:58, Tom Rini trini@konsulko.com wrote:
On Sun, Nov 15, 2015 at 06:34:51PM -0700, Simon Glass wrote:
Hi,
On 13 November 2015 at 03:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi,
On Wed, Nov 11, 2015 at 10:04 PM, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote:
Hi Simon,
On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote:
> This patch breaks chromebook_link - I think because it adds a new > operation which is not supported by all flash chips. Those that are > not supported (i.e that don't have the 'flash_is_locked' method) > should still work.
What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
No, this does not resolve this issue.
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
"1:" : "=r" (r) : "g" (x)); return r+1;}
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
OK that sounds good, thanks.
Regards, Simon
Hi Tom/Simon/Febio,
On 17 November 2015 at 02:37, Simon Glass sjg@chromium.org wrote:
Hi Tom,
On 15 November 2015 at 18:58, Tom Rini trini@konsulko.com wrote:
On Sun, Nov 15, 2015 at 06:34:51PM -0700, Simon Glass wrote:
Hi,
On 13 November 2015 at 03:41, Bin Meng bmeng.cn@gmail.com wrote:
Hi,
On Wed, Nov 11, 2015 at 10:04 PM, Fabio Estevam festevam@gmail.com wrote:
On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass sjg@chromium.org wrote:
Hi Fabio,
On 10 November 2015 at 16:51, Fabio Estevam festevam@gmail.com wrote: > > Hi Simon, > > On Tue, Nov 10, 2015 at 10:09 PM, Simon Glass sjg@chromium.org wrote: > > > This patch breaks chromebook_link - I think because it adds a new > > operation which is not supported by all flash chips. Those that are > > not supported (i.e that don't have the 'flash_is_locked' method) > > should still work. > > What is the symptom you are seeing? Which SPI NOR flash does this board have?
It crashes reading the environment:
U-Boot 2015.10-00544-gcad0499 (Nov 10 2015 - 17:06:00 -0700)
CPU: Intel(R) Core(TM) i5-3427U CPU @ 1.80GHz DRAM: 2.7 GiB SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB *** Warning - bad CRC, using default environment
Video: 1280x1024x16 Model: Google Link SF: Detected W25Q64CV with page size 256 Bytes, erase size 4 KiB, total 8 MiB Invalid Opcode (Undefined Opcode)
I am wondering if this invalid opcode is caused by 6c2f758cee266f7648.
Could you please try this?
No, this does not resolve this issue.
--- a/arch/x86/include/asm/bitops.h +++ b/arch/x86/include/asm/bitops.h @@ -364,7 +364,7 @@ static __inline__ int ffs(int x) __asm__("bsfl %1,%0\n\t" "jnz 1f\n\t" "movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
"1:" : "=r" (r) : "g" (x)); return r+1;}
It turns out it is a NULL pointer exception! Fixing this NULL pointer makes the crash disappear, but 'saveenv' does not actually work on the SST flash. Something is broken again, gosh!
Bin thank you for fixing this.
We still have a big problem with this patch though - it adds features to the pre-driver-model SPI flash implementation and not the driver model implementation! If I somehow have the wrong end of the stick please let me know.
If we accept this sort of patch we will never be done with driver model conversions, as we make it impossible for boards to move forward.
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Hang on, didn't we have this discussion on one of the earlier threads about this? Part of the problem here is that everything else required to do this on DM isn't quite there and Fabio has agreed to (under pain of feature removal later) do the conversion when possible but to not otherwise block getting this feature (and thus some platform(s)) integrated already.
OK that sounds good, thanks.
Idea of making lock ops to common for both dm and non-dm(w/o adding them to dm_spi_ops) is that all generic spi_flash ops are going to use mtd ops similar to nand and Linux spi-nor. I did that mtd conversion in this [1] series and going forward spi_flash{} doesn't have generic ops all are inherited from mtd_info this is my initial plan for moving to spi-nor core addition.
[1] http://u-boot.10912.n7.nabble.com/PATCH-v6-00-23-sf-MTD-support-td233769.htm...
thanks!
Hi Simon,
On Sun, Nov 15, 2015 at 11:34 PM, Simon Glass sjg@chromium.org wrote:
Fabio can you please rework this to remove the pre-driver-model support, and add your new functions to struct dm_spi_flash_ops instead, then convert the affected boards to driver model?
Ok, I will give it a try in converting imx spi driver to DM as a first step, and then moving the lock functions into dm_spi_flash_ops.
Actually I should start with converting imx serial driver to DM as we now have a deadline approaching :-)
On Thu, Nov 05, 2015 at 12:43:22PM -0200, Fabio Estevam wrote:
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
On Thu, Nov 5, 2015 at 1:51 PM, Tom Rini trini@konsulko.com wrote:
On Thu, Nov 05, 2015 at 12:43:22PM -0200, Fabio Estevam wrote:
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
Thanks, Tom!
On Thu, Nov 05, 2015 at 01:51:52PM -0200, Fabio Estevam wrote:
On Thu, Nov 5, 2015 at 1:51 PM, Tom Rini trini@konsulko.com wrote:
On Thu, Nov 05, 2015 at 12:43:22PM -0200, Fabio Estevam wrote:
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
I'm giving this and the rest of the series a build spin now and if it's all good I'll push, otherwise I'll have some more feedback.
Thanks, Tom!
For tqma6s_mba6_spi, at91sam9261ek_dataflash_cs0 this is not bisectable. I'm going to see how the things are at the end of the series only now.
Hi Tom,
On Thu, Nov 5, 2015 at 2:35 PM, Tom Rini trini@konsulko.com wrote:
For tqma6s_mba6_spi, at91sam9261ek_dataflash_cs0 this is not bisectable. I'm going to see how the things are at the end of the series only now.
Ok, I have a fix for this issue. We just need the following patch to be applied after the second patch of this series.
From a435dfc50f03bb861c6aab0e8f5c3d9587a16268 Mon Sep 17 00:00:00 2001
From: Fabio Estevam fabio.estevam@freescale.com Date: Thu, 5 Nov 2015 15:44:56 -0200 Subject: [PATCH] bitops: Add linux/compiler header file
We need to add <linux/compiler.h> so that __always_inline can be understood.
Otherwise we can get errors like:
include/asm-generic/bitops/__fls.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘unsigned’ include/asm-generic/bitops/__ffs.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘un include/asm-generic/bitops/fls.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘int’ include/asm-generic/bitops/fls64.h:18:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘int’ make[1]: *** [arch/arm/lib/asm-offsets.s] Error 1
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com --- include/linux/bitops.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 7b4011f..5a6672f 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -2,6 +2,7 @@ #define _LINUX_BITOPS_H
#include <asm/types.h> +#include <linux/compiler.h>
#define BIT(nr) (1UL << (nr)) #define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
On Thu, Nov 05, 2015 at 03:53:30PM -0200, Fabio Estevam wrote:
Hi Tom,
On Thu, Nov 5, 2015 at 2:35 PM, Tom Rini trini@konsulko.com wrote:
For tqma6s_mba6_spi, at91sam9261ek_dataflash_cs0 this is not bisectable. I'm going to see how the things are at the end of the series only now.
Ok, I have a fix for this issue. We just need the following patch to be applied after the second patch of this series.
From a435dfc50f03bb861c6aab0e8f5c3d9587a16268 Mon Sep 17 00:00:00 2001 From: Fabio Estevam fabio.estevam@freescale.com Date: Thu, 5 Nov 2015 15:44:56 -0200 Subject: [PATCH] bitops: Add linux/compiler header file
We need to add <linux/compiler.h> so that __always_inline can be understood.
Otherwise we can get errors like:
include/asm-generic/bitops/__fls.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘unsigned’ include/asm-generic/bitops/__ffs.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘un include/asm-generic/bitops/fls.h:12:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘int’ include/asm-generic/bitops/fls64.h:18:24: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘int’ make[1]: *** [arch/arm/lib/asm-offsets.s] Error 1
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com
include/linux/bitops.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/linux/bitops.h b/include/linux/bitops.h index 7b4011f..5a6672f 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -2,6 +2,7 @@ #define _LINUX_BITOPS_H
#include <asm/types.h> +#include <linux/compiler.h>
#define BIT(nr) (1UL << (nr))
#define BIT_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
1.9.1
and then patch 17 just needs to remove the #include <linux/compiler.h>.
I can fix it in v8 if you want. I will wait to see your build result for the entire series.
I can fix this much locally. sandbox fails to build at the end: +(sandbox) ../arch/sandbox/include/asm/types.h:53:23: error: ‘CONFIG_SANDBOX_BITS_PER_LONG’ undeclared (first use in this function)
On Thu, Nov 5, 2015 at 5:10 PM, Tom Rini trini@konsulko.com wrote:
I can fix this much locally. sandbox fails to build at the end: +(sandbox) ../arch/sandbox/include/asm/types.h:53:23: error: ‘CONFIG_SANDBOX_BITS_PER_LONG’ undeclared (first use in this function)
Ok, here is the fix on top of patch 18:
--- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -28,10 +28,10 @@ #include <linux/slab.h> #else #include <linux/err.h> -#include <linux/log2.h> #include <ubi_uboot.h> #endif
+#include <linux/log2.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h>
Thanks!
On Thu, Nov 05, 2015 at 06:07:00PM -0200, Fabio Estevam wrote:
On Thu, Nov 5, 2015 at 5:10 PM, Tom Rini trini@konsulko.com wrote:
I can fix this much locally. sandbox fails to build at the end: +(sandbox) ../arch/sandbox/include/asm/types.h:53:23: error: ‘CONFIG_SANDBOX_BITS_PER_LONG’ undeclared (first use in this function)
Ok, here is the fix on top of patch 18:
--- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -28,10 +28,10 @@ #include <linux/slab.h> #else #include <linux/err.h> -#include <linux/log2.h> #include <ubi_uboot.h> #endif
+#include <linux/log2.h> #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h>
Thanks!
OK, we're good. I'll queue up and push things for real in the morning.
On Thu, Nov 5, 2015 at 11:40 PM, Tom Rini trini@konsulko.com wrote:
OK, we're good. I'll queue up and push things for real in the morning.
Excellent! Thanks, Tom!
On Thu, Nov 05, 2015 at 12:43:22PM -0200, Fabio Estevam wrote:
Use the log2 header files from the kernel.
Imported from kernel 4.2.3.
Signed-off-by: Fabio Estevam fabio.estevam@freescale.com Reviewed-by: Tom Rini trini@konsulko.com Reviewed-by: Heiko Schocher hs@denx.de Reviewed-by: Jagan Teki jteki@openedev.com
Applied to u-boot/master, thanks!
participants (7)
-
Bin Meng -
Fabio Estevam -
Fabio Estevam -
Jagan Teki -
Simon Glass -
Tom Rini -
York Sun