[U-Boot] [PATCH v6 01/76] mtd: Add m25p80 driver

This is MTD SPI-NOR driver for ST M25Pxx (and similar) serial flash chips which is written as MTD_UCLASS.
More features will be adding on further patches.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- Makefile | 1 + drivers/mtd/spi-nor/Makefile | 6 ++++++ drivers/mtd/spi-nor/m25p80.c | 37 +++++++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+) create mode 100644 drivers/mtd/spi-nor/Makefile create mode 100644 drivers/mtd/spi-nor/m25p80.c
diff --git a/Makefile b/Makefile index 430dd4f..f299a24 100644 --- a/Makefile +++ b/Makefile @@ -637,6 +637,7 @@ libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ libs-y += drivers/mtd/onenand/ libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ libs-y += drivers/mtd/spi/ +libs-y += drivers/mtd/spi-nor/ libs-y += drivers/net/ libs-y += drivers/net/phy/ libs-y += drivers/pci/ diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile new file mode 100644 index 0000000..a4c19e3 --- /dev/null +++ b/drivers/mtd/spi-nor/Makefile @@ -0,0 +1,6 @@ +# +# Copyright (C) 2016 Jagan Teki jteki@openedev.com +# +# SPDX-License-Identifier: GPL-2.0+ + +obj-$(CONFIG_MTD_M25P80) += m25p80.o diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c new file mode 100644 index 0000000..833a9c3 --- /dev/null +++ b/drivers/mtd/spi-nor/m25p80.c @@ -0,0 +1,37 @@ +/* + * MTD SPI-NOR driver for ST M25Pxx (and similar) serial flash chips + * + * Copyright (C) 2016 Jagan Teki jteki@openedev.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <spi.h> +#include <linux/mtd/mtd.h> + +static int m25p_probe(struct udevice *dev) +{ + struct spi_slave *spi = dev_get_parent_priv(dev); + struct mtd_info *mtd = dev_get_uclass_priv(dev); + + return 0; +} + +static const struct udevice_id m25p_ids[] = { + /* + * Generic compatibility for SPI NOR that can be identified by the + * JEDEC READ ID opcode (0x9F). Use this, if possible. + */ + { .compatible = "jedec,spi-nor" }, + { } +}; + +U_BOOT_DRIVER(m25p80) = { + .name = "m25p80", + .id = UCLASS_MTD, + .of_match = m25p_ids, + .probe = m25p_probe, +};

Added Kconfig entry for MTD_M25P80
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+) create mode 100644 drivers/mtd/spi-nor/Kconfig
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig new file mode 100644 index 0000000..d32486c --- /dev/null +++ b/drivers/mtd/spi-nor/Kconfig @@ -0,0 +1,15 @@ +config MTD_M25P80 + tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)" + help + This enables access to most modern SPI flash chips, used for + program and data storage. Series supported include Atmel AT26DF, + Spansion S25SL, SST 25VF, ST M25P, and Winbond W25X. Other chips + are supported as well. See the driver source for the current list, + or to add other chips. + + Note that the original DataFlash chips (AT45 series, not AT26DF), + need an entirely different driver. + + Set up your spi devices with the right board-specific platform data, + if you want to specify device partitioning or to use a device which + doesn't support the JEDEC ID instruction.

Some of the SPI device drivers at drivers/spi not a real spi controllers, Unlike normal/generic SPI controllers they operates only with SPI-NOR flash devices. these were technically termed as SPI-NOR controllers, Ex: drivers/spi/fsl_qspi.c
The problem with these were resides at drivers/spi is entire SPI layer becomes SPI-NOR flash oriented which is absolutely a wrong indication where SPI layer getting effected more with flash operations - So this SPI-NOR core will resolve this issue by separating all SPI-NOR flash operations from spi layer and creats a generic layer called SPI-NOR core which can be used to interact SPI-NOR to SPI driver interface layer and the SPI-NOR controller driver. The idea is taken from Linux spi-nor framework.
Before SPI-NOR:
----------------------- cmd_sf.c ----------------------- spi_flash.c ----------------------- sf_probe.c ----------------------- spi-uclass ----------------------- spi drivers ----------------------- SPI NOR chip -----------------------
After SPI-NOR:
------------------------------ cmd_sf.c ------------------------------ spi-nor.c ------------------------------- m25p80.c spi nor drivers ------------------------------- spi-uclass SPI NOR chip ------------------------------- spi drivers ------------------------------- SPI NOR chip -------------------------------
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- doc/mtd/spi-nor.txt | 81 +++ drivers/mtd/Kconfig | 2 + drivers/mtd/spi-nor/Makefile | 5 + drivers/mtd/spi-nor/spi-nor-ids.c | 276 ++++++++++ drivers/mtd/spi-nor/spi-nor.c | 1084 +++++++++++++++++++++++++++++++++++++ include/linux/err.h | 5 + include/linux/mtd/spi-nor.h | 253 +++++++++ 7 files changed, 1706 insertions(+) create mode 100644 doc/mtd/spi-nor.txt create mode 100644 drivers/mtd/spi-nor/spi-nor-ids.c create mode 100644 drivers/mtd/spi-nor/spi-nor.c create mode 100644 include/linux/mtd/spi-nor.h
diff --git a/doc/mtd/spi-nor.txt b/doc/mtd/spi-nor.txt new file mode 100644 index 0000000..8b381c1 --- /dev/null +++ b/doc/mtd/spi-nor.txt @@ -0,0 +1,81 @@ + SPI NOR framework + ============================================ + +Part I - Why do we need this framework? +--------------------------------------- + +SPI bus controllers (drivers/spi/) only deal with streams of bytes; the bus +controller operates agnostic of the specific device attached. However, some +controllers (such as Freescale's QuadSPI controller) cannot easily handle +arbitrary streams of bytes, but rather are designed specifically for SPI NOR. + +In particular, Freescale's QuadSPI controller must know the NOR commands to +find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of +opcodes, addresses, or data payloads; a SPI controller simply knows to send or +receive bytes (Tx and Rx). Therefore, we must define a new layering scheme under +which the controller driver is aware of the opcodes, addressing, and other +details of the SPI NOR protocol. + +Part II - How does the framework work? +-------------------------------------- + +This framework just adds a new layer between the MTD and the SPI bus driver. +With this new layer, the SPI NOR controller driver does not depend on the +m25p80 code anymore. + +Before SPI-NOR: + + ----------------------- + cmd_sf.c + ----------------------- + spi_flash.c + ----------------------- + sf_probe.c + ----------------------- + spi-uclass + ----------------------- + spi drivers + ----------------------- + SPI NOR chip + ----------------------- + +After SPI-NOR: + + ------------------------------ + cmd_sf.c + ------------------------------ + spi-nor.c + ------------------------------- + m25p80.c spi nor drivers + ------------------------------- + spi-uclass SPI NOR chip + ------------------------------- + spi drivers + ------------------------------- + SPI NOR chip + ------------------------------- + +SPI-NOR with MTD: + + ------------------------------ + cmd_sf.c + ------------------------------ + MTD core + ------------------------------ + spi-nor.c + ------------------------------- + m25p80.c spi nor drivers + ------------------------------- + spi-uclass SPI NOR chip + ------------------------------- + spi bus drivers + ------------------------------- + SPI NOR chip + ------------------------------- + +Part III - How can drivers use the framework? +--------------------------------------------- + +The main API is spi_nor_scan(). Before you call the hook, a driver should +initialize the necessary fields for spi_nor{}. Please see +drivers/mtd/spi-nor/spi-nor.c for detail. diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index c58841e..2c8846b 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -33,3 +33,5 @@ endmenu source "drivers/mtd/nand/Kconfig"
source "drivers/mtd/spi/Kconfig" + +source "drivers/mtd/spi-nor/Kconfig" diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index a4c19e3..9ab6e3d 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -3,4 +3,9 @@ # # SPDX-License-Identifier: GPL-2.0+
+ifdef CONFIG_MTD_SPI_NOR +obj-y += spi-nor.o +obj-y += spi-nor-ids.o +endif + obj-$(CONFIG_MTD_M25P80) += m25p80.o diff --git a/drivers/mtd/spi-nor/spi-nor-ids.c b/drivers/mtd/spi-nor/spi-nor-ids.c new file mode 100644 index 0000000..2599731 --- /dev/null +++ b/drivers/mtd/spi-nor/spi-nor-ids.c @@ -0,0 +1,276 @@ +/* + * SPI NOR ID's. + * Cloned most of the code from the sf_params.c and Linux spi-nor framework. + * + * Copyright (C) 2016 Jagan Teki jteki@openedev.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/mtd/spi-nor.h> + +/* Used when the "_ext_id" is two bytes at most */ +#define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flash_read, _flags) \ + .id = { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff, \ + ((_ext_id) >> 8) & 0xff, \ + (_ext_id) & 0xff, \ + }, \ + .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \ + .sector_size = (_sector_size), \ + .n_sectors = (_n_sectors), \ + .page_size = 256, \ + .flash_read = _flash_read, \ + .flags = (_flags), + +#define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors, _flash_read, _flags) \ + .id = { \ + ((_jedec_id) >> 16) & 0xff, \ + ((_jedec_id) >> 8) & 0xff, \ + (_jedec_id) & 0xff, \ + ((_ext_id) >> 16) & 0xff, \ + ((_ext_id) >> 8) & 0xff, \ + (_ext_id) & 0xff, \ + }, \ + .id_len = 6, \ + .sector_size = (_sector_size), \ + .n_sectors = (_n_sectors), \ + .page_size = 256, \ + .flash_read = _flash_read, \ + .flags = (_flags), + +#define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flash_read, _flags) \ + .sector_size = (_sector_size), \ + .n_sectors = (_n_sectors), \ + .page_size = (_page_size), \ + .addr_width = (_addr_width), \ + .flash_read = _flash_read, \ + .flags = (_flags), + +/* NOTE: double check command sets and memory organization when you add + * more nor chips. This current list focusses on newer chips, which + * have been converging on command sets which including JEDEC ID. + * + * All newly added entries should describe *hardware* and should use SECT_4K + * (or SECT_4K_PMC) if hardware supports erasing 4 KiB sectors. For usage + * scenarios excluding small sectors there is config option that can be + * disabled: CONFIG_MTD_SPI_NOR_USE_4K_SECTORS. + * For historical (and compatibility) reasons (before we got above config) some + * old entries may be missing 4K flag. + */ +const struct spi_nor_info spi_nor_ids[] = { +#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ + /* Atmel -- some are (confusingly) marketed as "DataFlash" */ + { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, + { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + + { "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + + { "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K) }, + { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + + { "at45db011d", INFO(0x1f2200, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, + { "at45db021d", INFO(0x1f2300, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "at45db041d", INFO(0x1f2400, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K) }, + { "at45db161d", INFO(0x1f2600, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "at45db321d", INFO(0x1f2700, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "at45db641d", INFO(0x1f2800, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, +#endif +#ifdef CONFIG_SPI_FLASH_EON /* EON */ + /* EON -- en25xxx */ + { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "en25q128b", INFO(0x1c3018, 0, 64 * 1024, 256, SNOR_READ_BASE, 0) }, + { "en25qh128", INFO(0x1c7018, 0, 64 * 1024, 256, SNOR_READ_BASE, 0) }, + { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, SNOR_READ_BASE, 0) }, + { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, +#endif + /* ESMT */ + { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + + /* Everspin */ + { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + + /* Fujitsu */ + { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SNOR_READ_BASE, SPI_NOR_NO_ERASE) }, + +#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ + /* GigaDevice */ + { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SNOR_READ_BASE, SECT_4K) }, + { "gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, +#endif + /* Intel/Numonyx -- xxxs33b */ + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + +#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ + /* ISSI */ + { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SNOR_READ_BASE, SECT_4K) }, + { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, SNOR_READ_BASE, 0) }, +#endif +#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ + /* Macronix */ + { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SNOR_READ_BASE, SECT_4K) }, + { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, + { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ + /* Micron */ + { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K | USE_FSR) }, + { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K | USE_FSR) }, + { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K | USE_FSR) }, +#endif + /* PMC */ + { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SNOR_READ_BASE, SECT_4K_PMC) }, + { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SNOR_READ_BASE, SECT_4K_PMC) }, + { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + +#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ + /* Spansion -- single (large) sector size only, at least + * for the chips listed here (without boot sectors). + */ + { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SNOR_READ_FULL, 0) }, + { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, SNOR_READ_FULL, 0) }, + { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, SNOR_READ_FULL, 0) }, + { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, SNOR_READ_FULL, 0) }, + { "s25fl512s1", INFO(0x010220, 0x4d01, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25fl512s2", INFO(0x010220, 0x4f00, 256 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s70fl01gs", INFO(0x010221, 0x4d00, 256 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, + { "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, SNOR_READ_BASE, 0) }, + { "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + { "s25sl032a", INFO(0x010215, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "s25sl064a", INFO(0x010216, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "s25fl008k", INFO(0xef4014, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K) }, + { "s25fl016k", INFO(0xef4015, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "s25fl064k", INFO(0xef4017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "s25fl132k", INFO(0x014016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, +#endif +#ifdef CONFIG_SPI_FLASH_SST /* SST */ + /* SST -- large erase sizes are "overlays", "sectors" are 4K */ + { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25vf016b", INFO(0xbf2541, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25vf032b", INFO(0xbf254a, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25vf064c", INFO(0xbf254b, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, + { "sst25wf040b", INFO(0x621613, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, + { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ + /* ST Microelectronics -- newer production may have feature updates */ + { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, SNOR_READ_BASE, 0) }, + { "m25p10", INFO(0x202011, 0, 32 * 1024, 4, SNOR_READ_BASE, 0) }, + { "m25p20", INFO(0x202012, 0, 64 * 1024, 4, SNOR_READ_BASE, 0) }, + { "m25p40", INFO(0x202013, 0, 64 * 1024, 8, SNOR_READ_BASE, 0) }, + { "m25p80", INFO(0x202014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "m25p16", INFO(0x202015, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + { "m25p32", INFO(0x202016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, SNOR_READ_BASE, 0) }, + + { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, SNOR_READ_BASE, 0) }, + { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, SNOR_READ_BASE, 0) }, + { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4, SNOR_READ_BASE, 0) }, + { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8, SNOR_READ_BASE, 0) }, + { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64, SNOR_READ_BASE, 0) }, + + { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2, SNOR_READ_BASE, 0) }, + { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + + { "m25pe20", INFO(0x208012, 0, 64 * 1024, 4, SNOR_READ_BASE, 0) }, + { "m25pe80", INFO(0x208014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "m25pe16", INFO(0x208015, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + + { "m25px16", INFO(0x207115, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "m25px32", INFO(0x207116, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "m25px32-s0", INFO(0x207316, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "m25px32-s1", INFO(0x206316, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, + { "m25px80", INFO(0x207114, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, +#endif +#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ + /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ + { "W25P80", INFO(0xef2014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, + { "W25P16", INFO(0xef2015, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, + { "W25P32", INFO(0xef2016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, + { "w25x05", INFO(0xef3010, 0, 64 * 1024, 1, SNOR_READ_BASE, SECT_4K) }, + { "w25x10", INFO(0xef3011, 0, 64 * 1024, 2, SNOR_READ_BASE, SECT_4K) }, + { "w25x20", INFO(0xef3012, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, + { "w25x40", INFO(0xef3013, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, + { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K) }, + { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SNOR_READ_BASE, SECT_4K) }, + { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, + { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, + { "w25q80bl", INFO(0xef4014, 0, 64 * 1024, 16, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + {" w25q16cl", INFO(0xef4015, 0, 64 * 1024, 32, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q128", INFO(0xef4018, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q80", INFO(0xef5014, 0, 64 * 1024, 16, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q16dw", INFO(0xef6015, 0, 64 * 1024, 32, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q32dw", INFO(0xef6016, 0, 64 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, + { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, +#endif + /* Catalyst / On Semiconductor -- non-JEDEC */ + { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { "cat25c03", CAT25_INFO( 32, 8, 16, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { "cat25c09", CAT25_INFO( 128, 8, 32, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { "cat25c17", CAT25_INFO( 256, 8, 32, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { "cat25128", CAT25_INFO(2048, 8, 64, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, + { }, +}; diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c new file mode 100644 index 0000000..f142ae4 --- /dev/null +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -0,0 +1,1084 @@ +/* + * SPI NOR Core - cloned most of the code from the spi_flash.c + * + * Copyright (C) 2016 Jagan Teki jteki@openedev.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <malloc.h> +#include <mapmem.h> + +#include <linux/math64.h> +#include <linux/log2.h> +#include <linux/mtd/spi-nor.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* Set write enable latch with Write Enable command */ +static inline int write_enable(struct spi_nor *nor) +{ + return nor->write_reg(nor, SNOR_OP_WREN, NULL, 0); +} + +/* Re-set write enable latch with Write Disable command */ +static inline int write_disable(struct spi_nor *nor) +{ + return nor->write_reg(nor, SNOR_OP_WRDI, NULL, 0); +} + +static void spi_nor_addr(u32 addr, u8 *cmd) +{ + /* cmd[0] is actual command */ + cmd[1] = addr >> 16; + cmd[2] = addr >> 8; + cmd[3] = addr >> 0; +} + +static int read_sr(struct spi_nor *nor) +{ + u8 sr; + int ret; + + ret = nor->read_reg(nor, SNOR_OP_RDSR, &sr, 1); + if (ret < 0) { + debug("spi-nor: fail to read status register\n"); + return ret; + } + + return sr; +} + +static int read_fsr(struct spi_nor *nor) +{ + u8 fsr; + int ret; + + ret = nor->read_reg(nor, SNOR_OP_RDFSR, &fsr, 1); + if (ret < 0) { + debug("spi-nor: fail to read flag status register\n"); + return ret; + } + + return fsr; +} + +static int write_sr(struct spi_nor *nor, u8 ws) +{ + nor->cmd_buf[0] = ws; + return nor->write_reg(nor, SNOR_OP_WRSR, nor->cmd_buf, 1); +} + +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +static int read_cr(struct spi_nor *nor) +{ + u8 cr; + int ret; + + ret = nor->read_reg(nor, SNOR_OP_RDCR, &cr, 1); + if (ret < 0) { + debug("spi-nor: fail to read config register\n"); + return ret; + } + + return cr; +} + +/* + * Write status Register and configuration register with 2 bytes + * - First byte will be written to the status register. + * - Second byte will be written to the configuration register. + * Return negative if error occured. + */ +static int write_sr_cr(struct spi_nor *nor, u16 val) +{ + nor->cmd_buf[0] = val & 0xff; + nor->cmd_buf[1] = (val >> 8); + + return nor->write_reg(nor, SNOR_OP_WRSR, nor->cmd_buf, 2); +} +#endif + +#ifdef CONFIG_SPI_FLASH_STMICRO +static int read_evcr(struct spi_nor *nor) +{ + u8 evcr; + int ret; + + ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &evcr, 1); + if (ret < 0) { + debug("spi-nor: fail to read EVCR\n"); + return ret; + } + + return evcr; +} + +static int write_evcr(struct spi_nor *nor, u8 evcr) +{ + nor->cmd_buf[0] = evcr; + return nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1); +} +#endif + +static int spi_nor_sr_ready(struct spi_nor *nor) +{ + int sr = read_sr(nor); + if (sr < 0) + return sr; + else + return !(sr & SR_WIP); +} + +static int spi_nor_fsr_ready(struct spi_nor *nor) +{ + int fsr = read_fsr(nor); + if (fsr < 0) + return fsr; + else + return fsr & FSR_READY; +} + +static int spi_nor_ready(struct spi_nor *nor) +{ + int sr, fsr; + + sr = spi_nor_sr_ready(nor); + if (sr < 0) + return sr; + + fsr = 1; + if (nor->flags & SNOR_F_USE_FSR) { + fsr = spi_nor_fsr_ready(nor); + if (fsr < 0) + return fsr; + } + + return sr && fsr; +} + +static int spi_nor_wait_till_ready(struct spi_nor *nor, unsigned long timeout) +{ + int timebase, ret; + + timebase = get_timer(0); + + while (get_timer(timebase) < timeout) { + ret = spi_nor_ready(nor); + if (ret < 0) + return ret; + if (ret) + return 0; + } + + printf("spi-nor: Timeout!\n"); + + return -ETIMEDOUT; +} + +#ifdef CONFIG_SPI_FLASH_BAR +static int spi_nor_write_bar(struct spi_nor *nor, u32 offset) +{ + u8 bank_sel; + int ret; + + bank_sel = offset / (SNOR_16MB_BOUN << nor->shift); + if (bank_sel == nor->bank_curr) + goto bar_end; + + write_enable(nor); + + nor->cmd_buf[0] = bank_sel; + ret = nor->write_reg(nor, nor->bar_program_opcode, nor->cmd_buf, 1); + if (ret < 0) { + debug("spi-nor: fail to write bank register\n"); + return ret; + } + + ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG); + if (ret < 0) + return ret; + +bar_end: + nor->bank_curr = bank_sel; + return nor->bank_curr; +} + +static int spi_nor_read_bar(struct spi_nor *nor, const struct spi_nor_info *info) +{ + u8 curr_bank = 0; + int ret; + + if (flash->size <= SNOR_16MB_BOUN) + goto bar_end; + + switch (JEDEC_MFR(info)) { + case SNOR_MFR_SPANSION: + nor->bar_read_opcode = SNOR_OP_BRRD; + nor->bar_program_opcode = SNOR_OP_BRWR; + break; + default: + nor->bar_read_opcode = SNOR_OP_RDEAR; + nor->bar_program_opcode = SNOR_OP_WREAR; + } + + ret = nor->read_reg(nor, nor->bar_read_opcode, &curr_bank, 1); + if (ret) { + debug("spi-nor: fail to read bank addr register\n"); + return ret; + } + +bar_end: + nor->bank_curr = curr_bank; + return 0; +} +#endif + +#ifdef CONFIG_SF_DUAL_FLASH +static void spi_nor_dual(struct spi_nor *nor, u32 *addr) +{ + struct spi_flash *flash = nor->flash; + + switch (nor->dual) { + case SNOR_DUAL_STACKED: + if (*addr >= (flash->size >> 1)) { + *addr -= flash->size >> 1; + nor->flags |= SNOR_F_U_PAGE; + } else { + nor->flags &= ~SNOR_F_U_PAGE; + } + break; + case SNOR_DUAL_PARALLEL: + *addr >>= nor->shift; + break; + default: + debug("spi-nor: Unsupported dual_flash=%d\n", nor->dual); + break; + } +} +#endif + +#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) +static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, + u32 *len) +{ + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + int shift = ffs(mask) - 1; + int pow; + + if (!(sr & mask)) { + /* No protection */ + *ofs = 0; + *len = 0; + } else { + pow = ((sr & mask) ^ mask) >> shift; + *len = flash->size >> pow; + *ofs = flash->size - *len; + } +} + +/* + * Return 1 if the entire region is locked, 0 otherwise + */ +static int stm_is_locked_sr(struct spi_nor *nor, u32 ofs, u32 len, u8 sr) +{ + loff_t lock_offs; + u32 lock_len; + + stm_get_locked_range(nor, sr, &lock_offs, &lock_len); + + return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs); +} + +/* + * Check if a region of the flash is (completely) locked. See stm_lock() for + * more info. + * + * Returns 1 if entire region is locked, 0 if any portion is unlocked, and + * negative on errors. + */ +static int stm_is_locked(struct spi_nor *nor, u32 ofs, size_t len) +{ + int status; + + status = read_sr(nor); + if (status < 0) + return status; + + return stm_is_locked_sr(nor, ofs, len, status); +} + +/* + * Lock a region of the flash. Compatible with ST Micro and similar flash. + * Supports only the block protection bits BP{0,1,2} in the status register + * (SR). Does not support these features found in newer SR bitfields: + * - TB: top/bottom protect - only handle TB=0 (top protect) + * - SEC: sector/block protect - only handle SEC=0 (block protect) + * - CMP: complement protect - only support CMP=0 (range is not complemented) + * + * Sample table portion for 8MB flash (Winbond w25q64fw): + * + * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion + * -------------------------------------------------------------------------- + * X | X | 0 | 0 | 0 | NONE | NONE + * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64 + * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32 + * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16 + * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8 + * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4 + * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2 + * X | X | 1 | 1 | 1 | 8 MB | ALL + * + * Returns negative on errors, 0 on success. + */ +static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len) +{ + u8 status_old, status_new; + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + u8 shift = ffs(mask) - 1, pow, val; + + status_old = read_sr(nor); + if (status_old < 0) + return status_old; + + /* SPI NOR always locks to the end */ + if (ofs + len != flash->size) { + /* Does combined region extend to end? */ + if (!stm_is_locked_sr(nor, ofs + len, flash->size - ofs - len, + status_old)) + return -EINVAL; + len = flash->size - ofs; + } + + /* + * Need smallest pow such that: + * + * 1 / (2^pow) <= (len / size) + * + * so (assuming power-of-2 size) we do: + * + * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len)) + */ + pow = ilog2(flash->size) - ilog2(len); + val = mask - (pow << shift); + if (val & ~mask) + return -EINVAL; + + /* Don't "lock" with no region! */ + if (!(val & mask)) + return -EINVAL; + + status_new = (status_old & ~mask) | val; + + /* Only modify protection if it will not unlock other areas */ + if ((status_new & mask) <= (status_old & mask)) + return -EINVAL; + + write_enable(nor); + return write_sr(nor, status_new); +} + +/* + * Unlock a region of the flash. See stm_lock() for more info + * + * Returns negative on errors, 0 on success. + */ +static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len) +{ + uint8_t status_old, status_new; + u8 mask = SR_BP2 | SR_BP1 | SR_BP0; + u8 shift = ffs(mask) - 1, pow, val; + + status_old = read_sr(nor); + if (status_old < 0) + return status_old; + + /* Cannot unlock; would unlock larger region than requested */ + if (stm_is_locked_sr(nor, status_old, ofs - flash->erase_size, + nor->erase_size)) + return -EINVAL; + /* + * Need largest pow such that: + * + * 1 / (2^pow) >= (len / size) + * + * so (assuming power-of-2 size) we do: + * + * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len)) + */ + pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len)); + if (ofs + len == flash->size) { + val = 0; /* fully unlocked */ + } else { + val = mask - (pow << shift); + /* Some power-of-two sizes are not supported */ + if (val & ~mask) + return -EINVAL; + } + + status_new = (status_old & ~mask) | val; + + /* Only modify protection if it will not lock other areas */ + if ((status_new & mask) >= (status_old & mask)) + return -EINVAL; + + write_enable(nor); + return write_sr(nor, status_new); +} +#endif + +static const struct spi_nor_info *spi_nor_id(struct spi_nor *nor) +{ + int tmp; + u8 id[SPI_NOR_MAX_ID_LEN]; + const struct spi_nor_info *info; + + tmp = nor->read_reg(nor, SNOR_OP_RDID, id, SPI_NOR_MAX_ID_LEN); + if (tmp < 0) { + printf("spi-nor: error %d reading JEDEC ID\n", tmp); + return ERR_PTR(tmp); + } + + info = spi_nor_ids; + for (; info->name != NULL; info++) { + if (info->id_len) { + if (!memcmp(info->id, id, info->id_len)) + return info; + } + } + + printf("spi-nor: unrecognized JEDEC id bytes: %02x, %2x, %2x\n", + id[0], id[1], id[2]); + return ERR_PTR(-ENODEV); +} + +static int spi_nor_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + struct spi_nor *nor = flash->nor; + u32 erase_size, erase_addr; + u8 cmd[SNOR_MAX_CMD_SIZE]; + int ret = -1; + + erase_size = nor->erase_size; + if (offset % erase_size || len % erase_size) { + debug("spi-nor: Erase offset/length not multiple of erase size\n"); + return -1; + } + + if (flash->flash_is_locked) { + if (flash->flash_is_locked(flash, offset, len) > 0) { + printf("offset 0x%x is protected and cannot be erased\n", + offset); + return -EINVAL; + } + } + + cmd[0] = flash->erase_opcode; + while (len) { + erase_addr = offset; + +#ifdef CONFIG_SF_DUAL_FLASH + if (nor->dual > SNOR_DUAL_SINGLE) + spi_nor_dual(nor, &erase_addr); +#endif +#ifdef CONFIG_SPI_FLASH_BAR + ret = spi_nor_write_bar(nor, erase_addr); + if (ret < 0) + return ret; +#endif + spi_nor_addr(erase_addr, cmd); + + debug("spi-nor: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], + cmd[2], cmd[3], erase_addr); + + write_enable(nor); + + ret = nor->write(nor, cmd, sizeof(cmd), NULL, 0); + if (ret < 0) + break; + + ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_ERASE); + if (ret < 0) + return ret; + + offset += erase_size; + len -= erase_size; + } + + return ret; +} + +int spi_nor_write(struct spi_flash *flash, u32 offset, + size_t len, const void *buf) +{ + struct spi_nor *nor = flash->nor; + unsigned long byte_addr, page_size; + u32 write_addr; + size_t chunk_len, actual; + u8 cmd[SNOR_MAX_CMD_SIZE]; + int ret = -1; + + page_size = nor->page_size; + + if (flash->flash_is_locked) { + if (flash->flash_is_locked(flash, offset, len) > 0) { + printf("offset 0x%x is protected and cannot be written\n", + offset); + return -EINVAL; + } + } + + cmd[0] = nor->program_opcode; + for (actual = 0; actual < len; actual += chunk_len) { + write_addr = offset; + +#ifdef CONFIG_SF_DUAL_FLASH + if (nor->dual > SNOR_DUAL_SINGLE) + spi_nor_dual(nor, &write_addr); +#endif +#ifdef CONFIG_SPI_FLASH_BAR + ret = spi_nor_write_bar(nor, write_addr); + if (ret < 0) + return ret; +#endif + byte_addr = offset % page_size; + chunk_len = min(len - actual, (size_t)(page_size - byte_addr)); + + if (nor->max_write_size) + chunk_len = min(chunk_len, + (size_t)nor->max_write_size); + + spi_nor_addr(write_addr, cmd); + + debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); + + write_enable(nor); + + ret = nor->write(nor, cmd, sizeof(cmd), + buf + actual, chunk_len); + if (ret < 0) + break; + + ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG); + if (ret < 0) + return ret; + + offset += chunk_len; + } + + return ret; +} + +int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data) +{ + struct spi_nor *nor = flash->nor; + u32 remain_len, read_len, read_addr; + u8 *cmd, cmdsz; + int bank_sel = 0; + int ret = -1; + + /* Handle memory-mapped SPI */ + if (nor->memory_map) { + ret = nor->read_mmap(nor, data, nor->memory_map + offset, len); + if (ret) { + debug("spi-nor: mmap read failed\n"); + return ret; + } + + return ret; + } + + cmdsz = SNOR_MAX_CMD_SIZE + nor->read_dummy; + cmd = calloc(1, cmdsz); + if (!cmd) { + debug("spi-nor: Failed to allocate cmd\n"); + return -ENOMEM; + } + + cmd[0] = nor->read_opcode; + while (len) { + read_addr = offset; + +#ifdef CONFIG_SF_DUAL_FLASH + if (nor->dual > SNOR_DUAL_SINGLE) + spi_nor_dual(nor, &read_addr); +#endif +#ifdef CONFIG_SPI_FLASH_BAR + ret = spi_nor_write_bar(nor, read_addr); + if (ret < 0) + return ret; + bank_sel = nor->bank_curr; +#endif + remain_len = ((SNOR_16MB_BOUN << nor->shift) * + (bank_sel + 1)) - offset; + if (len < remain_len) + read_len = len; + else + read_len = remain_len; + + spi_nor_addr(read_addr, cmd); + + ret = nor->read(nor, cmd, cmdsz, data, read_len); + if (ret < 0) + break; + + offset += read_len; + len -= read_len; + data += read_len; + } + + free(cmd); + return ret; +} + +#ifdef CONFIG_SPI_FLASH_SST +static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf) +{ + int ret; + u8 cmd[4] = { + SNOR_OP_BP, + offset >> 16, + offset >> 8, + offset, + }; + + debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06x }\n", + buf, cmd[0], offset); + + ret = write_enable(nor); + if (ret) + return ret; + + ret = nor->write(nor, cmd, sizeof(cmd), buf, 1); + if (ret) + return ret; + + return spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG); +} + +int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) +{ + struct spi_nor *nor = flash->nor; + size_t actual, cmd_len; + int ret; + u8 cmd[4]; + + /* If the data is not word aligned, write out leading single byte */ + actual = offset % 2; + if (actual) { + ret = sst_byte_write(nor, offset, buf); + if (ret) + goto done; + } + offset += actual; + + ret = write_enable(nor); + if (ret) + goto done; + + cmd_len = 4; + cmd[0] = SNOR_OP_AAI_WP; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + + for (; actual < len - 1; actual += 2) { + debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06x }\n", + buf + actual, cmd[0], offset); + + ret = nor->write(nor, cmd, cmd_len, buf + actual, 2); + if (ret) { + debug("spi-nor: sst word program failed\n"); + break; + } + + ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG); + if (ret) + break; + + cmd_len = 1; + offset += 2; + } + + if (!ret) + ret = write_disable(nor); + + /* If there is a single trailing byte, write it out */ + if (!ret && actual != len) + ret = sst_byte_write(nor, offset, buf + actual); + + done: + return ret; +} + +int sst_write_bp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) +{ + struct spi_nor *nor = flash->nor; + size_t actual; + int ret; + + for (actual = 0; actual < len; actual++) { + ret = sst_byte_write(nor, offset, buf + actual); + if (ret) { + debug("spi-nor: sst byte program failed\n"); + break; + } + offset++; + } + + if (!ret) + ret = write_disable(nor); + + return ret; +} +#endif + +#ifdef CONFIG_SPI_FLASH_MACRONIX +static int macronix_quad_enable(struct spi_nor *nor) +{ + int ret, val; + + val = read_sr(nor); + if (val < 0) + return val; + + if (val & SR_QUAD_EN_MX) + return 0; + + write_enable(nor); + + ret = write_sr(nor, val | SR_QUAD_EN_MX); + if (ret < 0) + return ret; + + if (spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG)) + return 1; + + ret = read_sr(nor); + if (!(ret > 0 && (ret & SR_QUAD_EN_MX))) { + printf("spi-nor: Macronix Quad bit not set\n"); + return -EINVAL; + } + + return 0; +} +#endif + +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +static int spansion_quad_enable(struct spi_nor *nor) +{ + int ret, val; + + val = read_cr(nor); + if (val < 0) + return val; + + if (val & CR_QUAD_EN_SPAN) + return 0; + + write_enable(nor); + + ret = write_sr_cr(nor, val | CR_QUAD_EN_SPAN); + if (ret < 0) + return ret; + + if (spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG)) + return 1; + + /* read back and check it */ + ret = read_cr(nor); + if (!(ret > 0 && (ret & CR_QUAD_EN_SPAN))) { + printf("spi-nor: Spansion Quad bit not set\n"); + return -EINVAL; + } + + return 0; +} +#endif + +#ifdef CONFIG_SPI_FLASH_STMICRO +static int micron_quad_enable(struct spi_nor *nor) +{ + int ret, val; + + val = read_evcr(nor); + if (val < 0) + return val; + + if (!(val & EVCR_QUAD_EN_MICRON)) + return 0; + + ret = write_evcr(nor, val & ~EVCR_QUAD_EN_MICRON); + if (ret < 0) + return ret; + + /* read EVCR and check it */ + ret = read_evcr(nor); + if (!(ret > 0 && !(ret & EVCR_QUAD_EN_MICRON))) { + printf("spi-nor: Micron EVCR Quad bit not clear\n"); + return -EINVAL; + } + + return ret; +} +#endif + +static int set_quad_mode(struct spi_nor *nor, const struct spi_nor_info *info) +{ + switch (JEDEC_MFR(info)) { +#ifdef CONFIG_SPI_FLASH_MACRONIX + case SNOR_MFR_MACRONIX: + return macronix_quad_enable(nor); +#endif +#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) + case SNOR_MFR_SPANSION: + case SNOR_MFR_WINBOND: + return spansion_quad_enable(nor); +#endif +#ifdef CONFIG_SPI_FLASH_STMICRO + case SNOR_MFR_MICRON: + return micron_quad_enable(nor); +#endif + default: + printf("spi-nor: Need set QEB func for %02x flash\n", + JEDEC_MFR(info)); + return -1; + } +} + +#if CONFIG_IS_ENABLED(OF_CONTROL) +int spi_nor_decode_fdt(const void *blob, struct spi_nor *nor) +{ + fdt_addr_t addr; + fdt_size_t size; + int node; + + /* If there is no node, do nothing */ + node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH); + if (node < 0) + return 0; + + addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); + if (addr == FDT_ADDR_T_NONE) { + debug("%s: Cannot decode address\n", __func__); + return 0; + } + + if (flash->size != size) { + debug("%s: Memory map must cover entire device\n", __func__); + return -1; + } + nor->memory_map = map_sysmem(addr, size); + + return 0; +} +#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ + +static int spi_nor_check(struct spi_nor *nor) +{ + if (!nor->read || !nor->write || + !nor->read_reg || !nor->write_reg) { + pr_err("spi-nor: please fill all the necessary fields!\n"); + return -EINVAL; + } + + return 0; +} + +int spi_nor_scan(struct spi_nor *nor) +{ + const struct spi_nor_info *info = NULL; + static u8 flash_read_cmd[] = { + SNOR_OP_READ, + SNOR_OP_READ_FAST, + SNOR_OP_READ_1_1_2, + SNOR_OP_READ_1_1_4, + SNOR_OP_READ_1_1_2_IO, + SNOR_OP_READ_1_1_4_IO }; + u8 cmd; + int ret; + + ret = spi_nor_check(nor); + if (ret) + return ret; + + info = spi_nor_id(nor); + if (IS_ERR_OR_NULL(info)) + return -ENOENT; + + /* + * Atmel, SST, Macronix, and others serial NOR tend to power up + * with the software protection bits set + */ + if (JEDEC_MFR(info) == SNOR_MFR_ATMEL || + JEDEC_MFR(info) == SNOR_MFR_MACRONIX || + JEDEC_MFR(info) == SNOR_MFR_SST) { + write_enable(nor); + write_sr(nor, 0); + } + + flash->name = info->name; + + if (info->flags & USE_FSR) + nor->flags |= SNOR_F_USE_FSR; + + if (info->flags & SST_WRITE) + nor->flags |= SNOR_F_SST_WRITE; + + flash->write = spi_nor_write; + flash->erase = spi_nor_erase; + flash->read = spi_nor_read; +#if defined(CONFIG_SPI_FLASH_SST) + if (nor->flags & SNOR_F_SST_WRITE) { + if (nor->mode & SNOR_WRITE_1_1_BYTE) + flash->write = sst_write_bp; + else + flash->write = sst_write_wp; + } +#endif + +#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) + /* NOR protection support for STmicro/Micron chips and similar */ + if (JEDEC_MFR(info) == SNOR_MFR_MICRON || + JEDEC_MFR(info) == SNOR_MFR_SST) { + nor->flash_lock = stm_lock; + nor->flash_unlock = stm_unlock; + nor->flash_is_locked = stm_is_locked; + } +#endif + + if (flash->flash_lock && flash->flash_unlock && flash->flash_is_locked) { + flash->flash_lock = spi_nor_lock; + flash->flash_unlock = spi_nor_unlock; + flash->flash_is_locked = spi_nor_is_locked; + } + + /* Compute the flash size */ + nor->shift = (nor->dual & SNOR_DUAL_PARALLEL) ? 1 : 0; + nor->page_size = info->page_size; + /* + * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the + * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with + * the 0x4d00 Extended JEDEC code have 512b pages. All of the others + * have 256b pages. + */ + if (JEDEC_EXT(info) == 0x4d00) { + if ((JEDEC_ID(info) != 0x0215) && + (JEDEC_ID(info) != 0x0216)) + nor->page_size = 512; + } + nor->page_size <<= nor->shift; + flash->sector_size = info->sector_size << nor->shift; + flash->size = flash->sector_size * info->n_sectors << nor->shift; +#ifdef CONFIG_SF_DUAL_FLASH + if (nor->dual & SNOR_DUAL_STACKED) + flash->size <<= 1; +#endif + +#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS + /* prefer "small sector" erase if possible */ + if (info->flags & SECT_4K) { + nor->erase_opcode = SNOR_OP_BE_4K; + nor->erase_size = 4096 << nor->shift; + } else if (info->flags & SECT_4K_PMC) { + nor->erase_opcode = SNOR_OP_BE_4K_PMC; + nor->erase_size = 4096; + } else +#endif + { + nor->erase_opcode = SNOR_OP_SE; + nor->erase_size = flash->sector_size; + } + + /* Now erase size becomes valid sector size */ + flash->sector_size = nor->erase_size; + + /* Look for the fastest read cmd */ + cmd = fls(info->flash_read & nor->read_mode); + if (cmd) { + cmd = flash_read_cmd[cmd - 1]; + nor->read_opcode = cmd; + } else { + /* Go for default supported read cmd */ + nor->read_opcode = SNOR_OP_READ_FAST; + } + + /* Not require to look for fastest only two write cmds yet */ + if (info->flags & SNOR_WRITE_QUAD && nor->mode & SNOR_WRITE_1_1_4) + nor->program_opcode = SNOR_OP_QPP; + else + /* Go for default supported write cmd */ + nor->program_opcode = SNOR_OP_PP; + + /* Set the quad enable bit - only for quad commands */ + if ((nor->read_opcode == SNOR_OP_READ_1_1_4) || + (nor->read_opcode == SNOR_OP_READ_1_1_4_IO) || + (nor->program_opcode == SNOR_OP_QPP)) { + ret = set_quad_mode(nor, info); + if (ret) { + debug("spi-nor: quad mode not supported for %02x\n", + JEDEC_MFR(info)); + return ret; + } + } + + /* read_dummy: dummy byte is determined based on the + * dummy cycles of a particular command. + * Fast commands - read_dummy = dummy_cycles/8 + * I/O commands- read_dummy = (dummy_cycles * no.of lines)/8 + * For I/O commands except cmd[0] everything goes on no.of lines + * based on particular command but incase of fast commands except + * data all go on single line irrespective of command. + */ + switch (nor->read_opcode) { + case SNOR_OP_READ_1_1_4_IO: + nor->read_dummy = 2; + break; + case SNOR_OP_READ: + nor->read_dummy = 0; + break; + default: + nor->read_dummy = 1; + } + + /* Configure the BAR - discover bank cmds and read current bank */ +#ifdef CONFIG_SPI_FLASH_BAR + ret = spi_nor_read_bar(nor, info); + if (ret < 0) + return ret; +#endif + +#if CONFIG_IS_ENABLED(OF_CONTROL) + ret = spi_nor_decode_fdt(gd->fdt_blob, nor); + if (ret) { + debug("spi-nor: FDT decode error\n"); + return -EINVAL; + } +#endif + +#ifndef CONFIG_SPL_BUILD + printf("spi-nor: detected %s with page size ", flash->name); + print_size(nor->page_size, ", erase size "); + print_size(nor->erase_size, ", total "); + print_size(flash->size, ""); + if (nor->memory_map) + printf(", mapped at %p", nor->memory_map); + puts("\n"); +#endif + +#ifndef CONFIG_SPI_FLASH_BAR + if (((nor->dual == SNOR_DUAL_SINGLE) && + (flash->size > SNOR_16MB_BOUN)) || + ((nor->dual > SNOR_DUAL_SINGLE) && + (flash->size > SNOR_16MB_BOUN << 1))) { + puts("spi-nor: Warning - Only lower 16MiB accessible,"); + puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); + } +#endif + + return ret; +} diff --git a/include/linux/err.h b/include/linux/err.h index 5b3c8bc..1bba498 100644 --- a/include/linux/err.h +++ b/include/linux/err.h @@ -36,6 +36,11 @@ static inline long IS_ERR(const void *ptr) return IS_ERR_VALUE((unsigned long)ptr); }
+static inline bool IS_ERR_OR_NULL(const void *ptr) +{ + return !ptr || IS_ERR_VALUE((unsigned long)ptr); +} + /** * ERR_CAST - Explicitly cast an error-valued pointer to another pointer type * @ptr: The pointer to cast. diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h new file mode 100644 index 0000000..fb32c9f --- /dev/null +++ b/include/linux/mtd/spi-nor.h @@ -0,0 +1,253 @@ +/* + * SPI NOR Core header file. + * + * Copyright (C) 2016 Jagan Teki jteki@openedev.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MTD_SPI_NOR_H +#define __MTD_SPI_NOR_H + +#include <common.h> + +/* + * Manufacturer IDs + * + * The first byte returned from the flash after sending opcode SPINOR_OP_RDID. + * Sometimes these are the same as CFI IDs, but sometimes they aren't. + */ +#define SNOR_MFR_ATMEL 0x1f +#define SNOR_MFR_MACRONIX 0xc2 +#define SNOR_MFR_MICRON 0x20 /* ST Micro <--> Micron */ +#define SNOR_MFR_SPANSION 0x01 +#define SNOR_MFR_SST 0xbf +#define SNOR_MFR_WINBOND 0xef + +/** + * SPI NOR opcodes. + * + * Note on opcode nomenclature: some opcodes have a format like + * SNOR_OP_FUNCTION{4,}_x_y_z. The numbers x, y, and z stand for the number + * of I/O lines used for the opcode, address, and data (respectively). The + * FUNCTION has an optional suffix of '4', to represent an opcode which + * requires a 4-byte (32-bit) address. + */ +#define SNOR_OP_WRDI 0x04 /* Write disable */ +#define SNOR_OP_WREN 0x06 /* Write enable */ +#define SNOR_OP_RDSR 0x05 /* Read status register */ +#define SNOR_OP_WRSR 0x01 /* Write status register 1 byte */ +#define SNOR_OP_READ 0x03 /* Read data bytes (low frequency) */ +#define SNOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ +#define SNOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */ +#define SNOR_OP_READ_1_1_2_IO 0xbb /* Read data bytes (Dual IO SPI) */ +#define SNOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */ +#define SNOR_OP_READ_1_1_4_IO 0xeb /* Read data bytes (Quad IO SPI) */ +#define SNOR_OP_BRWR 0x17 /* Bank register write */ +#define SNOR_OP_BRRD 0x16 /* Bank register read */ +#define SNOR_OP_WREAR 0xC5 /* Write extended address register */ +#define SNOR_OP_RDEAR 0xC8 /* Read extended address register */ +#define SNOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ +#define SNOR_OP_QPP 0x32 /* Quad Page program */ +#define SNOR_OP_BE_4K 0x20 /* Erase 4KiB block */ +#define SNOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ +#define SNOR_OP_BE_32K 0x52 /* Erase 32KiB block */ +#define SPINOR_OP_CHIP_ERASE 0xc7 /* Erase whole flash chip */ +#define SNOR_OP_SE 0xd8 /* Sector erase (usually 64KiB) */ +#define SNOR_OP_RDID 0x9f /* Read JEDEC ID */ +#define SNOR_OP_RDCR 0x35 /* Read configuration register */ +#define SNOR_OP_RDFSR 0x70 /* Read flag status register */ + +/* Used for SST flashes only. */ +#define SNOR_OP_BP 0x02 /* Byte program */ +#define SNOR_OP_AAI_WP 0xad /* Auto addr increment word program */ + +/* Used for Micron flashes only. */ +#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */ +#define SPINOR_OP_WD_EVCR 0x61 /* Write EVCR register */ + +/* Status Register bits. */ +#define SR_WIP BIT(0) /* Write in progress */ +#define SR_WEL BIT(1) /* Write enable latch */ + +/* meaning of other SR_* bits may differ between vendors */ +#define SR_BP0 BIT(2) /* Block protect 0 */ +#define SR_BP1 BIT(3) /* Block protect 1 */ +#define SR_BP2 BIT(4) /* Block protect 2 */ +#define SR_SRWD BIT(7) /* SR write protect */ + +#define SR_QUAD_EN_MX BIT(6) /* Macronix Quad I/O */ + +/* Enhanced Volatile Configuration Register bits */ +#define EVCR_QUAD_EN_MICRON BIT(7) /* Micron Quad I/O */ + +/* Flag Status Register bits */ +#define FSR_READY BIT(7) + +/* Configuration Register bits. */ +#define CR_QUAD_EN_SPAN BIT(1) /* Spansion/Winbond Quad I/O */ + +/* Flash timeout values */ +#define SNOR_READY_WAIT_PROG (2 * CONFIG_SYS_HZ) +#define SNOR_READY_WAIT_ERASE (5 * CONFIG_SYS_HZ) +#define SNOR_MAX_CMD_SIZE 4 /* opcode + 3-byte address */ +#define SNOR_16MB_BOUN 0x1000000 + +enum snor_dual { + SNOR_DUAL_SINGLE = 0, + SNOR_DUAL_STACKED = BIT(0), + SNOR_DUAL_PARALLEL = BIT(1), +}; + +enum snor_option_flags { + SNOR_F_SST_WRITE = BIT(0), + SNOR_F_USE_FSR = BIT(1), + SNOR_F_U_PAGE = BIT(1), +}; + +enum write_mode { + SNOR_WRITE_1_1_BYTE = BIT(0), + SNOR_WRITE_1_1_4 = BIT(1), +}; + +enum read_mode { + SNOR_READ = BIT(0), + SNOR_READ_FAST = BIT(1), + SNOR_READ_1_1_2 = BIT(2), + SNOR_READ_1_1_4 = BIT(3), + SNOR_READ_1_1_2_IO = BIT(4), + SNOR_READ_1_1_4_IO = BIT(5), +}; + +#define SNOR_READ_BASE (SNOR_READ | SNOR_READ_FAST) +#define SNOR_READ_FULL (SNOR_READ_BASE | SNOR_READ_1_1_2 | \ + SNOR_READ_1_1_4 | SNOR_READ_1_1_2_IO | \ + SNOR_READ_1_1_4_IO) + +#define JEDEC_MFR(info) ((info)->id[0]) +#define JEDEC_ID(info) (((info)->id[1]) << 8 | ((info)->id[2])) +#define JEDEC_EXT(info) (((info)->id[3]) << 8 | ((info)->id[4])) +#define SPI_NOR_MAX_ID_LEN 6 + +struct spi_nor_info { + char *name; + + /* + * This array stores the ID bytes. + * The first three bytes are the JEDIC ID. + * JEDEC ID zero means "no ID" (mostly older chips). + */ + u8 id[SPI_NOR_MAX_ID_LEN]; + u8 id_len; + + /* The size listed here is what works with SNOR_OP_SE, which isn't + * necessarily called a "sector" by the vendor. + */ + unsigned sector_size; + u16 n_sectors; + + u16 page_size; + u16 addr_width; + + /* Enum list for read modes */ + enum read_mode flash_read; + + u16 flags; +#define SECT_4K BIT(0) /* SNOR_OP_BE_4K works uniformly */ +#define SECT_32K BIT(1) /* SNOR_OP_BE_32K works uniformly */ +#define SPI_NOR_NO_ERASE BIT(2) /* No erase command needed */ +#define SST_WRITE BIT(3) /* use SST byte programming */ +#define SPI_NOR_NO_FR BIT(4) /* Can't do fastread */ +#define SECT_4K_PMC BIT(5) /* SNOR_OP_BE_4K_PMC works uniformly */ +#define USE_FSR BIT(6) /* use flag status register */ +#define SNOR_WRITE_QUAD BIT(7) /* Flash supports Quad Read */ +}; + +extern const struct spi_nor_info spi_nor_ids[]; + +/** + * struct spi_nor - Structure for defining a the SPI NOR layer + * + * @mtd: point to a mtd_info structure + * @name: name of the SPI NOR device + * @page_size: the page size of the SPI NOR + * @erase_opcode: the opcode for erasing a sector + * @read_opcode: the read opcode + * @read_dummy: the dummy bytes needed by the read operation + * @program_opcode: the program opcode + * @bar_read_opcode: the read opcode for bank/extended address registers + * @bar_program_opcode: the program opcode for bank/extended address registers + * @bar_curr: indicates current flash bank + * @dual: indicates dual flash memories - dual stacked, parallel + * @shift: flash shift useful in dual parallel + * @max_write_size: If non-zero, the maximum number of bytes which can + * be written at once, excluding command bytes. + * @flags: flag options for the current SPI-NOR (SNOR_F_*) + * @mode: write mode or any other mode bits. + * @read_mode: read mode. + * @cmd_buf: used by the write_reg + * @read_reg: [DRIVER-SPECIFIC] read out the register + * @write_reg: [DRIVER-SPECIFIC] write data to the register + * @read_mmap: [DRIVER-SPECIFIC] read data from the mmapped SPI NOR + * @read: [DRIVER-SPECIFIC] read data from the SPI NOR + * @write: [DRIVER-SPECIFIC] write data to the SPI NOR + * @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR + * @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR + * @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is + * @memory_map: address of read-only SPI NOR access + * @priv: the private data + */ +struct spi_nor { + struct mtd_info *mtd; + const char *name; + u32 page_size; + u8 erase_opcode; + u8 read_opcode; + u8 read_dummy; + u8 program_opcode; +#ifdef CONFIG_SPI_FLASH_BAR + u8 bar_read_opcode; + u8 bar_program_opcode; + u8 bank_curr; +#endif + u8 dual; + u8 shift; + u32 max_write_size; + u32 flags; + u8 mode; + u8 read_mode; + u8 cmd_buf[SNOR_MAX_CMD_SIZE]; + + int (*read_reg)(struct spi_nor *nor, u8 cmd, u8 *val, int len); + int (*write_reg)(struct spi_nor *nor, u8 cmd, u8 *data, int len); + + int (*read_mmap)(struct spi_nor *nor, void *data, void *offset, + size_t len); + int (*read)(struct spi_nor *nor, const u8 *opcode, size_t cmd_len, + void *data, size_t data_len); + int (*write)(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, + const void *data, size_t data_len); + + int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); + int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); + int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); + + void *memory_map; + void *priv; +}; + +/** + * spi_nor_scan() - scan the SPI NOR + * @nor: the spi_nor structure + * + * The drivers can use this fuction to scan the SPI NOR. + * In the scanning, it will try to get all the necessary information to + * fill the mtd_info{} and the spi_nor{}. + * + * The chip type name can be provided through the @name parameter. + * + * Return: 0 for success, others for failure. + */ +int spi_nor_scan(struct spi_nor *nor); + +#endif /* __MTD_SPI_NOR_H */

Since m25p80 follows similar naming convention as Linux, hence added jedec, spi-nor device tree bindings from Linux.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- doc/device-tree-bindings/mtd/jedec,spi-nor.txt | 78 ++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 doc/device-tree-bindings/mtd/jedec,spi-nor.txt
diff --git a/doc/device-tree-bindings/mtd/jedec,spi-nor.txt b/doc/device-tree-bindings/mtd/jedec,spi-nor.txt new file mode 100644 index 0000000..2c91c03 --- /dev/null +++ b/doc/device-tree-bindings/mtd/jedec,spi-nor.txt @@ -0,0 +1,78 @@ +* SPI NOR flash: ST M25Pxx (and similar) serial flash chips + +Required properties: +- #address-cells, #size-cells : Must be present if the device has sub-nodes + representing partitions. +- compatible : May include a device-specific string consisting of the + manufacturer and name of the chip. A list of supported chip + names follows. + Must also include "jedec,spi-nor" for any SPI NOR flash that can + be identified by the JEDEC READ ID opcode (0x9F). + + Supported chip names: + at25df321a + at25df641 + at26df081a + mr25h256 + mx25l4005a + mx25l1606e + mx25l6405d + mx25l12805d + mx25l25635e + n25q064 + n25q128a11 + n25q128a13 + n25q512a + s25fl256s1 + s25fl512s + s25sl12801 + s25fl008k + s25fl064k + sst25vf040b + m25p40 + m25p80 + m25p16 + m25p32 + m25p64 + m25p128 + w25x80 + w25x32 + w25q32 + w25q32dw + w25q80bl + w25q128 + w25q256 + + The following chip names have been used historically to + designate quirky versions of flash chips that do not support the + JEDEC READ ID opcode (0x9F): + m25p05-nonjedec + m25p10-nonjedec + m25p20-nonjedec + m25p40-nonjedec + m25p80-nonjedec + m25p16-nonjedec + m25p32-nonjedec + m25p64-nonjedec + m25p128-nonjedec + +- reg : Chip-Select number +- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at + +Optional properties: +- m25p,fast-read : Use the "fast read" opcode to read data from the chip instead + of the usual "read" opcode. This opcode is not supported by + all chips and support for it can not be detected at runtime. + Refer to your chips' datasheet to check if this is supported + by your chip. + +Example: + + flash: m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,m25p80", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + m25p,fast-read; + };

Added kconfig entry for MTD_SPI_NOR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index d32486c..f0ea9f9 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -1,3 +1,19 @@ +menuconfig MTD_SPI_NOR + tristate "SPI-NOR device support" + help + This is the core SPI NOR framework which can be used to interact SPI-NOR + to SPI driver interface layer and the SPI-NOR controller driver. + + Unlike normal/generic spi controllers, they are few controllers which are + exclusively used to connect SPI-NOR devices, called SPI-NOR controllers. + So technically these controllers shouldn't reside at drivers/spi as these + may effect the generic SPI bus functionalities, so this SPI-NOR core acts + as a common core framework between the generic SPI controller drivers vs + SPI-NOR controller drivers for SPI-NOR device access. Note that from SPI-NOR + core to SPI drivers there should be an interface layer. + +if MTD_SPI_NOR + config MTD_M25P80 tristate "Support most SPI Flash chips (AT26DF, M25P, W25X, ...)" help @@ -13,3 +29,5 @@ config MTD_M25P80 Set up your spi devices with the right board-specific platform data, if you want to specify device partitioning or to use a device which doesn't support the JEDEC ID instruction. + +endif # MTD_SPI_NOR

Added kconfig entry for MTD_SPI_NOR_USE_4K_SECTORS.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index f0ea9f9..374cdcb 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -30,4 +30,18 @@ config MTD_M25P80 if you want to specify device partitioning or to use a device which doesn't support the JEDEC ID instruction.
+config MTD_SPI_NOR_USE_4K_SECTORS + bool "Use small 4096 B erase sectors" + default y + help + Many flash memories support erasing small (4096 B) sectors. Depending + on the usage this feature may provide performance gain in comparison + to erasing whole blocks (32/64 KiB). + Changing a small part of the flash's contents is usually faster with + small sectors. On the other hand erasing should be faster when using + 64 KiB block instead of 16 × 4 KiB sectors. + + Please note that some tools/drivers/filesystems may not work with + 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). + endif # MTD_SPI_NOR

This patch adds mtd_info support to spi-nor core instead of using legacy spi_flash{}.
SPI-NOR with MTD:
------------------------------ cmd_sf.c ------------------------------ MTD core ------------------------------ spi-nor.c ------------------------------- m25p80.c spi nor drivers ------------------------------- spi-uclass SPI NOR chip ------------------------------- spi drivers ------------------------------- SPI NOR chip -------------------------------
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/spi-nor.c | 275 +++++++++++++++++++++++++----------------- 1 file changed, 166 insertions(+), 109 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index f142ae4..b867ce9 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -7,6 +7,7 @@ */
#include <common.h> +#include <div64.h> #include <dm.h> #include <errno.h> #include <malloc.h> @@ -14,6 +15,7 @@
#include <linux/math64.h> #include <linux/log2.h> +#include <linux/mtd/mtd.h> #include <linux/mtd/spi-nor.h>
DECLARE_GLOBAL_DATA_PTR; @@ -209,10 +211,11 @@ bar_end:
static int spi_nor_read_bar(struct spi_nor *nor, const struct spi_nor_info *info) { + struct mtd_info *mtd = nor->mtd; u8 curr_bank = 0; int ret;
- if (flash->size <= SNOR_16MB_BOUN) + if (mtd->size <= SNOR_16MB_BOUN) goto bar_end;
switch (JEDEC_MFR(info)) { @@ -240,12 +243,12 @@ bar_end: #ifdef CONFIG_SF_DUAL_FLASH static void spi_nor_dual(struct spi_nor *nor, u32 *addr) { - struct spi_flash *flash = nor->flash; + struct mtd_info *mtd = nor->mtd;
switch (nor->dual) { case SNOR_DUAL_STACKED: - if (*addr >= (flash->size >> 1)) { - *addr -= flash->size >> 1; + if (*addr >= (mtd->size >> 1)) { + *addr -= mtd->size >> 1; nor->flags |= SNOR_F_U_PAGE; } else { nor->flags &= ~SNOR_F_U_PAGE; @@ -263,8 +266,9 @@ static void spi_nor_dual(struct spi_nor *nor, u32 *addr)
#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, - u32 *len) + uint64_t *len) { + struct mtd_info *mtd = nor->mtd; u8 mask = SR_BP2 | SR_BP1 | SR_BP0; int shift = ffs(mask) - 1; int pow; @@ -275,18 +279,19 @@ static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, *len = 0; } else { pow = ((sr & mask) ^ mask) >> shift; - *len = flash->size >> pow; - *ofs = flash->size - *len; + *len = mtd->size >> pow; + *ofs = mtd->size - *len; } }
/* * Return 1 if the entire region is locked, 0 otherwise */ -static int stm_is_locked_sr(struct spi_nor *nor, u32 ofs, u32 len, u8 sr) +static int stm_is_locked_sr(struct spi_nor *nor, loff_t ofs, uint64_t len, + u8 sr) { loff_t lock_offs; - u32 lock_len; + uint64_t lock_len;
stm_get_locked_range(nor, sr, &lock_offs, &lock_len);
@@ -294,24 +299,6 @@ static int stm_is_locked_sr(struct spi_nor *nor, u32 ofs, u32 len, u8 sr) }
/* - * Check if a region of the flash is (completely) locked. See stm_lock() for - * more info. - * - * Returns 1 if entire region is locked, 0 if any portion is unlocked, and - * negative on errors. - */ -static int stm_is_locked(struct spi_nor *nor, u32 ofs, size_t len) -{ - int status; - - status = read_sr(nor); - if (status < 0) - return status; - - return stm_is_locked_sr(nor, ofs, len, status); -} - -/* * Lock a region of the flash. Compatible with ST Micro and similar flash. * Supports only the block protection bits BP{0,1,2} in the status register * (SR). Does not support these features found in newer SR bitfields: @@ -334,9 +321,10 @@ static int stm_is_locked(struct spi_nor *nor, u32 ofs, size_t len) * * Returns negative on errors, 0 on success. */ -static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len) +static int stm_lock(struct spi_nor *nor, loff_t ofs, uint64_t len) { - u8 status_old, status_new; + struct mtd_info *mtd = nor->mtd; + int status_old, status_new; u8 mask = SR_BP2 | SR_BP1 | SR_BP0; u8 shift = ffs(mask) - 1, pow, val;
@@ -345,12 +333,12 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len) return status_old;
/* SPI NOR always locks to the end */ - if (ofs + len != flash->size) { + if (ofs + len != mtd->size) { /* Does combined region extend to end? */ - if (!stm_is_locked_sr(nor, ofs + len, flash->size - ofs - len, + if (!stm_is_locked_sr(nor, ofs + len, mtd->size - ofs - len, status_old)) return -EINVAL; - len = flash->size - ofs; + len = mtd->size - ofs; }
/* @@ -362,11 +350,10 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len) * * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len)) */ - pow = ilog2(flash->size) - ilog2(len); + pow = ilog2(mtd->size) - ilog2(len); val = mask - (pow << shift); if (val & ~mask) return -EINVAL; - /* Don't "lock" with no region! */ if (!(val & mask)) return -EINVAL; @@ -386,20 +373,22 @@ static int stm_lock(struct spi_nor *nor, u32 ofs, size_t len) * * Returns negative on errors, 0 on success. */ -static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len) +static int stm_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len) { - uint8_t status_old, status_new; + struct mtd_info *mtd = nor->mtd; + int status_old, status_new; u8 mask = SR_BP2 | SR_BP1 | SR_BP0; u8 shift = ffs(mask) - 1, pow, val;
status_old = read_sr(nor); - if (status_old < 0) + if (status_old < 0) return status_old;
/* Cannot unlock; would unlock larger region than requested */ - if (stm_is_locked_sr(nor, status_old, ofs - flash->erase_size, - nor->erase_size)) + if (stm_is_locked_sr(nor, status_old, ofs - mtd->erasesize, + mtd->erasesize)) return -EINVAL; + /* * Need largest pow such that: * @@ -409,8 +398,8 @@ static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len) * * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len)) */ - pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len)); - if (ofs + len == flash->size) { + pow = ilog2(mtd->size) - order_base_2(mtd->size - (ofs + len)); + if (ofs + len == mtd->size) { val = 0; /* fully unlocked */ } else { val = mask - (pow << shift); @@ -428,8 +417,47 @@ static int stm_unlock(struct spi_nor *nor, u32 ofs, size_t len) write_enable(nor); return write_sr(nor, status_new); } + +/* + * Check if a region of the flash is (completely) locked. See stm_lock() for + * more info. + * + * Returns 1 if entire region is locked, 0 if any portion is unlocked, and + * negative on errors. + */ +static int stm_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len) +{ + int status; + + status = read_sr(nor); + if (status < 0) + return status; + + return stm_is_locked_sr(nor, ofs, len, status); +} #endif
+static int spi_nor_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) +{ + struct spi_nor *nor = mtd->priv; + + return nor->flash_lock(nor, ofs, len); +} + +static int spi_nor_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) +{ + struct spi_nor *nor = mtd->priv; + + return nor->flash_unlock(nor, ofs, len); +} + +static int spi_nor_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) +{ + struct spi_nor *nor = mtd->priv; + + return nor->flash_is_locked(nor, ofs, len); +} + static const struct spi_nor_info *spi_nor_id(struct spi_nor *nor) { int tmp; @@ -455,30 +483,32 @@ static const struct spi_nor_info *spi_nor_id(struct spi_nor *nor) return ERR_PTR(-ENODEV); }
-static int spi_nor_erase(struct spi_flash *flash, u32 offset, size_t len) +static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) { - struct spi_nor *nor = flash->nor; - u32 erase_size, erase_addr; + struct spi_nor *nor = mtd->priv; + u32 addr, len, erase_addr; u8 cmd[SNOR_MAX_CMD_SIZE]; + uint32_t rem; int ret = -1;
- erase_size = nor->erase_size; - if (offset % erase_size || len % erase_size) { - debug("spi-nor: Erase offset/length not multiple of erase size\n"); - return -1; - } + div_u64_rem(instr->len, mtd->erasesize, &rem); + if (rem) + return -EINVAL;
- if (flash->flash_is_locked) { - if (flash->flash_is_locked(flash, offset, len) > 0) { + addr = instr->addr; + len = instr->len; + + if (mtd->_is_locked) { + if (mtd->_is_locked(mtd, addr, len) > 0) { printf("offset 0x%x is protected and cannot be erased\n", - offset); + addr); return -EINVAL; } }
- cmd[0] = flash->erase_opcode; + cmd[0] = nor->erase_opcode; while (len) { - erase_addr = offset; + erase_addr = addr;
#ifdef CONFIG_SF_DUAL_FLASH if (nor->dual > SNOR_DUAL_SINGLE) @@ -498,39 +528,47 @@ static int spi_nor_erase(struct spi_flash *flash, u32 offset, size_t len)
ret = nor->write(nor, cmd, sizeof(cmd), NULL, 0); if (ret < 0) - break; + goto erase_err;
ret = spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_ERASE); if (ret < 0) - return ret; + goto erase_err;
- offset += erase_size; - len -= erase_size; + addr += mtd->erasesize; + len -= mtd->erasesize; }
+ write_disable(nor); + + instr->state = MTD_ERASE_DONE; + mtd_erase_callback(instr); + + return ret; + +erase_err: + instr->state = MTD_ERASE_FAILED; return ret; }
-int spi_nor_write(struct spi_flash *flash, u32 offset, - size_t len, const void *buf) +static int spi_nor_write(struct mtd_info *mtd, loff_t offset, size_t len, + size_t *retlen, const u_char *buf) { - struct spi_nor *nor = flash->nor; - unsigned long byte_addr, page_size; - u32 write_addr; + struct spi_nor *nor = mtd->priv; + u32 byte_addr, page_size, write_addr; size_t chunk_len, actual; u8 cmd[SNOR_MAX_CMD_SIZE]; int ret = -1;
- page_size = nor->page_size; - - if (flash->flash_is_locked) { - if (flash->flash_is_locked(flash, offset, len) > 0) { - printf("offset 0x%x is protected and cannot be written\n", + if (mtd->_is_locked) { + if (mtd->_is_locked(mtd, offset, len) > 0) { + printf("offset 0x%llx is protected and cannot be written\n", offset); return -EINVAL; } }
+ page_size = nor->page_size; + cmd[0] = nor->program_opcode; for (actual = 0; actual < len; actual += chunk_len) { write_addr = offset; @@ -568,14 +606,16 @@ int spi_nor_write(struct spi_flash *flash, u32 offset, return ret;
offset += chunk_len; + *retlen += chunk_len; }
return ret; }
-int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data) +static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) { - struct spi_nor *nor = flash->nor; + struct spi_nor *nor = mtd->priv; u32 remain_len, read_len, read_addr; u8 *cmd, cmdsz; int bank_sel = 0; @@ -583,7 +623,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
/* Handle memory-mapped SPI */ if (nor->memory_map) { - ret = nor->read_mmap(nor, data, nor->memory_map + offset, len); + ret = nor->read_mmap(nor, buf, nor->memory_map + from, len); if (ret) { debug("spi-nor: mmap read failed\n"); return ret; @@ -601,7 +641,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
cmd[0] = nor->read_opcode; while (len) { - read_addr = offset; + read_addr = from;
#ifdef CONFIG_SF_DUAL_FLASH if (nor->dual > SNOR_DUAL_SINGLE) @@ -614,7 +654,7 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data) bank_sel = nor->bank_curr; #endif remain_len = ((SNOR_16MB_BOUN << nor->shift) * - (bank_sel + 1)) - offset; + (bank_sel + 1)) - from; if (len < remain_len) read_len = len; else @@ -622,13 +662,14 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data)
spi_nor_addr(read_addr, cmd);
- ret = nor->read(nor, cmd, cmdsz, data, read_len); + ret = nor->read(nor, cmd, cmdsz, buf, read_len); if (ret < 0) break;
- offset += read_len; + from += read_len; len -= read_len; - data += read_len; + buf += read_len; + *retlen += read_len; }
free(cmd); @@ -636,7 +677,8 @@ int spi_nor_read(struct spi_flash *flash, u32 offset, size_t len, void *data) }
#ifdef CONFIG_SPI_FLASH_SST -static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf) +static int sst_byte_write(struct spi_nor *nor, u32 offset, + const void *buf, size_t *retlen) { int ret; u8 cmd[4] = { @@ -657,12 +699,15 @@ static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf) if (ret) return ret;
+ *retlen += 1; + return spi_nor_wait_till_ready(nor, SNOR_READY_WAIT_PROG); }
-int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) +static int sst_write_wp(struct mtd_info *mtd, loff_t offset, size_t len, + size_t *retlen, const u_char *buf) { - struct spi_nor *nor = flash->nor; + struct spi_nor *nor = mtd->priv; size_t actual, cmd_len; int ret; u8 cmd[4]; @@ -670,7 +715,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) /* If the data is not word aligned, write out leading single byte */ actual = offset % 2; if (actual) { - ret = sst_byte_write(nor, offset, buf); + ret = sst_byte_write(nor, offset, buf, retlen); if (ret) goto done; } @@ -687,7 +732,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) cmd[3] = offset;
for (; actual < len - 1; actual += 2) { - debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06x }\n", + debug("spi-nor: 0x%p => cmd = { 0x%02x 0x%06llx }\n", buf + actual, cmd[0], offset);
ret = nor->write(nor, cmd, cmd_len, buf + actual, 2); @@ -702,6 +747,7 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
cmd_len = 1; offset += 2; + *retlen += 2; }
if (!ret) @@ -709,20 +755,21 @@ int sst_write_wp(struct spi_nor *nor, u32 offset, size_t len, const void *buf)
/* If there is a single trailing byte, write it out */ if (!ret && actual != len) - ret = sst_byte_write(nor, offset, buf + actual); + ret = sst_byte_write(nor, offset, buf + actual, retlen);
done: return ret; }
-int sst_write_bp(struct spi_nor *nor, u32 offset, size_t len, const void *buf) +static int sst_write_bp(struct mtd_info *mtd, loff_t offset, size_t len, + size_t *retlen, const u_char *buf) { - struct spi_nor *nor = flash->nor; + struct spi_nor *nor = mtd->priv; size_t actual; int ret;
for (actual = 0; actual < len; actual++) { - ret = sst_byte_write(nor, offset, buf + actual); + ret = sst_byte_write(nor, offset, buf + actual, retlen); if (ret) { debug("spi-nor: sst byte program failed\n"); break; @@ -853,6 +900,7 @@ static int set_quad_mode(struct spi_nor *nor, const struct spi_nor_info *info) #if CONFIG_IS_ENABLED(OF_CONTROL) int spi_nor_decode_fdt(const void *blob, struct spi_nor *nor) { + struct mtd_info *mtd = nor->mtd; fdt_addr_t addr; fdt_size_t size; int node; @@ -868,7 +916,7 @@ int spi_nor_decode_fdt(const void *blob, struct spi_nor *nor) return 0; }
- if (flash->size != size) { + if (mtd->size != size) { debug("%s: Memory map must cover entire device\n", __func__); return -1; } @@ -891,6 +939,7 @@ static int spi_nor_check(struct spi_nor *nor)
int spi_nor_scan(struct spi_nor *nor) { + struct mtd_info *mtd = nor->mtd; const struct spi_nor_info *info = NULL; static u8 flash_read_cmd[] = { SNOR_OP_READ, @@ -921,7 +970,13 @@ int spi_nor_scan(struct spi_nor *nor) write_sr(nor, 0); }
- flash->name = info->name; + mtd->name = info->name; + mtd->priv = nor; + mtd->type = MTD_NORFLASH; + mtd->writesize = 1; + mtd->flags = MTD_CAP_NORFLASH; + mtd->_erase = spi_nor_erase; + mtd->_read = spi_nor_read;
if (info->flags & USE_FSR) nor->flags |= SNOR_F_USE_FSR; @@ -929,15 +984,13 @@ int spi_nor_scan(struct spi_nor *nor) if (info->flags & SST_WRITE) nor->flags |= SNOR_F_SST_WRITE;
- flash->write = spi_nor_write; - flash->erase = spi_nor_erase; - flash->read = spi_nor_read; + mtd->_write = spi_nor_write; #if defined(CONFIG_SPI_FLASH_SST) if (nor->flags & SNOR_F_SST_WRITE) { if (nor->mode & SNOR_WRITE_1_1_BYTE) - flash->write = sst_write_bp; + mtd->_write = sst_write_bp; else - flash->write = sst_write_wp; + mtd->_write = sst_write_wp; } #endif
@@ -951,10 +1004,10 @@ int spi_nor_scan(struct spi_nor *nor) } #endif
- if (flash->flash_lock && flash->flash_unlock && flash->flash_is_locked) { - flash->flash_lock = spi_nor_lock; - flash->flash_unlock = spi_nor_unlock; - flash->flash_is_locked = spi_nor_is_locked; + if (nor->flash_lock && nor->flash_unlock && nor->flash_is_locked) { + mtd->_lock = spi_nor_lock; + mtd->_unlock = spi_nor_unlock; + mtd->_is_locked = spi_nor_is_locked; }
/* Compute the flash size */ @@ -972,30 +1025,30 @@ int spi_nor_scan(struct spi_nor *nor) nor->page_size = 512; } nor->page_size <<= nor->shift; - flash->sector_size = info->sector_size << nor->shift; - flash->size = flash->sector_size * info->n_sectors << nor->shift; + mtd->writebufsize = nor->page_size; + mtd->size = (info->sector_size * info->n_sectors) << nor->shift; #ifdef CONFIG_SF_DUAL_FLASH if (nor->dual & SNOR_DUAL_STACKED) - flash->size <<= 1; + mtd->size <<= 1; #endif
#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS /* prefer "small sector" erase if possible */ if (info->flags & SECT_4K) { nor->erase_opcode = SNOR_OP_BE_4K; - nor->erase_size = 4096 << nor->shift; + mtd->erasesize = 4096 << nor->shift; } else if (info->flags & SECT_4K_PMC) { nor->erase_opcode = SNOR_OP_BE_4K_PMC; - nor->erase_size = 4096; + mtd->erasesize = 4096; } else #endif { nor->erase_opcode = SNOR_OP_SE; - nor->erase_size = flash->sector_size; + mtd->erasesize = info->sector_size << nor->shift; }
- /* Now erase size becomes valid sector size */ - flash->sector_size = nor->erase_size; + if (info->flags & SPI_NOR_NO_ERASE) + mtd->flags |= MTD_NO_ERASE;
/* Look for the fastest read cmd */ cmd = fls(info->flash_read & nor->read_mode); @@ -1007,6 +1060,10 @@ int spi_nor_scan(struct spi_nor *nor) nor->read_opcode = SNOR_OP_READ_FAST; }
+ /* Some devices cannot do fast-read */ + if (info->flags & SPI_NOR_NO_FR) + nor->read_opcode = SNOR_OP_READ; + /* Not require to look for fastest only two write cmds yet */ if (info->flags & SNOR_WRITE_QUAD && nor->mode & SNOR_WRITE_1_1_4) nor->program_opcode = SNOR_OP_QPP; @@ -1061,10 +1118,10 @@ int spi_nor_scan(struct spi_nor *nor) #endif
#ifndef CONFIG_SPL_BUILD - printf("spi-nor: detected %s with page size ", flash->name); + printf("spi-nor: detected %s with page size ", mtd->name); print_size(nor->page_size, ", erase size "); - print_size(nor->erase_size, ", total "); - print_size(flash->size, ""); + print_size(mtd->erasesize, ", total "); + print_size(mtd->size, ""); if (nor->memory_map) printf(", mapped at %p", nor->memory_map); puts("\n"); @@ -1072,9 +1129,9 @@ int spi_nor_scan(struct spi_nor *nor)
#ifndef CONFIG_SPI_FLASH_BAR if (((nor->dual == SNOR_DUAL_SINGLE) && - (flash->size > SNOR_16MB_BOUN)) || + (mtd->size > SNOR_16MB_BOUN)) || ((nor->dual > SNOR_DUAL_SINGLE) && - (flash->size > SNOR_16MB_BOUN << 1))) { + (mtd->size > SNOR_16MB_BOUN << 1))) { puts("spi-nor: Warning - Only lower 16MiB accessible,"); puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); }

m25p80 is flash interface for spi-nor core and drivers/spi so add spi_nor{} functionalities like - allocate spi_nor{} - basic initilization - install hooks - call to spi-nor core, using spi_nor_scan - register with mtd core
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/m25p80.c | 236 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 236 insertions(+)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 833a9c3..57e54d0 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -10,14 +10,249 @@ #include <dm.h> #include <errno.h> #include <spi.h> + +#include <dm/device-internal.h> + #include <linux/mtd/mtd.h> +#include <linux/mtd/spi-nor.h> + +struct m25p { + struct spi_slave *spi; + struct spi_nor spi_nor; +}; + +static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, const u8 *data_out, + u8 *data_in, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("SF: Failed to send command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, data_out, data_in, + SPI_XFER_END); + if (ret) + debug("SF: Failed to transfer %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + +static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, &cmd, 1, NULL, val, len); + if (ret < 0) { + debug("m25p80: error %d reading register %x\n", ret, cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_write_reg(struct spi_nor *nor, u8 cmd, u8 *buf, int len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, &cmd, 1, buf, NULL, len); + if (ret < 0) { + debug("m25p80: error %d writing register %x\n", ret, cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +void __weak flash_copy_mmap(void *data, void *offset, size_t len) +{ + memcpy(data, offset, len); +} + +static int m25p80_read_mmap(struct spi_nor *nor, void *data, + void *offset, size_t len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP); + flash_copy_mmap(data, offset, len); + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END); + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_read(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, + void *data, size_t data_len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, cmd, cmd_len, NULL, data, data_len); + if (ret < 0) { + debug("m25p80: error %d reading %x\n", ret, *cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +} + +static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, + const void *data, size_t data_len) +{ + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; + int ret; + + ret = spi_claim_bus(spi); + if (ret < 0) { + debug("m25p80: unable to claim SPI bus\n"); + return ret; + } + + if (nor->flags & SNOR_F_U_PAGE) + spi->flags |= SPI_XFER_U_PAGE; + + ret = spi_read_then_write(spi, cmd, cmd_len, data, NULL, data_len); + if (ret < 0) { + debug("m25p80: error %d writing %x\n", ret, *cmd); + return ret; + } + + spi_release_bus(spi); + + return ret; +}
static int m25p_probe(struct udevice *dev) { struct spi_slave *spi = dev_get_parent_priv(dev); struct mtd_info *mtd = dev_get_uclass_priv(dev); + struct m25p *flash = dev_get_priv(dev); + struct spi_nor *nor; + int ret; + + nor = &flash->spi_nor; + + /* install hooks */ + nor->read_mmap = m25p80_read_mmap; + nor->read = m25p80_read; + nor->write = m25p80_write; + nor->read_reg = m25p80_read_reg; + nor->write_reg = m25p80_write_reg; + + nor->mtd = mtd; + nor->priv = flash; + flash->spi = spi; + + /* claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("m25p80: failed to claim SPI bus: %d\n", ret); + return ret; + } + + switch (spi->mode_rx) { + case SPI_RX_SLOW: + nor->read_mode = SNOR_READ; + break; + case SPI_RX_DUAL: + nor->read_mode = SNOR_READ_1_1_2; + break; + case SPI_RX_QUAD: + nor->read_mode = SNOR_READ_1_1_4; + break; + } + + switch (spi->mode) { + case SPI_TX_BYTE: + nor->mode = SNOR_WRITE_1_1_BYTE; + break; + case SPI_TX_QUAD: + nor->mode = SNOR_WRITE_1_1_4; + break; + } + + nor->memory_map = spi->memory_map; + nor->max_write_size = spi->max_write_size; + + /* TODO: unrelated to spi_slave{} */ + if (spi->option & SPI_CONN_DUAL_SHARED) + nor->dual = SNOR_DUAL_STACKED; + else if (spi->option & SPI_CONN_DUAL_SEPARATED) + nor->dual = SNOR_DUAL_PARALLEL; + + ret = spi_nor_scan(nor); + if (ret) + goto err_scan; + + ret = add_mtd_device(mtd); + if (ret) + goto err_mtd;
return 0; + +err_scan: + spi_release_bus(spi); +err_mtd: + spi_free_slave(spi); + device_remove(dev); + return ret; }
static const struct udevice_id m25p_ids[] = { @@ -34,4 +269,5 @@ U_BOOT_DRIVER(m25p80) = { .id = UCLASS_MTD, .of_match = m25p_ids, .probe = m25p_probe, + .priv_auto_alloc_size = sizeof(struct m25p), };

This patch adds driver-model probe from cmd_sf through MTD_DM_SPI_NOR which is depends on MTD and DM_SPI uclass.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- cmd/sf.c | 4 ++-- common/env_sf.c | 4 ++-- drivers/mtd/spi-nor/Kconfig | 5 +++++ drivers/mtd/spi-nor/Makefile | 2 ++ drivers/mtd/spi-nor/spi-nor-probe.c | 30 ++++++++++++++++++++++++++++++ include/spi_flash.h | 11 ++++++++++- 6 files changed, 51 insertions(+), 5 deletions(-) create mode 100644 drivers/mtd/spi-nor/spi-nor-probe.c
diff --git a/cmd/sf.c b/cmd/sf.c index 42862d9..e4d1274 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -85,7 +85,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; char *endp; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new, *bus_dev; int ret; #else @@ -118,7 +118,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) return -1; }
-#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) /* Remove the old device, otherwise probe will just be a nop */ ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); if (!ret) { diff --git a/common/env_sf.c b/common/env_sf.c index 892e6cb..6d5d847 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -52,7 +52,7 @@ int saveenv(void) char *saved_buffer = NULL, flag = OBSOLETE_FLAG; u32 saved_size, saved_offset, sector = 1; int ret; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, @@ -242,7 +242,7 @@ int saveenv(void) char *saved_buffer = NULL; int ret = 1; env_t env_new; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 374cdcb..59bb943 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -1,5 +1,6 @@ menuconfig MTD_SPI_NOR tristate "SPI-NOR device support" + select MTD_DM_SPI_NOR help This is the core SPI NOR framework which can be used to interact SPI-NOR to SPI driver interface layer and the SPI-NOR controller driver. @@ -12,6 +13,10 @@ menuconfig MTD_SPI_NOR SPI-NOR controller drivers for SPI-NOR device access. Note that from SPI-NOR core to SPI drivers there should be an interface layer.
+config MTD_DM_SPI_NOR + tristate + depends on DM_SPI && MTD + if MTD_SPI_NOR
config MTD_M25P80 diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 9ab6e3d..71e7ae2 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -6,6 +6,8 @@ ifdef CONFIG_MTD_SPI_NOR obj-y += spi-nor.o obj-y += spi-nor-ids.o + +obj-$(CONFIG_MTD_DM_SPI_NOR) += spi-nor-probe.o endif
obj-$(CONFIG_MTD_M25P80) += m25p80.o diff --git a/drivers/mtd/spi-nor/spi-nor-probe.c b/drivers/mtd/spi-nor/spi-nor-probe.c new file mode 100644 index 0000000..c808a7d --- /dev/null +++ b/drivers/mtd/spi-nor/spi-nor-probe.c @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <spi.h> +#include <spi_flash.h> + +int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode, + struct udevice **devp) +{ + struct spi_slave *slave; + struct udevice *bus; + char name[30], *str; + int ret; + + snprintf(name, sizeof(name), "spi-nor@%d:%d", busnum, cs); + str = strdup(name); + ret = spi_get_bus_and_cs(busnum, cs, max_hz, spi_mode, + "m25p80", str, &bus, &slave); + if (ret) + return ret; + + *devp = slave->dev; + return 0; +} diff --git a/include/spi_flash.h b/include/spi_flash.h index d0ce9e7..db07b99 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -108,6 +108,14 @@ struct spi_flash { #endif };
+#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR) + +int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode, + struct udevice **devp); + +#endif + struct dm_spi_flash_ops { int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf); int (*write)(struct udevice *dev, u32 offset, size_t len, @@ -190,7 +198,8 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
-#else +#elif !defined(CONFIG_MTD_SPI_NOR) + struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode);

Hi Masahiro,
On 15 February 2016 at 02:18, Jagan Teki jteki@openedev.com wrote:
This patch adds driver-model probe from cmd_sf through MTD_DM_SPI_NOR which is depends on MTD and DM_SPI uclass.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
cmd/sf.c | 4 ++-- common/env_sf.c | 4 ++-- drivers/mtd/spi-nor/Kconfig | 5 +++++ drivers/mtd/spi-nor/Makefile | 2 ++ drivers/mtd/spi-nor/spi-nor-probe.c | 30 ++++++++++++++++++++++++++++++ include/spi_flash.h | 11 ++++++++++- 6 files changed, 51 insertions(+), 5 deletions(-) create mode 100644 drivers/mtd/spi-nor/spi-nor-probe.c
diff --git a/cmd/sf.c b/cmd/sf.c index 42862d9..e4d1274 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -85,7 +85,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; char *endp; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new, *bus_dev; int ret; #else @@ -118,7 +118,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) return -1; }
-#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) /* Remove the old device, otherwise probe will just be a nop */ ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); if (!ret) { diff --git a/common/env_sf.c b/common/env_sf.c index 892e6cb..6d5d847 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -52,7 +52,7 @@ int saveenv(void) char *saved_buffer = NULL, flag = OBSOLETE_FLAG; u32 saved_size, saved_offset, sector = 1; int ret; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
@@ -242,7 +242,7 @@ int saveenv(void) char *saved_buffer = NULL; int ret = 1; env_t env_new; -#ifdef CONFIG_DM_SPI_FLASH +#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 374cdcb..59bb943 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -1,5 +1,6 @@ menuconfig MTD_SPI_NOR tristate "SPI-NOR device support"
select MTD_DM_SPI_NOR help This is the core SPI NOR framework which can be used to interact SPI-NOR to SPI driver interface layer and the SPI-NOR controller driver.
@@ -12,6 +13,10 @@ menuconfig MTD_SPI_NOR SPI-NOR controller drivers for SPI-NOR device access. Note that from SPI-NOR core to SPI drivers there should be an interface layer.
+config MTD_DM_SPI_NOR
tristate
depends on DM_SPI && MTD
Need some inputs here, my intention was not to add extra config MTD_DM_SPI_NOR on individual board configs. So MTD_SPI_NOR is selecting MTD_DM_SPI_NOR and there MTD_DM_SPI_NOR is depends on DM_SPI and MTD configs.
1) MTD_DM_SPI_NOR will select only If DM_SPI and MTD defined 2) MTD_DM_SPI_NOR will un-select if DM_SPI or MTD undefined
case 2) here is forcing MTD_DM_SPI_NOR selecting even if DM_SPI or MTD undefined, any idea how to fix this? I saw the Linux Documentation/kbuild/kconfig-language.txt have similar issue with "Adding common features and make the usage configurable" but couldn't find any solution.
if MTD_SPI_NOR
config MTD_M25P80 diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 9ab6e3d..71e7ae2 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -6,6 +6,8 @@ ifdef CONFIG_MTD_SPI_NOR obj-y += spi-nor.o obj-y += spi-nor-ids.o
+obj-$(CONFIG_MTD_DM_SPI_NOR) += spi-nor-probe.o endif
obj-$(CONFIG_MTD_M25P80) += m25p80.o diff --git a/drivers/mtd/spi-nor/spi-nor-probe.c b/drivers/mtd/spi-nor/spi-nor-probe.c new file mode 100644 index 0000000..c808a7d --- /dev/null +++ b/drivers/mtd/spi-nor/spi-nor-probe.c @@ -0,0 +1,30 @@ +/*
- Copyright (c) 2014 Google, Inc
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <dm.h> +#include <spi.h> +#include <spi_flash.h>
+int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode,
struct udevice **devp)
+{
struct spi_slave *slave;
struct udevice *bus;
char name[30], *str;
int ret;
snprintf(name, sizeof(name), "spi-nor@%d:%d", busnum, cs);
str = strdup(name);
ret = spi_get_bus_and_cs(busnum, cs, max_hz, spi_mode,
"m25p80", str, &bus, &slave);
if (ret)
return ret;
*devp = slave->dev;
return 0;
+} diff --git a/include/spi_flash.h b/include/spi_flash.h index d0ce9e7..db07b99 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -108,6 +108,14 @@ struct spi_flash { #endif };
+#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR)
+int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs,
unsigned int max_hz, unsigned int spi_mode,
struct udevice **devp);
+#endif
struct dm_spi_flash_ops { int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf); int (*write)(struct udevice *dev, u32 offset, size_t len, @@ -190,7 +198,8 @@ int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs,
void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs);
-#else +#elif !defined(CONFIG_MTD_SPI_NOR)
struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode);
-- 1.9.1
thanks!

While probing spi-nor in SPL spi_flash_probe is needed, so add the flash probe code in spi-nor-probe.c
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/spi-nor-probe.c | 15 +++++++++++++++ include/spi_flash.h | 6 ++++++ 2 files changed, 21 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor-probe.c b/drivers/mtd/spi-nor/spi-nor-probe.c index c808a7d..9bc61ea 100644 --- a/drivers/mtd/spi-nor/spi-nor-probe.c +++ b/drivers/mtd/spi-nor/spi-nor-probe.c @@ -9,6 +9,21 @@ #include <spi.h> #include <spi_flash.h>
+/* + * TODO(sjg@chromium.org): This is an old-style function. We should remove + * it when all SPI flash drivers use dm + */ +spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode) +{ + struct udevice *dev; + + if (spi_flash_probe_bus_cs(bus, cs, max_hz, spi_mode, &dev)) + return NULL; + + return dev_get_uclass_priv(dev); +} + int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode, struct udevice **devp) diff --git a/include/spi_flash.h b/include/spi_flash.h index db07b99..45fda7a 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -110,10 +110,16 @@ struct spi_flash {
#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR)
+typedef struct mtd_info spi_flash_t; + int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode, struct udevice **devp);
+/* Compatibility function - this is the old U-Boot API */ +spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode); + #endif
struct dm_spi_flash_ops {

env_sf need to free the flash while read error, so add the flash probe code in spi-nor-probe.c
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/spi-nor-probe.c | 7 +++++++ include/spi_flash.h | 3 +++ 2 files changed, 10 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor-probe.c b/drivers/mtd/spi-nor/spi-nor-probe.c index 9bc61ea..ccc3b6c 100644 --- a/drivers/mtd/spi-nor/spi-nor-probe.c +++ b/drivers/mtd/spi-nor/spi-nor-probe.c @@ -9,6 +9,8 @@ #include <spi.h> #include <spi_flash.h>
+#include <dm/device-internal.h> + /* * TODO(sjg@chromium.org): This is an old-style function. We should remove * it when all SPI flash drivers use dm @@ -24,6 +26,11 @@ spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, return dev_get_uclass_priv(dev); }
+void spi_flash_free(spi_flash_t *flash) +{ + device_remove(flash->dev); +} + int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode, struct udevice **devp) diff --git a/include/spi_flash.h b/include/spi_flash.h index 45fda7a..e76ea11 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -120,6 +120,9 @@ int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int spi_mode);
+/* Compatibility function - this is the old U-Boot API */ +void spi_flash_free(spi_flash_t *flash); + #endif
struct dm_spi_flash_ops {

Like adding spi_nor support for dm-driven code in m25p80 add the same way for non-dm code as well. - allocate spi_nor{} - basic initilization - install hooks - call to spi-nor core, using spi_nor_scan - register with mtd core
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/m25p80.c | 108 ++++++++++++++++++++++++++++++++++++++----- include/spi_flash.h | 18 +++++++- 2 files changed, 112 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 57e54d0..f0340a5 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -19,6 +19,9 @@ struct m25p { struct spi_slave *spi; struct spi_nor spi_nor; +#ifndef CONFIG_MTD_DM_SPI_NOR + struct mtd_info mtd; +#endif };
static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, @@ -179,16 +182,13 @@ static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, return ret; }
-static int m25p_probe(struct udevice *dev) +static int m25p80_spi_nor(struct spi_nor *nor) { - struct spi_slave *spi = dev_get_parent_priv(dev); - struct mtd_info *mtd = dev_get_uclass_priv(dev); - struct m25p *flash = dev_get_priv(dev); - struct spi_nor *nor; + struct mtd_info *mtd = nor->mtd; + struct m25p *flash = nor->priv; + struct spi_slave *spi = flash->spi; int ret;
- nor = &flash->spi_nor; - /* install hooks */ nor->read_mmap = m25p80_read_mmap; nor->read = m25p80_read; @@ -196,10 +196,6 @@ static int m25p_probe(struct udevice *dev) nor->read_reg = m25p80_read_reg; nor->write_reg = m25p80_write_reg;
- nor->mtd = mtd; - nor->priv = flash; - flash->spi = spi; - /* claim spi bus */ ret = spi_claim_bus(spi); if (ret) { @@ -251,10 +247,33 @@ err_scan: spi_release_bus(spi); err_mtd: spi_free_slave(spi); - device_remove(dev); return ret; }
+#ifdef CONFIG_MTD_DM_SPI_NOR +static int m25p_probe(struct udevice *dev) +{ + struct spi_slave *spi = dev_get_parent_priv(dev); + struct mtd_info *mtd = dev_get_uclass_priv(dev); + struct m25p *flash = dev_get_priv(dev); + struct spi_nor *nor; + int ret; + + nor = &flash->spi_nor; + + nor->mtd = mtd; + nor->priv = flash; + flash->spi = spi; + + ret = m25p80_spi_nor(nor); + if (ret) { + device_remove(dev); + return ret; + } + + return 0; +} + static const struct udevice_id m25p_ids[] = { /* * Generic compatibility for SPI NOR that can be identified by the @@ -271,3 +290,68 @@ U_BOOT_DRIVER(m25p80) = { .probe = m25p_probe, .priv_auto_alloc_size = sizeof(struct m25p), }; + +#else + +static struct mtd_info *m25p80_probe_tail(struct spi_slave *bus) +{ + struct m25p *flash; + struct spi_nor *nor; + int ret; + + flash = calloc(1, sizeof(*flash)); + if (!flash) { + debug("mp25p80: failed to allocate m25p\n"); + return NULL; + } + + nor = &flash->spi_nor; + nor->mtd = &flash->mtd; + + nor->priv = flash; + flash->spi = bus; + + ret = m25p80_spi_nor(nor); + if (ret) { + free(flash); + return NULL; + } + + return nor->mtd; +} + +struct mtd_info *spi_flash_probe(unsigned int busnum, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode) +{ + struct spi_slave *bus; + + bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); + if (!bus) + return NULL; + return m25p80_probe_tail(bus); +} + +#ifdef CONFIG_OF_SPI_FLASH +struct mtd_info *spi_flash_probe_fdt(const void *blob, int slave_node, + int spi_node) +{ + struct spi_slave *bus; + + bus = spi_setup_slave_fdt(blob, slave_node, spi_node); + if (!bus) + return NULL; + return m25p80_probe_tail(bus); +} +#endif + +void spi_flash_free(struct mtd_info *info) +{ + struct spi_nor *nor = info->priv; + struct m25p *flash = nor->priv; + + del_mtd_device(info); + spi_free_slave(flash->spi); + free(flash); +} + +#endif /* CONFIG_MTD_DM_SPI_NOR */ diff --git a/include/spi_flash.h b/include/spi_flash.h index e76ea11..1165199 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -108,10 +108,12 @@ struct spi_flash { #endif };
-#if defined(CONFIG_MTD_SPI_NOR) && defined(CONFIG_MTD_DM_SPI_NOR) +#ifdef CONFIG_MTD_SPI_NOR
typedef struct mtd_info spi_flash_t;
+#ifdef CONFIG_MTD_DM_SPI_NOR + int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, unsigned int max_hz, unsigned int spi_mode, struct udevice **devp); @@ -123,7 +125,19 @@ spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, /* Compatibility function - this is the old U-Boot API */ void spi_flash_free(spi_flash_t *flash);
-#endif +#else + +spi_flash_t *spi_flash_probe(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int spi_mode); + +spi_flash_t *spi_flash_probe_fdt(const void *blob, int slave_node, + int spi_node); + +void spi_flash_free(spi_flash_t *flash); + +#endif /* CONFIG_MTD_DM_SPI_NOR */ + +#endif /* CONFIG_MTD_SPI_NOR */
struct dm_spi_flash_ops { int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf);

erasesize name looks similar as the way mtd_info{} used so renamed erase_size to erasesize and more over the spi-flash will use mtd in future patches.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi/sf_dataflash.c | 4 ++-- drivers/mtd/spi/spi_flash.c | 14 +++++++------- include/spi_flash.h | 4 ++-- 3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c index b2a56da..0f66b99 100644 --- a/drivers/mtd/spi/sf_dataflash.c +++ b/drivers/mtd/spi/sf_dataflash.c @@ -427,12 +427,12 @@ static int add_dataflash(struct udevice *dev, char *name, int nr_pages, spi_flash->name = name; spi_flash->page_size = pagesize; spi_flash->size = nr_pages * pagesize; - spi_flash->erase_size = pagesize; + spi_flash->erasesize = pagesize;
#ifndef CONFIG_SPL_BUILD printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); print_size(spi_flash->page_size, ", erase size "); - print_size(spi_flash->erase_size, ", total "); + print_size(spi_flash->erasesize, ", total "); print_size(spi_flash->size, ""); printf(", revision %c", revision); puts("\n"); diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 8a60c72..17eb0e9 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -328,7 +328,7 @@ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) u8 cmd[SPI_FLASH_CMD_LEN]; int ret = -1;
- erase_size = flash->erase_size; + erase_size = flash->erasesize; if (offset % erase_size || len % erase_size) { debug("SF: Erase offset/length not multiple of erase size\n"); return -1; @@ -795,7 +795,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) return ret;
/* Cannot unlock; would unlock larger region than requested */ - if (stm_is_locked_sr(flash, ofs - flash->erase_size, flash->erase_size, + if (stm_is_locked_sr(flash, ofs - flash->erasesize, flash->erasesize, status_old)) return -EINVAL; /* @@ -1082,17 +1082,17 @@ int spi_flash_scan(struct spi_flash *flash) /* Compute erase sector and command */ if (params->flags & SECT_4K) { flash->erase_cmd = CMD_ERASE_4K; - flash->erase_size = 4096 << flash->shift; + flash->erasesize = 4096 << flash->shift; } else if (params->flags & SECT_32K) { flash->erase_cmd = CMD_ERASE_32K; - flash->erase_size = 32768 << flash->shift; + flash->erasesize = 32768 << flash->shift; } else { flash->erase_cmd = CMD_ERASE_64K; - flash->erase_size = flash->sector_size; + flash->erasesize = flash->sector_size; }
/* Now erase size becomes valid sector size */ - flash->sector_size = flash->erase_size; + flash->sector_size = flash->erasesize;
/* Look for the fastest read cmd */ cmd = fls(params->e_rd_cmd & spi->mode_rx); @@ -1164,7 +1164,7 @@ int spi_flash_scan(struct spi_flash *flash) #ifndef CONFIG_SPL_BUILD printf("SF: Detected %s with page size ", flash->name); print_size(flash->page_size, ", erase size "); - print_size(flash->erase_size, ", total "); + print_size(flash->erasesize, ", total "); print_size(flash->size, ""); if (flash->memory_map) printf(", mapped at %p", flash->memory_map); diff --git a/include/spi_flash.h b/include/spi_flash.h index 1165199..c68df26 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -40,7 +40,7 @@ struct spi_slave; * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size - * @erase_size: Erase size + * @erasesize: Erase size * @bank_read_cmd: Bank read cmd * @bank_write_cmd: Bank write cmd * @bank_curr: Current flash bank @@ -73,7 +73,7 @@ struct spi_flash { u32 size; u32 page_size; u32 sector_size; - u32 erase_size; + u32 erasesize; #ifdef CONFIG_SPI_FLASH_BAR u8 bank_read_cmd; u8 bank_write_cmd;

For computing proper sector_size the below patch assigned erase_size which is a proper sector computation size, so this patch directly used erasesize instead of assignment. "sf: Fix to compute proper sector_size" (sha1: c650ca7b4c160193791dc7a52381c71c6a29e871)
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- cmd/sf.c | 20 ++++++++++---------- drivers/dfu/dfu_sf.c | 8 ++++---- drivers/mtd/spi/sf_mtd.c | 2 +- drivers/mtd/spi/spi_flash.c | 3 --- 4 files changed, 15 insertions(+), 18 deletions(-)
diff --git a/cmd/sf.c b/cmd/sf.c index e4d1274..c20c901 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -53,8 +53,8 @@ static int sf_parse_len_arg(char *arg, ulong *len) if (ep == arg || *ep != '\0') return -1;
- if (round_up_len && flash->sector_size > 0) - *len = ROUND(len_arg, flash->sector_size); + if (round_up_len && flash->erasesize > 0) + *len = ROUND(len_arg, flash->erasesize); else *len = len_arg;
@@ -171,10 +171,10 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, { char *ptr = (char *)buf;
- debug("offset=%#x, sector_size=%#x, len=%#zx\n", - offset, flash->sector_size, len); + debug("offset=%#x, erasesize=%#x, len=%#zx\n", + offset, flash->erasesize, len); /* Read the entire sector so to allow for rewriting */ - if (spi_flash_read(flash, offset, flash->sector_size, cmp_buf)) + if (spi_flash_read(flash, offset, flash->erasesize, cmp_buf)) return "read"; /* Compare only what is meaningful (len) */ if (memcmp(cmp_buf, buf, len) == 0) { @@ -184,15 +184,15 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, return NULL; } /* Erase the entire sector */ - if (spi_flash_erase(flash, offset, flash->sector_size)) + if (spi_flash_erase(flash, offset, flash->erasesize)) return "erase"; /* If it's a partial sector, copy the data into the temp-buffer */ - if (len != flash->sector_size) { + if (len != flash->erasesize) { memcpy(cmp_buf, buf, len); ptr = cmp_buf; } /* Write one complete sector */ - if (spi_flash_write(flash, offset, flash->sector_size, ptr)) + if (spi_flash_write(flash, offset, flash->erasesize, ptr)) return "write";
return NULL; @@ -223,12 +223,12 @@ static int spi_flash_update(struct spi_flash *flash, u32 offset,
if (end - buf >= 200) scale = (end - buf) / 100; - cmp_buf = memalign(ARCH_DMA_MINALIGN, flash->sector_size); + cmp_buf = memalign(ARCH_DMA_MINALIGN, flash->erasesize); if (cmp_buf) { ulong last_update = get_timer(0);
for (; buf < end && !err_oper; buf += todo, offset += todo) { - todo = min_t(size_t, end - buf, flash->sector_size); + todo = min_t(size_t, end - buf, flash->erasesize); if (get_timer(last_update) > 100) { printf(" \rUpdating, %zu%% %lu B/s", 100 - (end - buf) / scale, diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index 9702eee..13e7f92 100644 --- a/drivers/dfu/dfu_sf.c +++ b/drivers/dfu/dfu_sf.c @@ -25,8 +25,8 @@ static int dfu_read_medium_sf(struct dfu_entity *dfu, u64 offset, void *buf,
static u64 find_sector(struct dfu_entity *dfu, u64 start, u64 offset) { - return (lldiv((start + offset), dfu->data.sf.dev->sector_size)) * - dfu->data.sf.dev->sector_size; + return (lldiv((start + offset), dfu->data.sf.dev->erasesize)) * + dfu->data.sf.dev->erasesize; }
static int dfu_write_medium_sf(struct dfu_entity *dfu, @@ -36,7 +36,7 @@ static int dfu_write_medium_sf(struct dfu_entity *dfu,
ret = spi_flash_erase(dfu->data.sf.dev, find_sector(dfu, dfu->data.sf.start, offset), - dfu->data.sf.dev->sector_size); + dfu->data.sf.dev->erasesize); if (ret) return ret;
@@ -123,7 +123,7 @@ int dfu_fill_entity_sf(struct dfu_entity *dfu, char *devstr, char *s) return -ENODEV;
dfu->dev_type = DFU_DEV_SF; - dfu->max_buf_size = dfu->data.sf.dev->sector_size; + dfu->max_buf_size = dfu->data.sf.dev->erasesize;
st = strsep(&s, " "); if (!strcmp(st, "raw")) { diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c index 0b9cb62..9a8302d 100644 --- a/drivers/mtd/spi/sf_mtd.c +++ b/drivers/mtd/spi/sf_mtd.c @@ -93,7 +93,7 @@ int spi_flash_mtd_register(struct spi_flash *flash)
/* Only uniform flash devices for now */ sf_mtd_info.numeraseregions = 0; - sf_mtd_info.erasesize = flash->sector_size; + sf_mtd_info.erasesize = flash->erasesize;
return add_mtd_device(&sf_mtd_info); } diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 17eb0e9..891e1ec 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1091,9 +1091,6 @@ int spi_flash_scan(struct spi_flash *flash) flash->erasesize = flash->sector_size; }
- /* Now erase size becomes valid sector size */ - flash->sector_size = flash->erasesize; - /* Look for the fastest read cmd */ cmd = fls(params->e_rd_cmd & spi->mode_rx); if (cmd) {

To sync with size in mtd_info{} this patch change data type of size to uint64_t
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- cmd/sf.c | 4 ++-- include/spi_flash.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/cmd/sf.c b/cmd/sf.c index c20c901..0fda27c 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -280,7 +280,7 @@ static int do_spi_flash_read_write(int argc, char * const argv[])
/* Consistency checking */ if (offset + len > flash->size) { - printf("ERROR: attempting %s past flash size (%#x)\n", + printf("ERROR: attempting %s past flash size (%#llx)\n", argv[0], flash->size); return 1; } @@ -336,7 +336,7 @@ static int do_spi_flash_erase(int argc, char * const argv[])
/* Consistency checking */ if (offset + size > flash->size) { - printf("ERROR: attempting %s past flash size (%#x)\n", + printf("ERROR: attempting %s past flash size (%#llx)\n", argv[0], flash->size); return 1; } diff --git a/include/spi_flash.h b/include/spi_flash.h index c68df26..e4d1d78 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -70,7 +70,7 @@ struct spi_flash { u8 shift; u16 flags;
- u32 size; + uint64_t size; u32 page_size; u32 sector_size; u32 erasesize;

Since spi-nor is using mtd layer for flash operations this patch used mtd ops from user commands instead of legacy spi_flash{} ops.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi_flash.h | 60 ++++++++++++++++++++++++++++++++++++++++++----------- 1 file changed, 48 insertions(+), 12 deletions(-)
diff --git a/include/spi_flash.h b/include/spi_flash.h index e4d1d78..9c8e52c 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -12,6 +12,7 @@
#include <dm.h> /* Because we dereference struct udevice here */ #include <linux/types.h> +#include <linux/mtd/mtd.h>
#ifndef CONFIG_SF_DEFAULT_SPEED # define CONFIG_SF_DEFAULT_SPEED 1000000 @@ -112,6 +113,39 @@ struct spi_flash {
typedef struct mtd_info spi_flash_t;
+static inline int spi_flash_read(spi_flash_t *info, u32 offset, + size_t len, void *buf) +{ + return mtd_read(info, offset, len, &len, (u_char *)buf); +} + +static inline int spi_flash_write(spi_flash_t *info, u32 offset, + size_t len, const void *buf) +{ + return mtd_write(info, offset, len, &len, (u_char *)buf); +} + +static inline int spi_flash_erase(spi_flash_t *info, u32 offset, size_t len) +{ + struct erase_info instr; + + instr.mtd = info; + instr.addr = offset; + instr.len = len; + instr.callback = 0; + + return mtd_erase(info, &instr); +} + +static inline int spi_flash_protect(spi_flash_t *info, u32 ofs, + u32 len, bool prot) +{ + if (prot) + return mtd_lock(info, ofs, len); + else + return mtd_unlock(info, ofs, len); +} + #ifdef CONFIG_MTD_DM_SPI_NOR
int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, @@ -137,6 +171,20 @@ void spi_flash_free(spi_flash_t *flash);
#endif /* CONFIG_MTD_DM_SPI_NOR */
+#else + +static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, + bool prot) +{ + if (!flash->flash_lock || !flash->flash_unlock) + return -EOPNOTSUPP; + + if (prot) + return flash->flash_lock(flash, ofs, len); + else + return flash->flash_unlock(flash, ofs, len); +} + #endif /* CONFIG_MTD_SPI_NOR */
struct dm_spi_flash_ops { @@ -259,18 +307,6 @@ static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, } #endif
-static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, - bool prot) -{ - if (!flash->flash_lock || !flash->flash_unlock) - return -EOPNOTSUPP; - - if (prot) - return flash->flash_lock(flash, ofs, len); - else - return flash->flash_unlock(flash, ofs, len); -} - void spi_boot(void) __noreturn; void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);

spi_flash_t same typedef alias name for spi_flash and mtd_info so which one will use based on the user config definition.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- cmd/sf.c | 10 +++++----- common/env_sf.c | 2 +- include/spi_flash.h | 2 ++ 3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/cmd/sf.c b/cmd/sf.c index 0fda27c..5dd7177 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -19,7 +19,7 @@ #include <asm/io.h> #include <dm/device-internal.h>
-static struct spi_flash *flash; +static spi_flash_t *flash;
/* * This function computes the length argument for the erase command. @@ -89,7 +89,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) struct udevice *new, *bus_dev; int ret; #else - struct spi_flash *new; + spi_flash_t *new; #endif
if (argc >= 2) { @@ -166,7 +166,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) * @param skipped Count of skipped data (incremented by this function) * @return NULL if OK, else a string containing the stage which failed */ -static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, +static const char *spi_flash_update_block(spi_flash_t *flash, u32 offset, size_t len, const char *buf, char *cmp_buf, size_t *skipped) { char *ptr = (char *)buf; @@ -208,7 +208,7 @@ static const char *spi_flash_update_block(struct spi_flash *flash, u32 offset, * @param buf buffer to write from * @return 0 if ok, 1 on error */ -static int spi_flash_update(struct spi_flash *flash, u32 offset, +static int spi_flash_update(spi_flash_t *flash, u32 offset, size_t len, const char *buf) { const char *err_oper = NULL; @@ -436,7 +436,7 @@ static void spi_test_next_stage(struct test_info *test) * @param vbuf Verification buffer * @return 0 if ok, -1 on error */ -static int spi_flash_test(struct spi_flash *flash, uint8_t *buf, ulong len, +static int spi_flash_test(spi_flash_t *flash, uint8_t *buf, ulong len, ulong offset, uint8_t *vbuf) { struct test_info test; diff --git a/common/env_sf.c b/common/env_sf.c index 6d5d847..cf909c0 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -43,7 +43,7 @@ DECLARE_GLOBAL_DATA_PTR;
char *env_name_spec = "SPI Flash";
-static struct spi_flash *env_flash; +static spi_flash_t *env_flash;
#if defined(CONFIG_ENV_OFFSET_REDUND) int saveenv(void) diff --git a/include/spi_flash.h b/include/spi_flash.h index 9c8e52c..29c07f5 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -173,6 +173,8 @@ void spi_flash_free(spi_flash_t *flash);
#else
+typedef struct spi_flash spi_flash_t; + static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, bool prot) {

Since spi_read_then_write is doing spi operations like setting up commands, tx and rx through spi_xfer, So it is meanfull to have this definition at spi layer and flash layer should use this whenever required.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/m25p80.c | 25 ------------------------- drivers/spi/spi-uclass.c | 25 +++++++++++++++++++++++++ drivers/spi/spi.c | 25 +++++++++++++++++++++++++ include/spi.h | 5 +++++ 4 files changed, 55 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index f0340a5..4aefe93 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -24,31 +24,6 @@ struct m25p { #endif };
-static int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, const u8 *data_out, - u8 *data_in, size_t data_len) -{ - unsigned long flags = SPI_XFER_BEGIN; - int ret; - - if (data_len == 0) - flags |= SPI_XFER_END; - - ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); - if (ret) { - debug("SF: Failed to send command (%zu bytes): %d\n", - cmd_len, ret); - } else if (data_len != 0) { - ret = spi_xfer(spi, data_len * 8, data_out, data_in, - SPI_XFER_END); - if (ret) - debug("SF: Failed to transfer %zu bytes of data: %d\n", - data_len, ret); - } - - return ret; -} - static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len) { struct m25p *flash = nor->priv; diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 677c020..7728eac 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -95,6 +95,31 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags); }
+int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, const u8 *data_out, + u8 *data_in, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("spi: failed to send command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, data_out, data_in, + SPI_XFER_END); + if (ret) + debug("spi: failed to transfer %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + static int spi_post_bind(struct udevice *dev) { /* Scan the bus for devices */ diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 7d81fbd..a050386 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -39,6 +39,31 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, return ptr; }
+int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, const u8 *data_out, + u8 *data_in, size_t data_len) +{ + unsigned long flags = SPI_XFER_BEGIN; + int ret; + + if (data_len == 0) + flags |= SPI_XFER_END; + + ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + if (ret) { + debug("spi: failed to send command (%zu bytes): %d\n", + cmd_len, ret); + } else if (data_len != 0) { + ret = spi_xfer(spi, data_len * 8, data_out, data_in, + SPI_XFER_END); + if (ret) + debug("spi: failed to transfer %zu bytes of data: %d\n", + data_len, ret); + } + + return ret; +} + #ifdef CONFIG_OF_SPI struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum, int node) diff --git a/include/spi.h b/include/spi.h index 4b88d39..19589aa 100644 --- a/include/spi.h +++ b/include/spi.h @@ -265,6 +265,11 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags);
+/* spi_write_then_read - SPI synchronous read followed by write */ +int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, + size_t cmd_len, const u8 *data_out, + u8 *data_in, size_t data_len); + /* Copy memory mapped data */ void spi_flash_copy_mmap(void *data, void *offset, size_t len);

Since spi_read_then_write moved into spi layer, the meaning of data transfer is also change from read_then_write to write_then_read, this means first spi will write the opcode through and then read the respective buffer.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/m25p80.c | 8 ++++---- drivers/spi/spi-uclass.c | 19 +++++++++---------- drivers/spi/spi.c | 19 +++++++++---------- include/spi.h | 23 +++++++++++++++++++---- 4 files changed, 41 insertions(+), 28 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 4aefe93..7e2702d 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -39,7 +39,7 @@ static int m25p80_read_reg(struct spi_nor *nor, u8 cmd, u8 *val, int len) if (nor->flags & SNOR_F_U_PAGE) spi->flags |= SPI_XFER_U_PAGE;
- ret = spi_read_then_write(spi, &cmd, 1, NULL, val, len); + ret = spi_write_then_read(spi, &cmd, 1, NULL, val, len); if (ret < 0) { debug("m25p80: error %d reading register %x\n", ret, cmd); return ret; @@ -65,7 +65,7 @@ static int m25p80_write_reg(struct spi_nor *nor, u8 cmd, u8 *buf, int len) if (nor->flags & SNOR_F_U_PAGE) spi->flags |= SPI_XFER_U_PAGE;
- ret = spi_read_then_write(spi, &cmd, 1, buf, NULL, len); + ret = spi_write_then_read(spi, &cmd, 1, buf, NULL, len); if (ret < 0) { debug("m25p80: error %d writing register %x\n", ret, cmd); return ret; @@ -119,7 +119,7 @@ static int m25p80_read(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, if (nor->flags & SNOR_F_U_PAGE) spi->flags |= SPI_XFER_U_PAGE;
- ret = spi_read_then_write(spi, cmd, cmd_len, NULL, data, data_len); + ret = spi_write_then_read(spi, cmd, cmd_len, NULL, data, data_len); if (ret < 0) { debug("m25p80: error %d reading %x\n", ret, *cmd); return ret; @@ -146,7 +146,7 @@ static int m25p80_write(struct spi_nor *nor, const u8 *cmd, size_t cmd_len, if (nor->flags & SNOR_F_U_PAGE) spi->flags |= SPI_XFER_U_PAGE;
- ret = spi_read_then_write(spi, cmd, cmd_len, data, NULL, data_len); + ret = spi_write_then_read(spi, cmd, cmd_len, data, NULL, data_len); if (ret < 0) { debug("m25p80: error %d writing %x\n", ret, *cmd); return ret; diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 7728eac..0dfdd8b 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -95,26 +95,25 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, return spi_get_ops(bus)->xfer(dev, bitlen, dout, din, flags); }
-int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, const u8 *data_out, - u8 *data_in, size_t data_len) +int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, + size_t n_opcode, const u8 *txbuf, u8 *rxbuf, + size_t n_buf) { unsigned long flags = SPI_XFER_BEGIN; int ret;
- if (data_len == 0) + if (n_buf == 0) flags |= SPI_XFER_END;
- ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags); if (ret) { debug("spi: failed to send command (%zu bytes): %d\n", - cmd_len, ret); - } else if (data_len != 0) { - ret = spi_xfer(spi, data_len * 8, data_out, data_in, - SPI_XFER_END); + n_opcode, ret); + } else if (n_buf != 0) { + ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END); if (ret) debug("spi: failed to transfer %zu bytes of data: %d\n", - data_len, ret); + n_buf, ret); }
return ret; diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index a050386..c8051f9 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -39,26 +39,25 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus, return ptr; }
-int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, const u8 *data_out, - u8 *data_in, size_t data_len) +int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, + size_t n_opcode, const u8 *txbuf, u8 *rxbuf, + size_t n_buf) { unsigned long flags = SPI_XFER_BEGIN; int ret;
- if (data_len == 0) + if (n_buf == 0) flags |= SPI_XFER_END;
- ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); + ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags); if (ret) { debug("spi: failed to send command (%zu bytes): %d\n", - cmd_len, ret); - } else if (data_len != 0) { - ret = spi_xfer(spi, data_len * 8, data_out, data_in, - SPI_XFER_END); + n_opcode, ret); + } else if (n_buf != 0) { + ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END); if (ret) debug("spi: failed to transfer %zu bytes of data: %d\n", - data_len, ret); + n_buf, ret); }
return ret; diff --git a/include/spi.h b/include/spi.h index 19589aa..dd0b11b 100644 --- a/include/spi.h +++ b/include/spi.h @@ -265,10 +265,25 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags);
-/* spi_write_then_read - SPI synchronous read followed by write */ -int spi_read_then_write(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, const u8 *data_out, - u8 *data_in, size_t data_len); +/** + * spi_write_then_read - SPI synchronous write followed by read + * + * This performs a half duplex transaction in which the first transaction + * is to send the opcode and if the length of buf is non-zero then it start + * the second transaction as tx or rx based on the need from respective slave. + * + * @slave: slave device with which opcode/data will be exchanged + * @opcode: opcode used for specific transfer + * @n_opcode: size of opcode, in bytes + * @txbuf: buffer into which data to be written + * @rxbuf: buffer into which data will be read + * @n_buf: size of buf (whether it's [tx|rx]buf), in bytes + * + * Returns: 0 on success, not 0 on failure + */ +int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, + size_t n_opcode, const u8 *txbuf, u8 *rxbuf, + size_t n_buf);
/* Copy memory mapped data */ void spi_flash_copy_mmap(void *data, void *offset, size_t len);

Renamed SPI_FLASH_BAR to SPI_NOR_BAR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/spi-nor.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index b867ce9..130f7af 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -181,7 +181,7 @@ static int spi_nor_wait_till_ready(struct spi_nor *nor, unsigned long timeout) return -ETIMEDOUT; }
-#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR static int spi_nor_write_bar(struct spi_nor *nor, u32 offset) { u8 bank_sel; @@ -514,7 +514,7 @@ static int spi_nor_erase(struct mtd_info *mtd, struct erase_info *instr) if (nor->dual > SNOR_DUAL_SINGLE) spi_nor_dual(nor, &erase_addr); #endif -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR ret = spi_nor_write_bar(nor, erase_addr); if (ret < 0) return ret; @@ -577,7 +577,7 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t offset, size_t len, if (nor->dual > SNOR_DUAL_SINGLE) spi_nor_dual(nor, &write_addr); #endif -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR ret = spi_nor_write_bar(nor, write_addr); if (ret < 0) return ret; @@ -647,7 +647,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, if (nor->dual > SNOR_DUAL_SINGLE) spi_nor_dual(nor, &read_addr); #endif -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR ret = spi_nor_write_bar(nor, read_addr); if (ret < 0) return ret; @@ -1103,7 +1103,7 @@ int spi_nor_scan(struct spi_nor *nor) }
/* Configure the BAR - discover bank cmds and read current bank */ -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR ret = spi_nor_read_bar(nor, info); if (ret < 0) return ret; @@ -1127,13 +1127,13 @@ int spi_nor_scan(struct spi_nor *nor) puts("\n"); #endif
-#ifndef CONFIG_SPI_FLASH_BAR +#ifndef CONFIG_SPI_NOR_BAR if (((nor->dual == SNOR_DUAL_SINGLE) && (mtd->size > SNOR_16MB_BOUN)) || ((nor->dual > SNOR_DUAL_SINGLE) && (mtd->size > SNOR_16MB_BOUN << 1))) { puts("spi-nor: Warning - Only lower 16MiB accessible,"); - puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); + puts(" Full access #define CONFIG_SPI_NOR_BAR\n"); } #endif

Added kconfig entry for SPI_NOR_BAR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 59bb943..43f59b7 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -49,4 +49,11 @@ config MTD_SPI_NOR_USE_4K_SECTORS Please note that some tools/drivers/filesystems may not work with 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
+config SPI_NOR_BAR + bool "SPI NOR Bank/Extended address register support" + help + Enable the SPI NOR Bank/Extended address register support. + Bank/Extended address registers are used to access the flash + which has size > 16MiB in 3-byte addressing. + endif # MTD_SPI_NOR

Copy spl files from drivers/mtd/spi to spi-nor, more changes will added on future patches.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Makefile | 5 +++ drivers/mtd/spi-nor/fsl_espi_spl.c | 90 ++++++++++++++++++++++++++++++++++++++ drivers/mtd/spi-nor/spi_spl_load.c | 90 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 185 insertions(+) create mode 100644 drivers/mtd/spi-nor/fsl_espi_spl.c create mode 100644 drivers/mtd/spi-nor/spi_spl_load.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 71e7ae2..4d27811 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -3,6 +3,11 @@ # # SPDX-License-Identifier: GPL-2.0+
+ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o +obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o +endif + ifdef CONFIG_MTD_SPI_NOR obj-y += spi-nor.o obj-y += spi-nor-ids.o diff --git a/drivers/mtd/spi-nor/fsl_espi_spl.c b/drivers/mtd/spi-nor/fsl_espi_spl.c new file mode 100644 index 0000000..b915469 --- /dev/null +++ b/drivers/mtd/spi-nor/fsl_espi_spl.c @@ -0,0 +1,90 @@ +/* + * Copyright 2013 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spi_flash.h> +#include <malloc.h> + +#define ESPI_BOOT_IMAGE_SIZE 0x48 +#define ESPI_BOOT_IMAGE_ADDR 0x50 +#define CONFIG_CFG_DATA_SECTOR 0 + +void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst) +{ + struct spi_flash *flash; + + flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + if (flash == NULL) { + puts("\nspi_flash_probe failed"); + hang(); + } + + spi_flash_read(flash, offs, size, vdst); +} + +/* + * The main entry for SPI booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from SPI into SDRAM and starts it from there. + */ +void spi_boot(void) +{ + void (*uboot)(void) __noreturn; + u32 offset, code_len, copy_len = 0; +#ifndef CONFIG_FSL_CORENET + unsigned char *buf = NULL; +#endif + struct spi_flash *flash; + + flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + if (flash == NULL) { + puts("\nspi_flash_probe failed"); + hang(); + } + +#ifdef CONFIG_FSL_CORENET + offset = CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; + code_len = CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE; +#else + /* + * Load U-Boot image from SPI flash into RAM + */ + buf = malloc(flash->page_size); + if (buf == NULL) { + puts("\nmalloc failed"); + hang(); + } + memset(buf, 0, flash->page_size); + + spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, + flash->page_size, (void *)buf); + offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR); + /* Skip spl code */ + offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; + /* Get the code size from offset 0x48 */ + code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE); + /* Skip spl code */ + code_len = code_len - CONFIG_SPL_MAX_SIZE; +#endif + /* copy code to DDR */ + printf("Loading second stage boot loader "); + while (copy_len <= code_len) { + spi_flash_read(flash, offset + copy_len, 0x2000, + (void *)(CONFIG_SYS_SPI_FLASH_U_BOOT_DST + + copy_len)); + copy_len = copy_len + 0x2000; + putc('.'); + } + + /* + * Jump to U-Boot image + */ + flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, code_len); + uboot = (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_START; + (*uboot)(); +} diff --git a/drivers/mtd/spi-nor/spi_spl_load.c b/drivers/mtd/spi-nor/spi_spl_load.c new file mode 100644 index 0000000..ca56fe9 --- /dev/null +++ b/drivers/mtd/spi-nor/spi_spl_load.c @@ -0,0 +1,90 @@ +/* + * Copyright (C) 2011 OMICRON electronics GmbH + * + * based on drivers/mtd/nand/nand_spl_load.c + * + * Copyright (C) 2011 + * Heiko Schocher, DENX Software Engineering, hs@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spi.h> +#include <spi_flash.h> +#include <errno.h> +#include <spl.h> + +#ifdef CONFIG_SPL_OS_BOOT +/* + * Load the kernel, check for a valid header we can parse, and if found load + * the kernel and then device tree. + */ +static int spi_load_image_os(struct spi_flash *flash, + struct image_header *header) +{ + /* Read for a header, parse or error out. */ + spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40, + (void *)header); + + if (image_get_magic(header) != IH_MAGIC) + return -1; + + spl_parse_image_header(header); + + spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, + spl_image.size, (void *)spl_image.load_addr); + + /* Read device tree. */ + spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS, + CONFIG_SYS_SPI_ARGS_SIZE, + (void *)CONFIG_SYS_SPL_ARGS_ADDR); + + return 0; +} +#endif + +/* + * The main entry for SPI booting. It's necessary that SDRAM is already + * configured and available since this code loads the main U-Boot image + * from SPI into SDRAM and starts it from there. + */ +int spl_spi_load_image(void) +{ + int err = 0; + struct spi_flash *flash; + struct image_header *header; + + /* + * Load U-Boot image from SPI flash into RAM + */ + + flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, + CONFIG_SF_DEFAULT_MODE); + if (!flash) { + puts("SPI probe failed.\n"); + return -ENODEV; + } + + /* use CONFIG_SYS_TEXT_BASE as temporary storage area */ + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE); + +#ifdef CONFIG_SPL_OS_BOOT + if (spl_start_uboot() || spi_load_image_os(flash, header)) +#endif + { + /* Load u-boot, mkimage header is 64 bytes. */ + err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40, + (void *)header); + if (err) + return err; + + spl_parse_image_header(header); + err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, + spl_image.size, (void *)spl_image.load_addr); + } + + return err; +}

Use ascending order while including headers files.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/fsl_espi_spl.c | 2 +- drivers/mtd/spi-nor/spi_spl_load.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/fsl_espi_spl.c b/drivers/mtd/spi-nor/fsl_espi_spl.c index b915469..7c40245 100644 --- a/drivers/mtd/spi-nor/fsl_espi_spl.c +++ b/drivers/mtd/spi-nor/fsl_espi_spl.c @@ -5,8 +5,8 @@ */
#include <common.h> -#include <spi_flash.h> #include <malloc.h> +#include <spi_flash.h>
#define ESPI_BOOT_IMAGE_SIZE 0x48 #define ESPI_BOOT_IMAGE_ADDR 0x50 diff --git a/drivers/mtd/spi-nor/spi_spl_load.c b/drivers/mtd/spi-nor/spi_spl_load.c index ca56fe9..285b6da 100644 --- a/drivers/mtd/spi-nor/spi_spl_load.c +++ b/drivers/mtd/spi-nor/spi_spl_load.c @@ -10,9 +10,9 @@ */
#include <common.h> +#include <errno.h> #include <spi.h> #include <spi_flash.h> -#include <errno.h> #include <spl.h>
#ifdef CONFIG_SPL_OS_BOOT

Replace spi_flash{} with mtd_info{}
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/fsl_espi_spl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/fsl_espi_spl.c b/drivers/mtd/spi-nor/fsl_espi_spl.c index 7c40245..93b0b2e 100644 --- a/drivers/mtd/spi-nor/fsl_espi_spl.c +++ b/drivers/mtd/spi-nor/fsl_espi_spl.c @@ -14,7 +14,7 @@
void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst) { - struct spi_flash *flash; + spi_flash_t *flash;
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); @@ -38,7 +38,7 @@ void spi_boot(void) #ifndef CONFIG_FSL_CORENET unsigned char *buf = NULL; #endif - struct spi_flash *flash; + spi_flash_t *flash;
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);

Replace spi_flash{} with mtd_info{}
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/spi_spl_load.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/spi_spl_load.c b/drivers/mtd/spi-nor/spi_spl_load.c index 285b6da..9f33826 100644 --- a/drivers/mtd/spi-nor/spi_spl_load.c +++ b/drivers/mtd/spi-nor/spi_spl_load.c @@ -20,8 +20,7 @@ * Load the kernel, check for a valid header we can parse, and if found load * the kernel and then device tree. */ -static int spi_load_image_os(struct spi_flash *flash, - struct image_header *header) +static int spi_load_image_os(spi_flash_t *flash, struct image_header *header) { /* Read for a header, parse or error out. */ spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40, @@ -52,7 +51,7 @@ static int spi_load_image_os(struct spi_flash *flash, int spl_spi_load_image(void) { int err = 0; - struct spi_flash *flash; + spi_flash_t *flash; struct image_header *header;
/*

Added flash vendor kconfig entries from drivers/mtd/spi
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 43f59b7..219306f 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -56,4 +56,44 @@ config SPI_NOR_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing.
+config SPI_FLASH_ATMEL + bool "Atmel SPI flash support" + help + Add support for various Atmel SPI flash chips (AT45xxx and AT25xxx) + +config SPI_FLASH_EON + bool "EON SPI flash support" + help + Add support for various EON SPI flash chips (EN25xxx) + +config SPI_FLASH_GIGADEVICE + bool "GigaDevice SPI flash support" + help + Add support for various GigaDevice SPI flash chips (GD25xxx) + +config SPI_FLASH_MACRONIX + bool "Macronix SPI flash support" + help + Add support for various Macronix SPI flash chips (MX25Lxxx) + +config SPI_FLASH_SPANSION + bool "Spansion SPI flash support" + help + Add support for various Spansion SPI flash chips (S25FLxxx) + +config SPI_FLASH_STMICRO + bool "STMicro SPI flash support" + help + Add support for various STMicro SPI flash chips (M25Pxxx and N25Qxxx) + +config SPI_FLASH_SST + bool "SST SPI flash support" + help + Add support for various SST SPI flash chips (SST25xxx) + +config SPI_FLASH_WINBOND + bool "Winbond SPI flash support" + help + Add support for various Winbond SPI flash chips (W25xxx) + endif # MTD_SPI_NOR

Since SPI-NOR core relies on MTD uclass.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/arm/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d2dbb1a..2dc2191 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -565,6 +565,7 @@ config ARCH_ZYNQ select DM_MMC select DM_SPI select DM_SERIAL + select MTD select DM_SPI_FLASH select SPL_SEPARATE_BSS if SPL

Drop using legacy DM_SPI_FLASH.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2dc2191..b26dddb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -566,7 +566,6 @@ config ARCH_ZYNQ select DM_SPI select DM_SERIAL select MTD - select DM_SPI_FLASH select SPL_SEPARATE_BSS if SPL
config ARCH_ZYNQMP

Drop using legacy spi_flash core.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/zynq_microzed_defconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index a3a66ec..c181537 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -13,7 +13,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y

Use m25p80 which is flash interface layer between spi-nor core vs drivers/spi
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/zynq_microzed_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index c181537..79f2913 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -18,3 +18,4 @@ CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y +CONFIG_MTD_M25P80=y

Enabled SPI-NOR core support
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/zynq_microzed_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 79f2913..db02ba3 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -19,3 +19,4 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_MTD_M25P80=y +CONFIG_MTD_SPI_NOR=y

Add SPL support for SPI-NOR flash.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/Makefile | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/Makefile b/drivers/Makefile index e7eab66..1d179b9 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/ obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/ obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/ +obj-$(CONFIG_SPL_SPI_NOR_SUPPORT) += mtd/spi-nor/ obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/ obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/

Use SPI-NOR SPL support for zynq boards.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/zynq-common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e8c3ef0..7427d22 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -346,7 +346,7 @@ #ifdef CONFIG_ZYNQ_QSPI #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000

Since SPI-NOR depends on MTD core enable the same for SPI-NOR SPL.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/zynq-common.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 7427d22..582b2a3 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -347,6 +347,7 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000

Copy sf_dataflash.c from drivers/mtd/spi to spi-nor, more changes will see on future patches.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 701 +++++++++++++++++++++++++++++++++++++ 1 file changed, 701 insertions(+) create mode 100644 drivers/mtd/spi-nor/sf_dataflash.c
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c new file mode 100644 index 0000000..b2a56da --- /dev/null +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -0,0 +1,701 @@ +/* + * + * Atmel DataFlash probing + * + * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. + * Haikun Wang (haikun.wang@freescale.com) + * + * SPDX-License-Identifier: GPL-2.0+ +*/ +#include <common.h> +#include <dm.h> +#include <errno.h> +#include <fdtdec.h> +#include <spi.h> +#include <spi_flash.h> +#include <div64.h> +#include <linux/err.h> +#include <linux/math64.h> + +#include "sf_internal.h" + +/* reads can bypass the buffers */ +#define OP_READ_CONTINUOUS 0xE8 +#define OP_READ_PAGE 0xD2 + +/* group B requests can run even while status reports "busy" */ +#define OP_READ_STATUS 0xD7 /* group B */ + +/* move data between host and buffer */ +#define OP_READ_BUFFER1 0xD4 /* group B */ +#define OP_READ_BUFFER2 0xD6 /* group B */ +#define OP_WRITE_BUFFER1 0x84 /* group B */ +#define OP_WRITE_BUFFER2 0x87 /* group B */ + +/* erasing flash */ +#define OP_ERASE_PAGE 0x81 +#define OP_ERASE_BLOCK 0x50 + +/* move data between buffer and flash */ +#define OP_TRANSFER_BUF1 0x53 +#define OP_TRANSFER_BUF2 0x55 +#define OP_MREAD_BUFFER1 0xD4 +#define OP_MREAD_BUFFER2 0xD6 +#define OP_MWERASE_BUFFER1 0x83 +#define OP_MWERASE_BUFFER2 0x86 +#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ +#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ + +/* write to buffer, then write-erase to flash */ +#define OP_PROGRAM_VIA_BUF1 0x82 +#define OP_PROGRAM_VIA_BUF2 0x85 + +/* compare buffer to flash */ +#define OP_COMPARE_BUF1 0x60 +#define OP_COMPARE_BUF2 0x61 + +/* read flash to buffer, then write-erase to flash */ +#define OP_REWRITE_VIA_BUF1 0x58 +#define OP_REWRITE_VIA_BUF2 0x59 + +/* + * newer chips report JEDEC manufacturer and device IDs; chip + * serial number and OTP bits; and per-sector writeprotect. + */ +#define OP_READ_ID 0x9F +#define OP_READ_SECURITY 0x77 +#define OP_WRITE_SECURITY_REVC 0x9A +#define OP_WRITE_SECURITY 0x9B /* revision D */ + + +struct dataflash { + uint8_t command[16]; + unsigned short page_offset; /* offset in flash address */ +}; + +/* + * Return the status of the DataFlash device. + */ +static inline int dataflash_status(struct spi_slave *spi) +{ + int ret; + u8 status; + /* + * NOTE: at45db321c over 25 MHz wants to write + * a dummy byte after the opcode... + */ + ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1); + return ret ? -EIO : status; +} + +/* + * Poll the DataFlash device until it is READY. + * This usually takes 5-20 msec or so; more for sector erase. + * ready: return > 0 + */ +static int dataflash_waitready(struct spi_slave *spi) +{ + int status; + int timeout = 2 * CONFIG_SYS_HZ; + int timebase; + + timebase = get_timer(0); + do { + status = dataflash_status(spi); + if (status < 0) + status = 0; + + if (status & (1 << 7)) /* RDY/nBSY */ + return status; + + mdelay(3); + } while (get_timer(timebase) < timeout); + + return -ETIME; +} + +/* + * Erase pages of flash. + */ +static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + unsigned blocksize; + uint8_t *command; + uint32_t rem; + int status; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + blocksize = spi_flash->page_size << 3; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + + div_u64_rem(len, spi_flash->page_size, &rem); + if (rem) + return -EINVAL; + div_u64_rem(offset, spi_flash->page_size, &rem); + if (rem) + return -EINVAL; + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + while (len > 0) { + unsigned int pageaddr; + int do_block; + /* + * Calculate flash page address; use block erase (for speed) if + * we're at a block boundary and need to erase the whole block. + */ + pageaddr = div_u64(offset, spi_flash->page_size); + do_block = (pageaddr & 0x7) == 0 && len >= blocksize; + pageaddr = pageaddr << dataflash->page_offset; + + command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; + command[1] = (uint8_t)(pageaddr >> 16); + command[2] = (uint8_t)(pageaddr >> 8); + command[3] = 0; + + debug("%s ERASE %s: (%x) %x %x %x [%d]\n", + dev->name, do_block ? "block" : "page", + command[0], command[1], command[2], command[3], + pageaddr); + + status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + if (status < 0) { + debug("%s: erase send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: erase waitready error!\n", dev->name); + return status; + } + + if (do_block) { + offset += blocksize; + len -= blocksize; + } else { + offset += spi_flash->page_size; + len -= spi_flash->page_size; + } + } + + spi_release_bus(spi); + + return 0; +} + +/* + * Read from the DataFlash device. + * offset : Start offset in flash device + * len : Amount to read + * buf : Buffer containing the data + */ +static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, + void *buf) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + unsigned int addr; + uint8_t *command; + int status; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + debug("READ: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + /* Calculate flash page/byte address */ + addr = (((unsigned)offset / spi_flash->page_size) + << dataflash->page_offset) + + ((unsigned)offset % spi_flash->page_size); + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + /* + * Continuous read, max clock = f(car) which may be less than + * the peak rate available. Some chips support commands with + * fewer "don't care" bytes. Both buffers stay unchanged. + */ + command[0] = OP_READ_CONTINUOUS; + command[1] = (uint8_t)(addr >> 16); + command[2] = (uint8_t)(addr >> 8); + command[3] = (uint8_t)(addr >> 0); + + /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ + status = spi_flash_cmd_read(spi, command, 8, buf, len); + + spi_release_bus(spi); + + return status; +} + +/* + * Write to the DataFlash device. + * offset : Start offset in flash device + * len : Amount to write + * buf : Buffer containing the data + */ +int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, + const void *buf) +{ + struct dataflash *dataflash; + struct spi_flash *spi_flash; + struct spi_slave *spi; + uint8_t *command; + unsigned int pageaddr, addr, to, writelen; + size_t remaining = len; + u_char *writebuf = (u_char *)buf; + int status = -EINVAL; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + spi = spi_flash->spi; + + memset(dataflash->command, 0 , sizeof(dataflash->command)); + command = dataflash->command; + + debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); + + pageaddr = ((unsigned)offset / spi_flash->page_size); + to = ((unsigned)offset % spi_flash->page_size); + if (to + len > spi_flash->page_size) + writelen = spi_flash->page_size - to; + else + writelen = len; + + status = spi_claim_bus(spi); + if (status) { + debug("SPI DATAFLASH: unable to claim SPI bus\n"); + return status; + } + + while (remaining > 0) { + debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); + + /* + * REVISIT: + * (a) each page in a sector must be rewritten at least + * once every 10K sibling erase/program operations. + * (b) for pages that are already erased, we could + * use WRITE+MWRITE not PROGRAM for ~30% speedup. + * (c) WRITE to buffer could be done while waiting for + * a previous MWRITE/MWERASE to complete ... + * (d) error handling here seems to be mostly missing. + * + * Two persistent bits per page, plus a per-sector counter, + * could support (a) and (b) ... we might consider using + * the second half of sector zero, which is just one block, + * to track that state. (On AT91, that sector should also + * support boot-from-DataFlash.) + */ + + addr = pageaddr << dataflash->page_offset; + + /* (1) Maybe transfer partial page to Buffer1 */ + if (writelen != spi_flash->page_size) { + command[0] = OP_TRANSFER_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + + debug("TRANSFER: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + if (status < 0) { + debug("%s: write(<pagesize) command error!\n", + dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: write(<pagesize) waitready error!\n", + dev->name); + return status; + } + } + + /* (2) Program full page via Buffer1 */ + addr += to; + command[0] = OP_PROGRAM_VIA_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = (addr & 0x000000FF); + + debug("PROGRAM: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, + 4, writebuf, writelen); + if (status < 0) { + debug("%s: write send command error!\n", dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + if (status < 0) { + debug("%s: write waitready error!\n", dev->name); + return status; + } + +#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY + /* (3) Compare to Buffer1 */ + addr = pageaddr << dataflash->page_offset; + command[0] = OP_COMPARE_BUF1; + command[1] = (addr & 0x00FF0000) >> 16; + command[2] = (addr & 0x0000FF00) >> 8; + command[3] = 0; + + debug("COMPARE: (%x) %x %x %x\n", + command[0], command[1], command[2], command[3]); + + status = spi_flash_cmd_write(spi, command, + 4, writebuf, writelen); + if (status < 0) { + debug("%s: write(compare) send command error!\n", + dev->name); + return -EIO; + } + + status = dataflash_waitready(spi); + + /* Check result of the compare operation */ + if (status & (1 << 6)) { + printf("SPI DataFlash: write compare page %u, err %d\n", + pageaddr, status); + remaining = 0; + status = -EIO; + break; + } else { + status = 0; + } + +#endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ + remaining = remaining - writelen; + pageaddr++; + to = 0; + writebuf += writelen; + + if (remaining > spi_flash->page_size) + writelen = spi_flash->page_size; + else + writelen = remaining; + } + + spi_release_bus(spi); + + return 0; +} + +static int add_dataflash(struct udevice *dev, char *name, int nr_pages, + int pagesize, int pageoffset, char revision) +{ + struct spi_flash *spi_flash; + struct dataflash *dataflash; + + dataflash = dev_get_priv(dev); + spi_flash = dev_get_uclass_priv(dev); + + dataflash->page_offset = pageoffset; + + spi_flash->name = name; + spi_flash->page_size = pagesize; + spi_flash->size = nr_pages * pagesize; + spi_flash->erase_size = pagesize; + +#ifndef CONFIG_SPL_BUILD + printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); + print_size(spi_flash->page_size, ", erase size "); + print_size(spi_flash->erase_size, ", total "); + print_size(spi_flash->size, ""); + printf(", revision %c", revision); + puts("\n"); +#endif + + return 0; +} + +struct flash_info { + char *name; + + /* + * JEDEC id has a high byte of zero plus three data bytes: + * the manufacturer id, then a two byte device id. + */ + uint32_t jedec_id; + + /* The size listed here is what works with OP_ERASE_PAGE. */ + unsigned nr_pages; + uint16_t pagesize; + uint16_t pageoffset; + + uint16_t flags; +#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ +#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ +}; + +static struct flash_info dataflash_data[] = { + /* + * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, + * one with IS_POW2PS and the other without. The entry with the + * non-2^N byte page size can't name exact chip revisions without + * losing backwards compatibility for cmdlinepart. + * + * Those two entries have different name spelling format in order to + * show their difference obviously. + * The upper case refer to the chip isn't in normal 2^N bytes page-size + * mode. + * The lower case refer to the chip is in normal 2^N bytes page-size + * mode. + * + * These newer chips also support 128-byte security registers (with + * 64 bytes one-time-programmable) and software write-protection. + */ + { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, + { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, + { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, + { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, + { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, + { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ + + { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, + { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, + + { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, + { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, +}; + +static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) +{ + int tmp; + uint32_t jedec; + struct flash_info *info; + int status; + + /* + * JEDEC also defines an optional "extended device information" + * string for after vendor-specific data, after the three bytes + * we use here. Supporting some chips might require using it. + * + * If the vendor ID isn't Atmel's (0x1f), assume this call failed. + * That's not an error; only rev C and newer chips handle it, and + * only Atmel sells these chips. + */ + if (id[0] != 0x1f) + return NULL; + + jedec = id[0]; + jedec = jedec << 8; + jedec |= id[1]; + jedec = jedec << 8; + jedec |= id[2]; + + for (tmp = 0, info = dataflash_data; + tmp < ARRAY_SIZE(dataflash_data); + tmp++, info++) { + if (info->jedec_id == jedec) { + if (info->flags & SUP_POW2PS) { + status = dataflash_status(spi); + if (status < 0) { + debug("SPI DataFlash: status error %d\n", + status); + return NULL; + } + if (status & 0x1) { + if (info->flags & IS_POW2PS) + return info; + } else { + if (!(info->flags & IS_POW2PS)) + return info; + } + } else { + return info; + } + } + } + + /* + * Treat other chips as errors ... we won't know the right page + * size (it might be binary) even when we can tell which density + * class is involved (legacy chip id scheme). + */ + printf("SPI DataFlash: Unsupported flash IDs: "); + printf("manuf %02x, jedec %04x, ext_jedec %04x\n", + id[0], jedec, id[3] << 8 | id[4]); + return NULL; +} + +/* + * Detect and initialize DataFlash device, using JEDEC IDs on newer chips + * or else the ID code embedded in the status bits: + * + * Device Density ID code #Pages PageSize Offset + * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 + * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 + * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 + * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 + * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 + * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 + * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 + * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 + */ +static int spi_dataflash_probe(struct udevice *dev) +{ + struct spi_slave *spi = dev_get_parent_priv(dev); + struct spi_flash *spi_flash; + struct flash_info *info; + u8 idcode[5]; + int ret, status = 0; + + spi_flash = dev_get_uclass_priv(dev); + spi_flash->dev = dev; + + ret = spi_claim_bus(spi); + if (ret) + return ret; + + ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); + if (ret) { + printf("SPI DataFlash: Failed to get idcodes\n"); + goto err_read_cmd; + } + + /* + * Try to detect dataflash by JEDEC ID. + * If it succeeds we know we have either a C or D part. + * D will support power of 2 pagesize option. + * Both support the security register, though with different + * write procedures. + */ + info = jedec_probe(spi, idcode); + if (info != NULL) + add_dataflash(dev, info->name, info->nr_pages, + info->pagesize, info->pageoffset, + (info->flags & SUP_POW2PS) ? 'd' : 'c'); + else { + /* + * Older chips support only legacy commands, identifing + * capacity using bits in the status byte. + */ + status = dataflash_status(spi); + if (status <= 0 || status == 0xff) { + printf("SPI DataFlash: read status error %d\n", status); + if (status == 0 || status == 0xff) + status = -ENODEV; + goto err_read_cmd; + } + /* + * if there's a device there, assume it's dataflash. + * board setup should have set spi->max_speed_max to + * match f(car) for continuous reads, mode 0 or 3. + */ + switch (status & 0x3c) { + case 0x0c: /* 0 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB011B", + 512, 264, 9, 0); + break; + case 0x14: /* 0 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB021B", + 1024, 264, 9, 0); + break; + case 0x1c: /* 0 1 1 1 x x */ + status = add_dataflash(dev, "AT45DB041x", + 2048, 264, 9, 0); + break; + case 0x24: /* 1 0 0 1 x x */ + status = add_dataflash(dev, "AT45DB081B", + 4096, 264, 9, 0); + break; + case 0x2c: /* 1 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB161x", + 4096, 528, 10, 0); + break; + case 0x34: /* 1 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB321x", + 8192, 528, 10, 0); + break; + case 0x38: /* 1 1 1 x x x */ + case 0x3c: + status = add_dataflash(dev, "AT45DB642x", + 8192, 1056, 11, 0); + break; + /* obsolete AT45DB1282 not (yet?) supported */ + default: + dev_info(&spi->dev, "unsupported device (%x)\n", + status & 0x3c); + status = -ENODEV; + goto err_read_cmd; + } + } + + /* Assign spi data */ + spi_flash->spi = spi; + spi_flash->memory_map = spi->memory_map; + spi_flash->dual_flash = spi->option; + + spi_release_bus(spi); + + return 0; + +err_read_cmd: + spi_release_bus(spi); + + return status; +} + +static const struct dm_spi_flash_ops spi_dataflash_ops = { + .read = spi_dataflash_read, + .write = spi_dataflash_write, + .erase = spi_dataflash_erase, +}; + +static const struct udevice_id spi_dataflash_ids[] = { + { .compatible = "atmel,at45", }, + { .compatible = "atmel,dataflash", }, + { } +}; + +U_BOOT_DRIVER(spi_dataflash) = { + .name = "spi_dataflash", + .id = UCLASS_SPI_FLASH, + .of_match = spi_dataflash_ids, + .probe = spi_dataflash_probe, + .priv_auto_alloc_size = sizeof(struct dataflash), + .ops = &spi_dataflash_ops, +};

dataflash doesn't require options, memory_map from spi.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index b2a56da..6a9dfef 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -584,6 +584,7 @@ static int spi_dataflash_probe(struct udevice *dev) int ret, status = 0;
spi_flash = dev_get_uclass_priv(dev); + spi_flash->spi = spi; spi_flash->dev = dev;
ret = spi_claim_bus(spi); @@ -664,11 +665,6 @@ static int spi_dataflash_probe(struct udevice *dev) } }
- /* Assign spi data */ - spi_flash->spi = spi; - spi_flash->memory_map = spi->memory_map; - spi_flash->dual_flash = spi->option; - spi_release_bus(spi);
return 0;

Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 6a9dfef..7c6c8d2 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -501,9 +501,10 @@ static struct flash_info dataflash_data[] = { { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, };
-static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) +static struct flash_info *jedec_probe(struct spi_slave *spi) { int tmp; + uint8_t id[5]; uint32_t jedec; struct flash_info *info; int status; @@ -517,6 +518,11 @@ static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) * That's not an error; only rev C and newer chips handle it, and * only Atmel sells these chips. */ + tmp = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id)); + if (tmp < 0) { + printf("dataflash: error %d reading JEDEC ID\n", tmp); + return ERR_PTR(tmp); + } if (id[0] != 0x1f) return NULL;
@@ -580,7 +586,6 @@ static int spi_dataflash_probe(struct udevice *dev) struct spi_slave *spi = dev_get_parent_priv(dev); struct spi_flash *spi_flash; struct flash_info *info; - u8 idcode[5]; int ret, status = 0;
spi_flash = dev_get_uclass_priv(dev); @@ -591,12 +596,6 @@ static int spi_dataflash_probe(struct udevice *dev) if (ret) return ret;
- ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SPI DataFlash: Failed to get idcodes\n"); - goto err_read_cmd; - } - /* * Try to detect dataflash by JEDEC ID. * If it succeeds we know we have either a C or D part. @@ -604,7 +603,9 @@ static int spi_dataflash_probe(struct udevice *dev) * Both support the security register, though with different * write procedures. */ - info = jedec_probe(spi, idcode); + info = jedec_probe(spi); + if (IS_ERR(info)) + return PTR_ERR(info); if (info != NULL) add_dataflash(dev, info->name, info->nr_pages, info->pagesize, info->pageoffset,

This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 127 ++++++++++++++++++------------------- 1 file changed, 61 insertions(+), 66 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 7c6c8d2..212aa69 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -586,15 +586,15 @@ static int spi_dataflash_probe(struct udevice *dev) struct spi_slave *spi = dev_get_parent_priv(dev); struct spi_flash *spi_flash; struct flash_info *info; - int ret, status = 0; + int status;
spi_flash = dev_get_uclass_priv(dev); spi_flash->spi = spi; spi_flash->dev = dev;
- ret = spi_claim_bus(spi); - if (ret) - return ret; + status = spi_claim_bus(spi); + if (status) + return status;
/* * Try to detect dataflash by JEDEC ID. @@ -605,74 +605,69 @@ static int spi_dataflash_probe(struct udevice *dev) */ info = jedec_probe(spi); if (IS_ERR(info)) - return PTR_ERR(info); - if (info != NULL) - add_dataflash(dev, info->name, info->nr_pages, - info->pagesize, info->pageoffset, - (info->flags & SUP_POW2PS) ? 'd' : 'c'); - else { - /* - * Older chips support only legacy commands, identifing - * capacity using bits in the status byte. - */ - status = dataflash_status(spi); - if (status <= 0 || status == 0xff) { - printf("SPI DataFlash: read status error %d\n", status); - if (status == 0 || status == 0xff) - status = -ENODEV; - goto err_read_cmd; - } - /* - * if there's a device there, assume it's dataflash. - * board setup should have set spi->max_speed_max to - * match f(car) for continuous reads, mode 0 or 3. - */ - switch (status & 0x3c) { - case 0x0c: /* 0 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB011B", - 512, 264, 9, 0); - break; - case 0x14: /* 0 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB021B", - 1024, 264, 9, 0); - break; - case 0x1c: /* 0 1 1 1 x x */ - status = add_dataflash(dev, "AT45DB041x", - 2048, 264, 9, 0); - break; - case 0x24: /* 1 0 0 1 x x */ - status = add_dataflash(dev, "AT45DB081B", - 4096, 264, 9, 0); - break; - case 0x2c: /* 1 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB161x", - 4096, 528, 10, 0); - break; - case 0x34: /* 1 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB321x", - 8192, 528, 10, 0); - break; - case 0x38: /* 1 1 1 x x x */ - case 0x3c: - status = add_dataflash(dev, "AT45DB642x", - 8192, 1056, 11, 0); - break; - /* obsolete AT45DB1282 not (yet?) supported */ - default: - dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); + goto err_jedec_probe; + if (info != NULL) { + status = add_dataflash(dev, info->name, info->nr_pages, + info->pagesize, info->pageoffset, + (info->flags & SUP_POW2PS) ? 'd' : 'c'); + if (status < 0) + goto err_status; + } + + /* + * Older chips support only legacy commands, identifing + * capacity using bits in the status byte. + */ + status = dataflash_status(spi); + if (status <= 0 || status == 0xff) { + printf("SPI DataFlash: read status error %d\n", status); + if (status == 0 || status == 0xff) status = -ENODEV; - goto err_read_cmd; - } + goto err_jedec_probe; }
- spi_release_bus(spi); + /* + * if there's a device there, assume it's dataflash. + * board setup should have set spi->max_speed_max to + * match f(car) for continuous reads, mode 0 or 3. + */ + switch (status & 0x3c) { + case 0x0c: /* 0 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB011B", 512, 264, 9, 0); + break; + case 0x14: /* 0 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB021B", 1024, 264, 9, 0); + break; + case 0x1c: /* 0 1 1 1 x x */ + status = add_dataflash(dev, "AT45DB041x", 2048, 264, 9, 0); + break; + case 0x24: /* 1 0 0 1 x x */ + status = add_dataflash(dev, "AT45DB081B", 4096, 264, 9, 0); + break; + case 0x2c: /* 1 0 1 1 x x */ + status = add_dataflash(dev, "AT45DB161x", 4096, 528, 10, 0); + break; + case 0x34: /* 1 1 0 1 x x */ + status = add_dataflash(dev, "AT45DB321x", 8192, 528, 10, 0); + break; + case 0x38: /* 1 1 1 x x x */ + case 0x3c: + status = add_dataflash(dev, "AT45DB642x", 8192, 1056, 11, 0); + break; + /* obsolete AT45DB1282 not (yet?) supported */ + default: + dev_info(&spi->dev, "unsupported device (%x)\n", + status & 0x3c); + status = -ENODEV; + goto err_status; + }
- return 0; + return status;
-err_read_cmd: +err_status: + spi_free_slave(spi); +err_jedec_probe: spi_release_bus(spi); - return status; }

This patch replace the dataflash driver from SPI_FLASH uclass to MTD UCLASS along with the support of mtd opertaions.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 216 ++++++++++++++++++------------------- 1 file changed, 108 insertions(+), 108 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 212aa69..722ab7e 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -2,6 +2,7 @@ * * Atmel DataFlash probing * + * Copyright (C) 2016 Jagan Teki jteki@openedev.com * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. * Haikun Wang (haikun.wang@freescale.com) * @@ -12,10 +13,10 @@ #include <errno.h> #include <fdtdec.h> #include <spi.h> -#include <spi_flash.h> #include <div64.h> #include <linux/err.h> #include <linux/math64.h> +#include <linux/mtd/mtd.h>
#include "sf_internal.h"
@@ -70,7 +71,11 @@
struct dataflash { uint8_t command[16]; + unsigned short page_offset; /* offset in flash address */ + unsigned int page_size; /* of bytes per page */ + + struct spi_slave *spi; };
/* @@ -117,31 +122,25 @@ static int dataflash_waitready(struct spi_slave *spi) /* * Erase pages of flash. */ -static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) +static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) { - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; - unsigned blocksize; + struct dataflash *priv = mtd->priv; + struct spi_slave *spi = priv->spi; + unsigned blocksize = priv->page_size << 3; uint8_t *command; uint32_t rem; int status;
- dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; - - blocksize = spi_flash->page_size << 3; - - memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; + memset(priv->command, 0 , sizeof(priv->command)); + command = priv->command;
- debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + debug("%s: erase addr=0x%llx len 0x%llx\n", mtd->name, + instr->addr, instr->len);
- div_u64_rem(len, spi_flash->page_size, &rem); + div_u64_rem(instr->len, priv->page_size, &rem); if (rem) return -EINVAL; - div_u64_rem(offset, spi_flash->page_size, &rem); + div_u64_rem(instr->addr, priv->page_size, &rem); if (rem) return -EINVAL;
@@ -151,16 +150,16 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) return status; }
- while (len > 0) { + while (instr->len > 0) { unsigned int pageaddr; int do_block; /* * Calculate flash page address; use block erase (for speed) if * we're at a block boundary and need to erase the whole block. */ - pageaddr = div_u64(offset, spi_flash->page_size); - do_block = (pageaddr & 0x7) == 0 && len >= blocksize; - pageaddr = pageaddr << dataflash->page_offset; + pageaddr = div_u64(instr->addr, priv->page_size); + do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize; + pageaddr = pageaddr << priv->page_offset;
command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; command[1] = (uint8_t)(pageaddr >> 16); @@ -168,67 +167,68 @@ static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) command[3] = 0;
debug("%s ERASE %s: (%x) %x %x %x [%d]\n", - dev->name, do_block ? "block" : "page", + mtd->name, do_block ? "block" : "page", command[0], command[1], command[2], command[3], pageaddr);
status = spi_flash_cmd_write(spi, command, 4, NULL, 0); if (status < 0) { - debug("%s: erase send command error!\n", dev->name); + debug("%s: erase send command error!\n", mtd->name); return -EIO; }
status = dataflash_waitready(spi); if (status < 0) { - debug("%s: erase waitready error!\n", dev->name); + debug("%s: erase waitready error!\n", mtd->name); return status; }
if (do_block) { - offset += blocksize; - len -= blocksize; + instr->addr += blocksize; + instr->len -= blocksize; } else { - offset += spi_flash->page_size; - len -= spi_flash->page_size; + instr->addr += priv->page_size; + instr->len -= priv->page_size; } }
spi_release_bus(spi);
+ /* Inform MTD subsystem that erase is complete */ + instr->state = MTD_ERASE_DONE; + mtd_erase_callback(instr); + return 0; }
/* * Read from the DataFlash device. - * offset : Start offset in flash device + * from : Start offset in flash device * len : Amount to read + * retlen : About of data actually read * buf : Buffer containing the data */ -static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, - void *buf) +static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, + size_t *retlen, u_char *buf) { - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; + struct dataflash *priv = mtd->priv; + struct spi_slave *spi = priv->spi; unsigned int addr; uint8_t *command; int status;
- dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; - - memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; + memset(priv->command, 0 , sizeof(priv->command)); + command = priv->command;
- debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); + debug("%s: read 0x%x..0x%x\n", mtd->name, (unsigned)from, + (unsigned)(from + len)); debug("READ: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
/* Calculate flash page/byte address */ - addr = (((unsigned)offset / spi_flash->page_size) - << dataflash->page_offset) - + ((unsigned)offset % spi_flash->page_size); + addr = (((unsigned)from / priv->page_size) + << priv->page_offset) + + ((unsigned)from % priv->page_size);
status = spi_claim_bus(spi); if (status) { @@ -248,6 +248,10 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
/* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ status = spi_flash_cmd_read(spi, command, 8, buf, len); + if (status >= 0) { + *retlen = len - 8; + status = 0; + }
spi_release_bus(spi);
@@ -256,35 +260,32 @@ static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len,
/* * Write to the DataFlash device. - * offset : Start offset in flash device + * to : Start offset in flash device * len : Amount to write + * retlen : Amount of data actually written * buf : Buffer containing the data */ -int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, - const void *buf) +static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, + size_t *retlen, const u_char *buf) { - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; + struct dataflash *priv = mtd->priv; + struct spi_slave *spi = priv->spi; uint8_t *command; - unsigned int pageaddr, addr, to, writelen; + unsigned int pageaddr, addr, offset, writelen; size_t remaining = len; u_char *writebuf = (u_char *)buf; int status = -EINVAL;
- dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; + memset(priv->command, 0 , sizeof(priv->command)); + command = priv->command;
- memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; + debug("%s: write 0x%x..0x%x\n", mtd->name, (unsigned)to, + (unsigned)(to + len));
- debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); - - pageaddr = ((unsigned)offset / spi_flash->page_size); - to = ((unsigned)offset % spi_flash->page_size); - if (to + len > spi_flash->page_size) - writelen = spi_flash->page_size - to; + pageaddr = ((unsigned)to / priv->page_size); + offset = ((unsigned)to % priv->page_size); + if (offset + len > priv->page_size) + writelen = priv->page_size - offset; else writelen = len;
@@ -295,7 +296,7 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, }
while (remaining > 0) { - debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); + debug("write @ %d:%d len=%d\n", pageaddr, offset, writelen);
/* * REVISIT: @@ -314,10 +315,10 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, * support boot-from-DataFlash.) */
- addr = pageaddr << dataflash->page_offset; + addr = pageaddr << priv->page_offset;
/* (1) Maybe transfer partial page to Buffer1 */ - if (writelen != spi_flash->page_size) { + if (writelen != priv->page_size) { command[0] = OP_TRANSFER_BUF1; command[1] = (addr & 0x00FF0000) >> 16; command[2] = (addr & 0x0000FF00) >> 8; @@ -329,20 +330,20 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, status = spi_flash_cmd_write(spi, command, 4, NULL, 0); if (status < 0) { debug("%s: write(<pagesize) command error!\n", - dev->name); + mtd->name); return -EIO; }
status = dataflash_waitready(spi); if (status < 0) { debug("%s: write(<pagesize) waitready error!\n", - dev->name); + mtd->name); return status; } }
/* (2) Program full page via Buffer1 */ - addr += to; + addr += offset; command[0] = OP_PROGRAM_VIA_BUF1; command[1] = (addr & 0x00FF0000) >> 16; command[2] = (addr & 0x0000FF00) >> 8; @@ -354,19 +355,19 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, status = spi_flash_cmd_write(spi, command, 4, writebuf, writelen); if (status < 0) { - debug("%s: write send command error!\n", dev->name); + debug("%s: write send command error!\n", mtd->name); return -EIO; }
status = dataflash_waitready(spi); if (status < 0) { - debug("%s: write waitready error!\n", dev->name); + debug("%s: write waitready error!\n", mtd->name); return status; }
#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY /* (3) Compare to Buffer1 */ - addr = pageaddr << dataflash->page_offset; + addr = pageaddr << priv->page_offset; command[0] = OP_COMPARE_BUF1; command[1] = (addr & 0x00FF0000) >> 16; command[2] = (addr & 0x0000FF00) >> 8; @@ -379,7 +380,7 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, 4, writebuf, writelen); if (status < 0) { debug("%s: write(compare) send command error!\n", - dev->name); + mtd->name); return -EIO; }
@@ -399,11 +400,12 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, #endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ remaining = remaining - writelen; pageaddr++; - to = 0; + offset = 0; writebuf += writelen; + *retlen += writelen;
- if (remaining > spi_flash->page_size) - writelen = spi_flash->page_size; + if (remaining > priv->page_size) + writelen = priv->page_size; else writelen = remaining; } @@ -414,31 +416,41 @@ int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, }
static int add_dataflash(struct udevice *dev, char *name, int nr_pages, - int pagesize, int pageoffset, char revision) + int pagesize, int pageoffset, char revision) { - struct spi_flash *spi_flash; - struct dataflash *dataflash; - - dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - - dataflash->page_offset = pageoffset; + struct dataflash *priv = dev_get_priv(dev); + struct mtd_info *mtd = dev_get_uclass_priv(dev); + int ret;
- spi_flash->name = name; - spi_flash->page_size = pagesize; - spi_flash->size = nr_pages * pagesize; - spi_flash->erase_size = pagesize; + priv->spi = dev_get_parent_priv(dev); + priv->page_size = pagesize; + priv->page_offset = pageoffset; + + mtd->name = name; + mtd->size = nr_pages * pagesize; + mtd->erasesize = pagesize; + mtd->writesize = pagesize; + mtd->type = MTD_DATAFLASH; + mtd->flags = MTD_WRITEABLE; + mtd->_erase = dataflash_erase; + mtd->_read = dataflash_read; + mtd->_write = dataflash_write; + mtd->priv = priv;
#ifndef CONFIG_SPL_BUILD - printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); - print_size(spi_flash->page_size, ", erase size "); - print_size(spi_flash->erase_size, ", total "); - print_size(spi_flash->size, ""); + printf("SPI DataFlash: Detected %s with page size ", mtd->name); + print_size(priv->page_size, ", erase size "); + print_size(mtd->erasesize, ", total "); + print_size(mtd->size, ""); printf(", revision %c", revision); puts("\n"); #endif
- return 0; + ret = add_mtd_device(mtd); + if (ret) + return ret; + + return ret; }
struct flash_info { @@ -583,15 +595,10 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) */ static int spi_dataflash_probe(struct udevice *dev) { - struct spi_slave *spi = dev_get_parent_priv(dev); - struct spi_flash *spi_flash; - struct flash_info *info; + struct spi_slave *spi = dev_get_parent_priv(dev); + struct flash_info *info; int status;
- spi_flash = dev_get_uclass_priv(dev); - spi_flash->spi = spi; - spi_flash->dev = dev; - status = spi_claim_bus(spi); if (status) return status; @@ -657,7 +664,7 @@ static int spi_dataflash_probe(struct udevice *dev) /* obsolete AT45DB1282 not (yet?) supported */ default: dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); + status & 0x3c); status = -ENODEV; goto err_status; } @@ -671,12 +678,6 @@ err_jedec_probe: return status; }
-static const struct dm_spi_flash_ops spi_dataflash_ops = { - .read = spi_dataflash_read, - .write = spi_dataflash_write, - .erase = spi_dataflash_erase, -}; - static const struct udevice_id spi_dataflash_ids[] = { { .compatible = "atmel,at45", }, { .compatible = "atmel,dataflash", }, @@ -685,9 +686,8 @@ static const struct udevice_id spi_dataflash_ids[] = {
U_BOOT_DRIVER(spi_dataflash) = { .name = "spi_dataflash", - .id = UCLASS_SPI_FLASH, + .id = UCLASS_MTD, .of_match = spi_dataflash_ids, .probe = spi_dataflash_probe, .priv_auto_alloc_size = sizeof(struct dataflash), - .ops = &spi_dataflash_ops, };

Use spi_write_then_read call from spi layer for dataflash write and then read calling.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 722ab7e..525af0a 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -84,12 +84,12 @@ struct dataflash { static inline int dataflash_status(struct spi_slave *spi) { int ret; - u8 status; + u8 cmd = OP_READ_STATUS, status; /* * NOTE: at45db321c over 25 MHz wants to write * a dummy byte after the opcode... */ - ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1); + ret = spi_write_then_read(spi, &cmd, 1, NULL, &status, 1); return ret ? -EIO : status; }
@@ -171,7 +171,7 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) command[0], command[1], command[2], command[3], pageaddr);
- status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + status = spi_write_then_read(spi, command, 4, NULL, NULL, 0); if (status < 0) { debug("%s: erase send command error!\n", mtd->name); return -EIO; @@ -247,7 +247,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, command[3] = (uint8_t)(addr >> 0);
/* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ - status = spi_flash_cmd_read(spi, command, 8, buf, len); + status = spi_write_then_read(spi, command, 8, NULL, buf, len); if (status >= 0) { *retlen = len - 8; status = 0; @@ -327,7 +327,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, debug("TRANSFER: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command, 4, NULL, 0); + status = spi_write_then_read(spi, command, 4, NULL, NULL, 0); if (status < 0) { debug("%s: write(<pagesize) command error!\n", mtd->name); @@ -352,8 +352,8 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, debug("PROGRAM: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command, - 4, writebuf, writelen); + status = spi_write_then_read(spi, command, 4, + writebuf, NULL, writelen); if (status < 0) { debug("%s: write send command error!\n", mtd->name); return -EIO; @@ -376,8 +376,8 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, debug("COMPARE: (%x) %x %x %x\n", command[0], command[1], command[2], command[3]);
- status = spi_flash_cmd_write(spi, command, - 4, writebuf, writelen); + status = spi_write_then_read(spi, command, 4, + writebuf, NULL, writelen); if (status < 0) { debug("%s: write(compare) send command error!\n", mtd->name); @@ -519,6 +519,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) uint8_t id[5]; uint32_t jedec; struct flash_info *info; + u8 cmd = CMD_READ_ID; int status;
/* @@ -530,7 +531,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) * That's not an error; only rev C and newer chips handle it, and * only Atmel sells these chips. */ - tmp = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id)); + tmp = spi_write_then_read(spi, &cmd, 1, NULL, id, sizeof(id)); if (tmp < 0) { printf("dataflash: error %d reading JEDEC ID\n", tmp); return ERR_PTR(tmp);

Drop using sf_internal.h and get the RDID from spi-nor.h
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 525af0a..9943560 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -17,8 +17,7 @@ #include <linux/err.h> #include <linux/math64.h> #include <linux/mtd/mtd.h> - -#include "sf_internal.h" +#include <linux/mtd/spi-nor.h>
/* reads can bypass the buffers */ #define OP_READ_CONTINUOUS 0xE8 @@ -519,7 +518,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) uint8_t id[5]; uint32_t jedec; struct flash_info *info; - u8 cmd = CMD_READ_ID; + u8 cmd = SNOR_OP_RDID; int status;
/*

- rename spi_dataflash to mtd_dataflash - fix single line comments - remove unneeded spaces - ascending order of include files - rename spi_dataflash_* to dataflash_* - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sf_dataflash.c | 51 ++++++++++++++++---------------------- 1 file changed, 22 insertions(+), 29 deletions(-)
diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/sf_dataflash.c index 9943560..2a5f5ae 100644 --- a/drivers/mtd/spi-nor/sf_dataflash.c +++ b/drivers/mtd/spi-nor/sf_dataflash.c @@ -1,5 +1,4 @@ /* - * * Atmel DataFlash probing * * Copyright (C) 2016 Jagan Teki jteki@openedev.com @@ -7,8 +6,10 @@ * Haikun Wang (haikun.wang@freescale.com) * * SPDX-License-Identifier: GPL-2.0+ -*/ + */ + #include <common.h> +#include <div64.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> @@ -67,7 +68,6 @@ #define OP_WRITE_SECURITY_REVC 0x9A #define OP_WRITE_SECURITY 0x9B /* revision D */
- struct dataflash { uint8_t command[16];
@@ -77,9 +77,7 @@ struct dataflash { struct spi_slave *spi; };
-/* - * Return the status of the DataFlash device. - */ +/* Return the status of the DataFlash device */ static inline int dataflash_status(struct spi_slave *spi) { int ret; @@ -118,9 +116,7 @@ static int dataflash_waitready(struct spi_slave *spi) return -ETIME; }
-/* - * Erase pages of flash. - */ +/* Erase pages of flash */ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) { struct dataflash *priv = mtd->priv; @@ -145,7 +141,7 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -231,7 +227,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -290,7 +286,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
status = spi_claim_bus(spi); if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); + debug("dataflash: unable to claim SPI bus\n"); return status; }
@@ -387,7 +383,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
/* Check result of the compare operation */ if (status & (1 << 6)) { - printf("SPI DataFlash: write compare page %u, err %d\n", + printf("dataflash: write compare page %u, err %d\n", pageaddr, status); remaining = 0; status = -EIO; @@ -551,7 +547,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) if (info->flags & SUP_POW2PS) { status = dataflash_status(spi); if (status < 0) { - debug("SPI DataFlash: status error %d\n", + debug("dataflash: status error %d\n", status); return NULL; } @@ -573,10 +569,8 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) * size (it might be binary) even when we can tell which density * class is involved (legacy chip id scheme). */ - printf("SPI DataFlash: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - id[0], jedec, id[3] << 8 | id[4]); - return NULL; + printf("dataflash: JEDEC id %06x not handled\n", jedec); + return ERR_PTR(-ENODEV); }
/* @@ -593,7 +587,7 @@ static struct flash_info *jedec_probe(struct spi_slave *spi) * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 */ -static int spi_dataflash_probe(struct udevice *dev) +static int dataflash_probe(struct udevice *dev) { struct spi_slave *spi = dev_get_parent_priv(dev); struct flash_info *info; @@ -621,19 +615,19 @@ static int spi_dataflash_probe(struct udevice *dev) goto err_status; }
- /* + /* * Older chips support only legacy commands, identifing * capacity using bits in the status byte. */ status = dataflash_status(spi); if (status <= 0 || status == 0xff) { - printf("SPI DataFlash: read status error %d\n", status); + printf("dataflash: read status error %d\n", status); if (status == 0 || status == 0xff) status = -ENODEV; goto err_jedec_probe; }
- /* + /* * if there's a device there, assume it's dataflash. * board setup should have set spi->max_speed_max to * match f(car) for continuous reads, mode 0 or 3. @@ -663,8 +657,7 @@ static int spi_dataflash_probe(struct udevice *dev) break; /* obsolete AT45DB1282 not (yet?) supported */ default: - dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); + printf("dataflash: unsupported device (%x)\n", status & 0x3c); status = -ENODEV; goto err_status; } @@ -678,16 +671,16 @@ err_jedec_probe: return status; }
-static const struct udevice_id spi_dataflash_ids[] = { +static const struct udevice_id dataflash_ids[] = { { .compatible = "atmel,at45", }, { .compatible = "atmel,dataflash", }, { } };
-U_BOOT_DRIVER(spi_dataflash) = { - .name = "spi_dataflash", +U_BOOT_DRIVER(mtd_dataflash) = { + .name = "mtd_dataflash", .id = UCLASS_MTD, - .of_match = spi_dataflash_ids, - .probe = spi_dataflash_probe, + .of_match = dataflash_ids, + .probe = dataflash_probe, .priv_auto_alloc_size = sizeof(struct dataflash), };

Since dataflash driver is using mtd_info core functionalities this patch renames file and config name similar way as Linux.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/{sf_dataflash.c => mtd_dataflash.c} | 0 2 files changed, 1 insertion(+) rename drivers/mtd/spi-nor/{sf_dataflash.c => mtd_dataflash.c} (100%)
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 4d27811..0f5e3cc 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_DM_SPI_NOR) += spi-nor-probe.o endif
obj-$(CONFIG_MTD_M25P80) += m25p80.o +obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o diff --git a/drivers/mtd/spi-nor/sf_dataflash.c b/drivers/mtd/spi-nor/mtd_dataflash.c similarity index 100% rename from drivers/mtd/spi-nor/sf_dataflash.c rename to drivers/mtd/spi-nor/mtd_dataflash.c

Added kconfig entry for MTD_DATAFLASH
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 219306f..15e8432 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -97,3 +97,18 @@ config SPI_FLASH_WINBOND Add support for various Winbond SPI flash chips (W25xxx)
endif # MTD_SPI_NOR + +config MTD_DATAFLASH + bool "AT45xxx DataFlash support" + depends on MTD + help + Enable the access for SPI-flash-based AT45xxx DataFlash chips. + DataFlash is a kind of SPI flash. Most AT45 chips have two buffers + in each chip, which may be used for double buffered I/O; but this + driver doesn't (yet) use these for any kind of i/o overlap or prefetching. + + Sometimes DataFlash is packaged in MMC-format cards, although the + MMC stack can't (yet?) distinguish between MMC and DataFlash + protocols during enumeration. + + If unsure, say N

mtd_dataflash driver almost similar to Linux, so rename the CONFIG_SPI_DATAFLASH_WRITE_VERIFY => CONFIG_MTD_DATAFLASH_WRITE_VERIFY
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/mtd_dataflash.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/spi-nor/mtd_dataflash.c b/drivers/mtd/spi-nor/mtd_dataflash.c index 2a5f5ae..fae862e 100644 --- a/drivers/mtd/spi-nor/mtd_dataflash.c +++ b/drivers/mtd/spi-nor/mtd_dataflash.c @@ -360,7 +360,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, return status; }
-#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY +#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY /* (3) Compare to Buffer1 */ addr = pageaddr << priv->page_offset; command[0] = OP_COMPARE_BUF1; @@ -392,7 +392,7 @@ static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, status = 0; }
-#endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ +#endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */ remaining = remaining - writelen; pageaddr++; offset = 0;

Added kconfig entry for MTD_DATAFLASH_WRITE_VERIFY
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Cc: Haikun Wang haikun.wang@freescale.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 15e8432..f039a9d 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -112,3 +112,13 @@ config MTD_DATAFLASH protocols during enumeration.
If unsure, say N + +config MTD_DATAFLASH_WRITE_VERIFY + bool "Verify DataFlash page writes" + depends on MTD_DATAFLASH + help + This adds an extra check when data is written to the flash. + It may help if you are verifying chip setup (timings etc) on + your board. There is a rare possibility that even though the + device thinks the write was successful, a bit could have been + flipped accidentally due to device wear or something else.

Dropped DM_SPI_FLASH and SPI_FLASH_DATAFLASH
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/ls1021aqds.h | 2 -- 1 file changed, 2 deletions(-)
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index f6efc55..c783eb9 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -421,8 +421,6 @@ unsigned long get_board_ddr_clk(void); /* DM SPI */ #if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) #define CONFIG_CMD_SF -#define CONFIG_DM_SPI_FLASH -#define CONFIG_SPI_FLASH_DATAFLASH #endif #endif

Enable SPI-NOR with MTD uclass.
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/ls1021aqds_qspi_defconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 0f740fd..1638b19 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -7,7 +7,9 @@ CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y

Enable CONFIG_MTD_DATAFLASH
Cc: Bin Meng bmeng.cn@gmail.com Cc: Simon Glass sjg@chromium.org Cc: York Sun york.sun@nxp.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/ls1021aqds_qspi_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index 1638b19..a3cade5 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -10,6 +10,7 @@ CONFIG_DM=y CONFIG_MTD=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y +CONFIG_MTD_DATAFLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y

Copy sandbox.c from drivers/mtd/spi to spi-nor, more changes will added on future patches.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/sandbox.c | 697 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 698 insertions(+) create mode 100644 drivers/mtd/spi-nor/sandbox.c
diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index 0f5e3cc..d6edf1a 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -17,3 +17,4 @@ endif
obj-$(CONFIG_MTD_M25P80) += m25p80.o obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o +obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi-nor/sandbox.c b/drivers/mtd/spi-nor/sandbox.c new file mode 100644 index 0000000..895604d --- /dev/null +++ b/drivers/mtd/spi-nor/sandbox.c @@ -0,0 +1,697 @@ +/* + * Simulate a SPI flash + * + * Copyright (c) 2011-2013 The Chromium OS Authors. + * See file CREDITS for list of people who contributed to this + * project. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <dm.h> +#include <malloc.h> +#include <spi.h> +#include <os.h> + +#include <spi_flash.h> +#include "sf_internal.h" + +#include <asm/getopt.h> +#include <asm/spi.h> +#include <asm/state.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <dm/uclass-internal.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * The different states that our SPI flash transitions between. + * We need to keep track of this across multiple xfer calls since + * the SPI bus could possibly call down into us multiple times. + */ +enum sandbox_sf_state { + SF_CMD, /* default state -- we're awaiting a command */ + SF_ID, /* read the flash's (jedec) ID code */ + SF_ADDR, /* processing the offset in the flash to read/etc... */ + SF_READ, /* reading data from the flash */ + SF_WRITE, /* writing data to the flash, i.e. page programming */ + SF_ERASE, /* erase the flash */ + SF_READ_STATUS, /* read the flash's status register */ + SF_READ_STATUS1, /* read the flash's status register upper 8 bits*/ + SF_WRITE_STATUS, /* write the flash's status register */ +}; + +static const char *sandbox_sf_state_name(enum sandbox_sf_state state) +{ + static const char * const states[] = { + "CMD", "ID", "ADDR", "READ", "WRITE", "ERASE", "READ_STATUS", + "READ_STATUS1", "WRITE_STATUS", + }; + return states[state]; +} + +/* Bits for the status register */ +#define STAT_WIP (1 << 0) +#define STAT_WEL (1 << 1) + +/* Assume all SPI flashes have 3 byte addresses since they do atm */ +#define SF_ADDR_LEN 3 + +#define IDCODE_LEN 3 + +/* Used to quickly bulk erase backing store */ +static u8 sandbox_sf_0xff[0x1000]; + +/* Internal state data for each SPI flash */ +struct sandbox_spi_flash { + unsigned int cs; /* Chip select we are attached to */ + /* + * As we receive data over the SPI bus, our flash transitions + * between states. For example, we start off in the SF_CMD + * state where the first byte tells us what operation to perform + * (such as read or write the flash). But the operation itself + * can go through a few states such as first reading in the + * offset in the flash to perform the requested operation. + * Thus "state" stores the exact state that our machine is in + * while "cmd" stores the overall command we're processing. + */ + enum sandbox_sf_state state; + uint cmd; + /* Erase size of current erase command */ + uint erase_size; + /* Current position in the flash; used when reading/writing/etc... */ + uint off; + /* How many address bytes we've consumed */ + uint addr_bytes, pad_addr_bytes; + /* The current flash status (see STAT_XXX defines above) */ + u16 status; + /* Data describing the flash we're emulating */ + const struct spi_flash_params *data; + /* The file on disk to serv up data from */ + int fd; +}; + +struct sandbox_spi_flash_plat_data { + const char *filename; + const char *device_name; + int bus; + int cs; +}; + +/** + * This is a very strange probe function. If it has platform data (which may + * have come from the device tree) then this function gets the filename and + * device type from there. Failing that it looks at the command line + * parameter. + */ +static int sandbox_sf_probe(struct udevice *dev) +{ + /* spec = idcode:file */ + struct sandbox_spi_flash *sbsf = dev_get_priv(dev); + const char *file; + size_t len, idname_len; + const struct spi_flash_params *data; + struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); + struct sandbox_state *state = state_get_current(); + struct udevice *bus = dev->parent; + const char *spec = NULL; + int ret = 0; + int cs = -1; + int i; + + debug("%s: bus %d, looking for emul=%p: ", __func__, bus->seq, dev); + if (bus->seq >= 0 && bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) { + for (i = 0; i < CONFIG_SANDBOX_SPI_MAX_CS; i++) { + if (state->spi[bus->seq][i].emul == dev) + cs = i; + } + } + if (cs == -1) { + printf("Error: Unknown chip select for device '%s'\n", + dev->name); + return -EINVAL; + } + debug("found at cs %d\n", cs); + + if (!pdata->filename) { + struct sandbox_state *state = state_get_current(); + + assert(bus->seq != -1); + if (bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) + spec = state->spi[bus->seq][cs].spec; + if (!spec) { + ret = -ENOENT; + goto error; + } + + file = strchr(spec, ':'); + if (!file) { + printf("sandbox_sf: unable to parse file\n"); + ret = -EINVAL; + goto error; + } + idname_len = file - spec; + pdata->filename = file + 1; + pdata->device_name = spec; + ++file; + } else { + spec = strchr(pdata->device_name, ','); + if (spec) + spec++; + else + spec = pdata->device_name; + idname_len = strlen(spec); + } + debug("%s: device='%s'\n", __func__, spec); + + for (data = spi_flash_params_table; data->name; data++) { + len = strlen(data->name); + if (idname_len != len) + continue; + if (!strncasecmp(spec, data->name, len)) + break; + } + if (!data->name) { + printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len, + spec); + ret = -EINVAL; + goto error; + } + + if (sandbox_sf_0xff[0] == 0x00) + memset(sandbox_sf_0xff, 0xff, sizeof(sandbox_sf_0xff)); + + sbsf->fd = os_open(pdata->filename, 02); + if (sbsf->fd == -1) { + free(sbsf); + printf("sandbox_sf: unable to open file '%s'\n", + pdata->filename); + ret = -EIO; + goto error; + } + + sbsf->data = data; + sbsf->cs = cs; + + return 0; + + error: + debug("%s: Got error %d\n", __func__, ret); + return ret; +} + +static int sandbox_sf_remove(struct udevice *dev) +{ + struct sandbox_spi_flash *sbsf = dev_get_priv(dev); + + os_close(sbsf->fd); + + return 0; +} + +static void sandbox_sf_cs_activate(struct udevice *dev) +{ + struct sandbox_spi_flash *sbsf = dev_get_priv(dev); + + debug("sandbox_sf: CS activated; state is fresh!\n"); + + /* CS is asserted, so reset state */ + sbsf->off = 0; + sbsf->addr_bytes = 0; + sbsf->pad_addr_bytes = 0; + sbsf->state = SF_CMD; + sbsf->cmd = SF_CMD; +} + +static void sandbox_sf_cs_deactivate(struct udevice *dev) +{ + debug("sandbox_sf: CS deactivated; cmd done processing!\n"); +} + +/* + * There are times when the data lines are allowed to tristate. What + * is actually sensed on the line depends on the hardware. It could + * always be 0xFF/0x00 (if there are pull ups/downs), or things could + * float and so we'd get garbage back. This func encapsulates that + * scenario so we can worry about the details here. + */ +static void sandbox_spi_tristate(u8 *buf, uint len) +{ + /* XXX: make this into a user config option ? */ + memset(buf, 0xff, len); +} + +/* Figure out what command this stream is telling us to do */ +static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, + u8 *tx) +{ + enum sandbox_sf_state oldstate = sbsf->state; + + /* We need to output a byte for the cmd byte we just ate */ + if (tx) + sandbox_spi_tristate(tx, 1); + + sbsf->cmd = rx[0]; + switch (sbsf->cmd) { + case CMD_READ_ID: + sbsf->state = SF_ID; + sbsf->cmd = SF_ID; + break; + case CMD_READ_ARRAY_FAST: + sbsf->pad_addr_bytes = 1; + case CMD_READ_ARRAY_SLOW: + case CMD_PAGE_PROGRAM: + sbsf->state = SF_ADDR; + break; + case CMD_WRITE_DISABLE: + debug(" write disabled\n"); + sbsf->status &= ~STAT_WEL; + break; + case CMD_READ_STATUS: + sbsf->state = SF_READ_STATUS; + break; + case CMD_READ_STATUS1: + sbsf->state = SF_READ_STATUS1; + break; + case CMD_WRITE_ENABLE: + debug(" write enabled\n"); + sbsf->status |= STAT_WEL; + break; + case CMD_WRITE_STATUS: + sbsf->state = SF_WRITE_STATUS; + break; + default: { + int flags = sbsf->data->flags; + + /* we only support erase here */ + if (sbsf->cmd == CMD_ERASE_CHIP) { + sbsf->erase_size = sbsf->data->sector_size * + sbsf->data->nr_sectors; + } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { + sbsf->erase_size = 4 << 10; + } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) { + sbsf->erase_size = 32 << 10; + } else if (sbsf->cmd == CMD_ERASE_64K && + !(flags & (SECT_4K | SECT_32K))) { + sbsf->erase_size = 64 << 10; + } else { + debug(" cmd unknown: %#x\n", sbsf->cmd); + return -EIO; + } + sbsf->state = SF_ADDR; + break; + } + } + + if (oldstate != sbsf->state) + debug(" cmd: transition to %s state\n", + sandbox_sf_state_name(sbsf->state)); + + return 0; +} + +int sandbox_erase_part(struct sandbox_spi_flash *sbsf, int size) +{ + int todo; + int ret; + + while (size > 0) { + todo = min(size, (int)sizeof(sandbox_sf_0xff)); + ret = os_write(sbsf->fd, sandbox_sf_0xff, todo); + if (ret != todo) + return ret; + size -= todo; + } + + return 0; +} + +static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, + const void *rxp, void *txp, unsigned long flags) +{ + struct sandbox_spi_flash *sbsf = dev_get_priv(dev); + const uint8_t *rx = rxp; + uint8_t *tx = txp; + uint cnt, pos = 0; + int bytes = bitlen / 8; + int ret; + + debug("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state, + sandbox_sf_state_name(sbsf->state), bytes); + + if ((flags & SPI_XFER_BEGIN)) + sandbox_sf_cs_activate(dev); + + if (sbsf->state == SF_CMD) { + /* Figure out the initial state */ + ret = sandbox_sf_process_cmd(sbsf, rx, tx); + if (ret) + return ret; + ++pos; + } + + /* Process the remaining data */ + while (pos < bytes) { + switch (sbsf->state) { + case SF_ID: { + u8 id; + + debug(" id: off:%u tx:", sbsf->off); + if (sbsf->off < IDCODE_LEN) { + /* Extract correct byte from ID 0x00aabbcc */ + id = sbsf->data->jedec >> + (8 * (IDCODE_LEN - 1 - sbsf->off)); + } else { + id = 0; + } + debug("%d %02x\n", sbsf->off, id); + tx[pos++] = id; + ++sbsf->off; + break; + } + case SF_ADDR: + debug(" addr: bytes:%u rx:%02x ", sbsf->addr_bytes, + rx[pos]); + + if (sbsf->addr_bytes++ < SF_ADDR_LEN) + sbsf->off = (sbsf->off << 8) | rx[pos]; + debug("addr:%06x\n", sbsf->off); + + if (tx) + sandbox_spi_tristate(&tx[pos], 1); + pos++; + + /* See if we're done processing */ + if (sbsf->addr_bytes < + SF_ADDR_LEN + sbsf->pad_addr_bytes) + break; + + /* Next state! */ + if (os_lseek(sbsf->fd, sbsf->off, OS_SEEK_SET) < 0) { + puts("sandbox_sf: os_lseek() failed"); + return -EIO; + } + switch (sbsf->cmd) { + case CMD_READ_ARRAY_FAST: + case CMD_READ_ARRAY_SLOW: + sbsf->state = SF_READ; + break; + case CMD_PAGE_PROGRAM: + sbsf->state = SF_WRITE; + break; + default: + /* assume erase state ... */ + sbsf->state = SF_ERASE; + goto case_sf_erase; + } + debug(" cmd: transition to %s state\n", + sandbox_sf_state_name(sbsf->state)); + break; + case SF_READ: + /* + * XXX: need to handle exotic behavior: + * - reading past end of device + */ + + cnt = bytes - pos; + debug(" tx: read(%u)\n", cnt); + assert(tx); + ret = os_read(sbsf->fd, tx + pos, cnt); + if (ret < 0) { + puts("sandbox_sf: os_read() failed\n"); + return -EIO; + } + pos += ret; + break; + case SF_READ_STATUS: + debug(" read status: %#x\n", sbsf->status); + cnt = bytes - pos; + memset(tx + pos, sbsf->status, cnt); + pos += cnt; + break; + case SF_READ_STATUS1: + debug(" read status: %#x\n", sbsf->status); + cnt = bytes - pos; + memset(tx + pos, sbsf->status >> 8, cnt); + pos += cnt; + break; + case SF_WRITE_STATUS: + debug(" write status: %#x (ignored)\n", rx[pos]); + pos = bytes; + break; + case SF_WRITE: + /* + * XXX: need to handle exotic behavior: + * - unaligned addresses + * - more than a page (256) worth of data + * - reading past end of device + */ + if (!(sbsf->status & STAT_WEL)) { + puts("sandbox_sf: write enable not set before write\n"); + goto done; + } + + cnt = bytes - pos; + debug(" rx: write(%u)\n", cnt); + if (tx) + sandbox_spi_tristate(&tx[pos], cnt); + ret = os_write(sbsf->fd, rx + pos, cnt); + if (ret < 0) { + puts("sandbox_spi: os_write() failed\n"); + return -EIO; + } + pos += ret; + sbsf->status &= ~STAT_WEL; + break; + case SF_ERASE: + case_sf_erase: { + if (!(sbsf->status & STAT_WEL)) { + puts("sandbox_sf: write enable not set before erase\n"); + goto done; + } + + /* verify address is aligned */ + if (sbsf->off & (sbsf->erase_size - 1)) { + debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", + sbsf->cmd, sbsf->erase_size, + sbsf->off); + sbsf->status &= ~STAT_WEL; + goto done; + } + + debug(" sector erase addr: %u, size: %u\n", sbsf->off, + sbsf->erase_size); + + cnt = bytes - pos; + if (tx) + sandbox_spi_tristate(&tx[pos], cnt); + pos += cnt; + + /* + * TODO(vapier@gentoo.org): latch WIP in status, and + * delay before clearing it ? + */ + ret = sandbox_erase_part(sbsf, sbsf->erase_size); + sbsf->status &= ~STAT_WEL; + if (ret) { + debug("sandbox_sf: Erase failed\n"); + goto done; + } + goto done; + } + default: + debug(" ??? no idea what to do ???\n"); + goto done; + } + } + + done: + if (flags & SPI_XFER_END) + sandbox_sf_cs_deactivate(dev); + return pos == bytes ? 0 : -EIO; +} + +int sandbox_sf_ofdata_to_platdata(struct udevice *dev) +{ + struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); + const void *blob = gd->fdt_blob; + int node = dev->of_offset; + + pdata->filename = fdt_getprop(blob, node, "sandbox,filename", NULL); + pdata->device_name = fdt_getprop(blob, node, "compatible", NULL); + if (!pdata->filename || !pdata->device_name) { + debug("%s: Missing properties, filename=%s, device_name=%s\n", + __func__, pdata->filename, pdata->device_name); + return -EINVAL; + } + + return 0; +} + +static const struct dm_spi_emul_ops sandbox_sf_emul_ops = { + .xfer = sandbox_sf_xfer, +}; + +#ifdef CONFIG_SPI_FLASH +static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state, + const char *arg) +{ + unsigned long bus, cs; + const char *spec = sandbox_spi_parse_spec(arg, &bus, &cs); + + if (!spec) + return 1; + + /* + * It is safe to not make a copy of 'spec' because it comes from the + * command line. + * + * TODO(sjg@chromium.org): It would be nice if we could parse the + * spec here, but the problem is that no U-Boot init has been done + * yet. Perhaps we can figure something out. + */ + state->spi[bus][cs].spec = spec; + return 0; +} +SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>"); + +int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs, + struct udevice *bus, int of_offset, const char *spec) +{ + struct udevice *emul; + char name[20], *str; + struct driver *drv; + int ret; + + /* now the emulator */ + strncpy(name, spec, sizeof(name) - 6); + name[sizeof(name) - 6] = '\0'; + strcat(name, "-emul"); + str = strdup(name); + if (!str) + return -ENOMEM; + drv = lists_driver_lookup_name("sandbox_sf_emul"); + if (!drv) { + puts("Cannot find sandbox_sf_emul driver\n"); + return -ENOENT; + } + ret = device_bind(bus, drv, str, NULL, of_offset, &emul); + if (ret) { + printf("Cannot create emul device for spec '%s' (err=%d)\n", + spec, ret); + return ret; + } + state->spi[busnum][cs].emul = emul; + + return 0; +} + +void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs) +{ + struct udevice *dev; + + dev = state->spi[busnum][cs].emul; + device_remove(dev); + device_unbind(dev); + state->spi[busnum][cs].emul = NULL; +} + +static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum, + int cs, const char *spec) +{ + struct udevice *bus, *slave; + int ret; + + ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, true, &bus); + if (ret) { + printf("Invalid bus %d for spec '%s' (err=%d)\n", busnum, + spec, ret); + return ret; + } + ret = spi_find_chip_select(bus, cs, &slave); + if (!ret) { + printf("Chip select %d already exists for spec '%s'\n", cs, + spec); + return -EEXIST; + } + + ret = device_bind_driver(bus, "spi_flash_std", spec, &slave); + if (ret) + return ret; + + return sandbox_sf_bind_emul(state, busnum, cs, bus, -1, spec); +} + +int sandbox_spi_get_emul(struct sandbox_state *state, + struct udevice *bus, struct udevice *slave, + struct udevice **emulp) +{ + struct sandbox_spi_info *info; + int busnum = bus->seq; + int cs = spi_chip_select(slave); + int ret; + + info = &state->spi[busnum][cs]; + if (!info->emul) { + /* Use the same device tree node as the SPI flash device */ + debug("%s: busnum=%u, cs=%u: binding SPI flash emulation: ", + __func__, busnum, cs); + ret = sandbox_sf_bind_emul(state, busnum, cs, bus, + slave->of_offset, slave->name); + if (ret) { + debug("failed (err=%d)\n", ret); + return ret; + } + debug("OK\n"); + } + *emulp = info->emul; + + return 0; +} + +int dm_scan_other(bool pre_reloc_only) +{ + struct sandbox_state *state = state_get_current(); + int busnum, cs; + + if (pre_reloc_only) + return 0; + for (busnum = 0; busnum < CONFIG_SANDBOX_SPI_MAX_BUS; busnum++) { + for (cs = 0; cs < CONFIG_SANDBOX_SPI_MAX_CS; cs++) { + const char *spec = state->spi[busnum][cs].spec; + int ret; + + if (spec) { + ret = sandbox_sf_bind_bus_cs(state, busnum, + cs, spec); + if (ret) { + debug("%s: Bind failed for bus %d, cs %d\n", + __func__, busnum, cs); + return ret; + } + } + } + } + + return 0; +} +#endif + +static const struct udevice_id sandbox_sf_ids[] = { + { .compatible = "sandbox,spi-flash" }, + { } +}; + +U_BOOT_DRIVER(sandbox_sf_emul) = { + .name = "sandbox_sf_emul", + .id = UCLASS_SPI_EMUL, + .of_match = sandbox_sf_ids, + .ofdata_to_platdata = sandbox_sf_ofdata_to_platdata, + .probe = sandbox_sf_probe, + .remove = sandbox_sf_remove, + .priv_auto_alloc_size = sizeof(struct sandbox_spi_flash), + .platdata_auto_alloc_size = sizeof(struct sandbox_spi_flash_plat_data), + .ops = &sandbox_sf_emul_ops, +};

Since sandbox moved to use spi-nor layer, this patch replaced the header changes from sf_internal.h to mtd/spi-nor.h
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sandbox.c | 49 +++++++++++++++++++++---------------------- 1 file changed, 24 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/sandbox.c b/drivers/mtd/spi-nor/sandbox.c index 895604d..3cfb47c 100644 --- a/drivers/mtd/spi-nor/sandbox.c +++ b/drivers/mtd/spi-nor/sandbox.c @@ -12,10 +12,8 @@ #include <dm.h> #include <malloc.h> #include <spi.h> -#include <os.h> - #include <spi_flash.h> -#include "sf_internal.h" +#include <os.h>
#include <asm/getopt.h> #include <asm/spi.h> @@ -24,6 +22,8 @@ #include <dm/lists.h> #include <dm/uclass-internal.h>
+#include <linux/mtd/spi-nor.h> + DECLARE_GLOBAL_DATA_PTR;
/* @@ -88,7 +88,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */ - const struct spi_flash_params *data; + const struct spi_nor_info *data; /* The file on disk to serv up data from */ int fd; }; @@ -112,7 +112,7 @@ static int sandbox_sf_probe(struct udevice *dev) struct sandbox_spi_flash *sbsf = dev_get_priv(dev); const char *file; size_t len, idname_len; - const struct spi_flash_params *data; + const struct spi_nor_info *data; struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); struct sandbox_state *state = state_get_current(); struct udevice *bus = dev->parent; @@ -166,7 +166,7 @@ static int sandbox_sf_probe(struct udevice *dev) } debug("%s: device='%s'\n", __func__, spec);
- for (data = spi_flash_params_table; data->name; data++) { + for (data = spi_nor_ids; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue; @@ -255,45 +255,45 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx,
sbsf->cmd = rx[0]; switch (sbsf->cmd) { - case CMD_READ_ID: + case SNOR_OP_RDID: sbsf->state = SF_ID; sbsf->cmd = SF_ID; break; - case CMD_READ_ARRAY_FAST: + case SNOR_OP_READ_FAST: sbsf->pad_addr_bytes = 1; - case CMD_READ_ARRAY_SLOW: - case CMD_PAGE_PROGRAM: + case SNOR_OP_READ: + case SNOR_OP_PP: sbsf->state = SF_ADDR; break; - case CMD_WRITE_DISABLE: + case SNOR_OP_WRDI: debug(" write disabled\n"); sbsf->status &= ~STAT_WEL; break; - case CMD_READ_STATUS: + case SNOR_OP_RDSR: sbsf->state = SF_READ_STATUS; break; - case CMD_READ_STATUS1: + case SNOR_OP_RDCR: sbsf->state = SF_READ_STATUS1; break; - case CMD_WRITE_ENABLE: + case SNOR_OP_WREN: debug(" write enabled\n"); sbsf->status |= STAT_WEL; break; - case CMD_WRITE_STATUS: + case SNOR_OP_WRSR: sbsf->state = SF_WRITE_STATUS; break; default: { int flags = sbsf->data->flags;
/* we only support erase here */ - if (sbsf->cmd == CMD_ERASE_CHIP) { + if (sbsf->cmd == SPINOR_OP_CHIP_ERASE) { sbsf->erase_size = sbsf->data->sector_size * - sbsf->data->nr_sectors; - } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { + sbsf->data->n_sectors; + } else if (sbsf->cmd == SNOR_OP_BE_4K && (flags & SECT_4K)) { sbsf->erase_size = 4 << 10; - } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) { + } else if (sbsf->cmd == SNOR_OP_BE_32K && (flags & SECT_32K)) { sbsf->erase_size = 32 << 10; - } else if (sbsf->cmd == CMD_ERASE_64K && + } else if (sbsf->cmd == SNOR_OP_SE && !(flags & (SECT_4K | SECT_32K))) { sbsf->erase_size = 64 << 10; } else { @@ -361,8 +361,7 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, debug(" id: off:%u tx:", sbsf->off); if (sbsf->off < IDCODE_LEN) { /* Extract correct byte from ID 0x00aabbcc */ - id = sbsf->data->jedec >> - (8 * (IDCODE_LEN - 1 - sbsf->off)); + id = JEDEC_ID(sbsf->data) >> (8 * (IDCODE_LEN - 1 - sbsf->off)); } else { id = 0; } @@ -394,11 +393,11 @@ static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, return -EIO; } switch (sbsf->cmd) { - case CMD_READ_ARRAY_FAST: - case CMD_READ_ARRAY_SLOW: + case SNOR_OP_READ_FAST: + case SNOR_OP_READ: sbsf->state = SF_READ; break; - case CMD_PAGE_PROGRAM: + case SNOR_OP_PP: sbsf->state = SF_WRITE; break; default:

To follow spi-nor notation replaced CONFIG_SPI_FLASH_SANDBOX with CONFIG_SPI_NOR_SANDBOX.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 10 ++++++++++ drivers/mtd/spi-nor/Makefile | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index f039a9d..62439f4 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -96,6 +96,16 @@ config SPI_FLASH_WINBOND help Add support for various Winbond SPI flash chips (W25xxx)
+config SPI_NOR_SANDBOX + bool "Support sandbox SPI flash device" + depends on SANDBOX + help + Since sandbox cannot access real devices, an emulation mechanism is + provided instead. Drivers can be connected up to the sandbox SPI + bus (see CONFIG_SANDBOX_SPI) and SPI traffic will be routed to this + device. Typically the contents of the emulated SPI flash device is + stored in a file on the host filesystem. + endif # MTD_SPI_NOR
config MTD_DATAFLASH diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index d6edf1a..61611f5 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -17,4 +17,4 @@ endif
obj-$(CONFIG_MTD_M25P80) += m25p80.o obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o -obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o +obj-$(CONFIG_SPI_NOR_SANDBOX) += sandbox.o

Drop using legacy DM_SPI_FLASH.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/Kconfig | 1 - 1 file changed, 1 deletion(-)
diff --git a/arch/Kconfig b/arch/Kconfig index ec12013..0c02099 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -87,7 +87,6 @@ config SANDBOX select SYS_GENERIC_BOARD select SUPPORT_OF_CONTROL select DM - select DM_SPI_FLASH select DM_SERIAL select DM_I2C select DM_SPI

Since SPI-NOR core relies on MTD uclass.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/Kconfig b/arch/Kconfig index 0c02099..2c58b9a 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -91,6 +91,7 @@ config SANDBOX select DM_I2C select DM_SPI select DM_GPIO + select MTD
config SH bool "SuperH architecture"

Enable SPI-NOR framework, MTD_M25P80 and MTD_SPI_NOR.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/sandbox_defconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index b5b81ca..14b0dfc 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -40,8 +40,8 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SANDBOX=y CONFIG_RESET=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH_SANDBOX=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y

Replace CONFIG_SPI_FLASH with CONFIG_MTD_SPI_NOR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/sandbox.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/spi-nor/sandbox.c b/drivers/mtd/spi-nor/sandbox.c index 3cfb47c..c489ea9 100644 --- a/drivers/mtd/spi-nor/sandbox.c +++ b/drivers/mtd/spi-nor/sandbox.c @@ -533,7 +533,7 @@ static const struct dm_spi_emul_ops sandbox_sf_emul_ops = { .xfer = sandbox_sf_xfer, };
-#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state, const char *arg) {

Enable updated SPI-NOR sandbox driver.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/sandbox_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 14b0dfc..0d8815a 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -40,6 +40,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SANDBOX=y CONFIG_RESET=y CONFIG_DM_MMC=y +CONFIG_SPI_NOR_SANDBOX=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y

Use spi_flash_t instead of struct spi_flash.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- board/Arcturus/ucp1020/cmd_arc.c | 2 +- board/Synology/common/cmd_syno.c | 2 +- board/buffalo/lsxl/lsxl.c | 2 +- board/congatec/cgtqmx6eval/cgtqmx6eval.c | 2 +- board/davinci/da8xxevm/da850evm.c | 2 +- board/renesas/sh7752evb/sh7752evb.c | 4 ++-- board/renesas/sh7753evb/sh7753evb.c | 4 ++-- board/renesas/sh7757lcr/sh7757lcr.c | 6 +++--- board/siemens/taurus/taurus.c | 2 +- common/splash_source.c | 2 +- drivers/dfu/dfu_sf.c | 4 ++-- drivers/net/fm/fm.c | 2 +- drivers/net/phy/cortina.c | 2 +- 13 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/board/Arcturus/ucp1020/cmd_arc.c b/board/Arcturus/ucp1020/cmd_arc.c index fa6b485..9f98d6d 100644 --- a/board/Arcturus/ucp1020/cmd_arc.c +++ b/board/Arcturus/ucp1020/cmd_arc.c @@ -37,7 +37,7 @@ #define FIRM_ADDR3 (CONFIG_ENV_SECT_SIZE + 0x200 - sizeof(smac)) #define FIRM_ADDR4 (CONFIG_ENV_SECT_SIZE + 0x400 - sizeof(smac))
-static struct spi_flash *flash; +static spi_flash_t *flash; char smac[4][18];
static int ishwaddr(char *hwaddr) diff --git a/board/Synology/common/cmd_syno.c b/board/Synology/common/cmd_syno.c index 20544e2..1d0f3e7 100644 --- a/board/Synology/common/cmd_syno.c +++ b/board/Synology/common/cmd_syno.c @@ -27,7 +27,7 @@ static int do_syno_populate(int argc, char * const argv[]) unsigned int cs = CONFIG_SF_DEFAULT_CS; unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; - struct spi_flash *flash; + spi_flash_t *flash; unsigned long addr = 0x80000; /* XXX: parameterize this? */ loff_t offset = 0x007d0000; loff_t len = 0x00010000; diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c index 0f37345..298d26e 100644 --- a/board/buffalo/lsxl/lsxl.c +++ b/board/buffalo/lsxl/lsxl.c @@ -211,7 +211,7 @@ void check_enetaddr(void)
static void erase_environment(void) { - struct spi_flash *flash; + spi_flash_t *flash;
printf("Erasing environment..\n"); flash = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 225de7c..8db2b9e 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -1005,7 +1005,7 @@ static void conv_ascii(unsigned char *dst, unsigned char *src, int len) #define CFG_MFG_ADDR_OFFSET (spi->size - SZ_16K) static bool is_2gb(void) { - struct spi_flash *spi; + spi_flash_t *spi; int ret; char buf[sizeof(struct mfgdata)]; struct mfgdata *data = (struct mfgdata *)buf; diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index b82385a..356d3ce 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -49,7 +49,7 @@ DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_MAC_ADDR_IN_SPIFLASH static int get_mac_addr(u8 *addr) { - struct spi_flash *flash; + spi_flash_t *flash; int ret;
flash = spi_flash_probe(CFG_MAC_ADDR_SPI_BUS, CFG_MAC_ADDR_SPI_CS, diff --git a/board/renesas/sh7752evb/sh7752evb.c b/board/renesas/sh7752evb/sh7752evb.c index 3aad532..35360fd 100644 --- a/board/renesas/sh7752evb/sh7752evb.c +++ b/board/renesas/sh7752evb/sh7752evb.c @@ -185,7 +185,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size) { - struct spi_flash *spi; + spi_flash_t *spi; int ret;
spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); @@ -254,7 +254,7 @@ int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i, ret; char mac_string[256]; - struct spi_flash *spi; + spi_flash_t *spi; unsigned char *buf;
if (argc != 3) { diff --git a/board/renesas/sh7753evb/sh7753evb.c b/board/renesas/sh7753evb/sh7753evb.c index 52a1906..8d609ec 100644 --- a/board/renesas/sh7753evb/sh7753evb.c +++ b/board/renesas/sh7753evb/sh7753evb.c @@ -201,7 +201,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size) { - struct spi_flash *spi; + spi_flash_t *spi; int ret;
spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); @@ -270,7 +270,7 @@ int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i, ret; char mac_string[256]; - struct spi_flash *spi; + spi_flash_t *spi; unsigned char *buf;
if (argc != 3) { diff --git a/board/renesas/sh7757lcr/sh7757lcr.c b/board/renesas/sh7757lcr/sh7757lcr.c index ddcf275..9793f1f 100644 --- a/board/renesas/sh7757lcr/sh7757lcr.c +++ b/board/renesas/sh7757lcr/sh7757lcr.c @@ -30,7 +30,7 @@ static void init_gctrl(void)
static int init_pcie_bridge_from_spi(void *buf, size_t size) { - struct spi_flash *spi; + spi_flash_t *spi; int ret; unsigned long pcie_addr;
@@ -256,7 +256,7 @@ int board_mmc_init(bd_t *bis)
static int get_sh_eth_mac_raw(unsigned char *buf, int size) { - struct spi_flash *spi; + spi_flash_t *spi; int ret;
spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3); @@ -381,7 +381,7 @@ int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i, ret; char mac_string[256]; - struct spi_flash *spi; + spi_flash_t *spi; unsigned char *buf;
if (argc != 5) { diff --git a/board/siemens/taurus/taurus.c b/board/siemens/taurus/taurus.c index 72c5e60..663db59 100644 --- a/board/siemens/taurus/taurus.c +++ b/board/siemens/taurus/taurus.c @@ -122,7 +122,7 @@ void spl_board_init(void)
/* check for recovery mode */ if (at91_is_recovery() == 1) { - struct spi_flash *flash; + spi_flash_t *flash;
puts("Recovery button pressed\n"); nand_init(); diff --git a/common/splash_source.c b/common/splash_source.c index a09dd4b..3393f73 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_SPI_FLASH -static struct spi_flash *sf; +static spi_flash_t *sf; static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size) { if (!sf) { diff --git a/drivers/dfu/dfu_sf.c b/drivers/dfu/dfu_sf.c index 13e7f92..48eb546 100644 --- a/drivers/dfu/dfu_sf.c +++ b/drivers/dfu/dfu_sf.c @@ -63,14 +63,14 @@ static void dfu_free_entity_sf(struct dfu_entity *dfu) spi_flash_free(dfu->data.sf.dev); }
-static struct spi_flash *parse_dev(char *devstr) +static spi_flash_t *parse_dev(char *devstr) { unsigned int bus; unsigned int cs; unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; char *s, *endp; - struct spi_flash *dev; + spi_flash_t *dev;
s = strsep(&devstr, ":"); if (!s || !*s || (bus = simple_strtoul(s, &endp, 0), *endp)) { diff --git a/drivers/net/fm/fm.c b/drivers/net/fm/fm.c index 40fbf19..d6c7003 100644 --- a/drivers/net/fm/fm.c +++ b/drivers/net/fm/fm.c @@ -367,7 +367,7 @@ int fm_init_common(int index, struct ccsr_fman *reg) CONFIG_SYS_FMAN_FW_ADDR, rc); } #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH) - struct spi_flash *ucode_flash; + spi_flash_t *ucode_flash; void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH); int ret = 0;
diff --git a/drivers/net/phy/cortina.c b/drivers/net/phy/cortina.c index f975fd8..f7961a4 100644 --- a/drivers/net/phy/cortina.c +++ b/drivers/net/phy/cortina.c @@ -147,7 +147,7 @@ void cs4340_upload_firmware(struct phy_device *phydev) } #elif defined(CONFIG_SYS_CORTINA_FW_IN_SPIFLASH) int ret; - struct spi_flash *ucode_flash; + spi_flash_t *ucode_flash;
addr = malloc(CONFIG_CORTINA_FW_LENGTH); ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,

The flash chips vendors like - Atmel - EON - ESMT - Everspin - Fujitsu - GigaDevice - Intel - ISSI - PMC - non-JEDEC
have shared most of the spi-nor core code, so group all of them into a common config CONFIG_SPI_NOR_MISC this certainly reduced the individual chip configs.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/Kconfig | 17 ++++------------- drivers/mtd/spi-nor/spi-nor-ids.c | 21 ++++++++++++++------- 2 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 62439f4..3a82c49 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -56,20 +56,11 @@ config SPI_NOR_BAR Bank/Extended address registers are used to access the flash which has size > 16MiB in 3-byte addressing.
-config SPI_FLASH_ATMEL - bool "Atmel SPI flash support" +config SPI_NOR_MISC + bool "Miscellaneous SPI NOR flash's support" help - Add support for various Atmel SPI flash chips (AT45xxx and AT25xxx) - -config SPI_FLASH_EON - bool "EON SPI flash support" - help - Add support for various EON SPI flash chips (EN25xxx) - -config SPI_FLASH_GIGADEVICE - bool "GigaDevice SPI flash support" - help - Add support for various GigaDevice SPI flash chips (GD25xxx) + Add support for various Atmel, EON, ESMT, Everspin, Fujitsu, + GigaDevice, Intel, ISSI, PMC and non-JEDEC SPI NOR flash chips.
config SPI_FLASH_MACRONIX bool "Macronix SPI flash support" diff --git a/drivers/mtd/spi-nor/spi-nor-ids.c b/drivers/mtd/spi-nor/spi-nor-ids.c index 2599731..f6ee627 100644 --- a/drivers/mtd/spi-nor/spi-nor-ids.c +++ b/drivers/mtd/spi-nor/spi-nor-ids.c @@ -41,6 +41,7 @@ .flash_read = _flash_read, \ .flags = (_flags),
+#ifdef CONFIG_SPI_NOR_MISC #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_width, _flash_read, _flags) \ .sector_size = (_sector_size), \ .n_sectors = (_n_sectors), \ @@ -48,6 +49,7 @@ .addr_width = (_addr_width), \ .flash_read = _flash_read, \ .flags = (_flags), +#endif
/* NOTE: double check command sets and memory organization when you add * more nor chips. This current list focusses on newer chips, which @@ -61,7 +63,7 @@ * old entries may be missing 4K flag. */ const struct spi_nor_info spi_nor_ids[] = { -#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ +#ifdef CONFIG_SPI_NOR_MISC /* Atmel -- some are (confusingly) marketed as "DataFlash" */ { "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, { "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, @@ -83,7 +85,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "at45db321d", INFO(0x1f2700, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, { "at45db641d", INFO(0x1f2800, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, #endif -#ifdef CONFIG_SPI_FLASH_EON /* EON */ +#ifdef CONFIG_SPI_NOR_MISC /* EON -- en25xxx */ { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, @@ -95,6 +97,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, SNOR_READ_BASE, 0) }, { "en25s64", INFO(0x1c3817, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, #endif +#ifdef CONFIG_SPI_NOR_MISC /* ESMT */ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) },
@@ -104,20 +107,21 @@ const struct spi_nor_info spi_nor_ids[] = {
/* Fujitsu */ { "mb85rs1mt", INFO(0x047f27, 0, 128 * 1024, 1, SNOR_READ_BASE, SPI_NOR_NO_ERASE) }, - -#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ +#endif +#ifdef CONFIG_SPI_NOR_MISC /* GigaDevice */ { "gd25q32", INFO(0xc84016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256, SNOR_READ_BASE, SECT_4K) }, { "gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, #endif +#ifdef CONFIG_SPI_NOR_MISC /* Intel/Numonyx -- xxxs33b */ { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, - -#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ +#endif +#ifdef CONFIG_SPI_NOR_MISC /* ISSI */ { "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SNOR_READ_BASE, SECT_4K) }, { "is25lp032", INFO(0x9d6016, 0, 64 * 1024, 64, SNOR_READ_BASE, 0) }, @@ -154,11 +158,12 @@ const struct spi_nor_info spi_nor_ids[] = { { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K | USE_FSR) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K | USE_FSR) }, #endif +#ifdef CONFIG_SPI_NOR_MISC /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SNOR_READ_BASE, SECT_4K_PMC) }, { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SNOR_READ_BASE, SECT_4K_PMC) }, { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, - +#endif #ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ /* Spansion -- single (large) sector size only, at least * for the chips listed here (without boot sectors). @@ -266,11 +271,13 @@ const struct spi_nor_info spi_nor_ids[] = { { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, { "w25q128fw", INFO(0xef6018, 0, 64 * 1024, 256, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, #endif +#ifdef CONFIG_SPI_NOR_MISC /* Catalyst / On Semiconductor -- non-JEDEC */ { "cat25c11", CAT25_INFO( 16, 8, 16, 1, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "cat25c03", CAT25_INFO( 32, 8, 16, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "cat25c09", CAT25_INFO( 128, 8, 32, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "cat25c17", CAT25_INFO( 256, 8, 32, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, { "cat25128", CAT25_INFO(2048, 8, 64, 2, SNOR_READ_BASE, SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) }, +#endif { }, };

New SPI-NOR framework use below configs
- CONFIG_MTD - CONFIG_MTD_M25P80 - CONFIG_MTD_SPI_NOR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/Kconfig | 2 +- arch/arm/Kconfig | 8 ++++---- arch/arm/mach-rockchip/Kconfig | 2 +- arch/arm/mach-tegra/Kconfig | 2 +- configs/B4420QDS_NAND_defconfig | 3 ++- configs/B4420QDS_SPIFLASH_defconfig | 3 ++- configs/B4420QDS_defconfig | 3 ++- configs/B4860QDS_NAND_defconfig | 3 ++- configs/B4860QDS_SECURE_BOOT_defconfig | 3 ++- configs/B4860QDS_SPIFLASH_defconfig | 3 ++- configs/B4860QDS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/B4860QDS_defconfig | 3 ++- configs/BSC9131RDB_NAND_SYSCLK100_defconfig | 3 ++- configs/BSC9131RDB_NAND_defconfig | 3 ++- configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig | 3 ++- configs/BSC9131RDB_SPIFLASH_defconfig | 3 ++- configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig | 3 ++- configs/BSC9132QDS_NAND_DDRCLK100_defconfig | 3 ++- configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig | 3 ++- configs/BSC9132QDS_NAND_DDRCLK133_defconfig | 3 ++- configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig | 3 ++- configs/BSC9132QDS_NOR_DDRCLK100_defconfig | 3 ++- configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig | 3 ++- configs/BSC9132QDS_NOR_DDRCLK133_defconfig | 3 ++- configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig | 3 ++- configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig | 3 ++- configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig | 3 ++- configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig | 3 ++- configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig | 3 ++- configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig | 3 ++- configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig | 3 ++- configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig | 3 ++- configs/C29XPCIE_NAND_defconfig | 3 ++- configs/C29XPCIE_NOR_SECBOOT_defconfig | 3 ++- configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 3 ++- configs/C29XPCIE_SPIFLASH_defconfig | 3 ++- configs/C29XPCIE_defconfig | 3 ++- configs/M52277EVB_defconfig | 3 ++- configs/M52277EVB_stmicro_defconfig | 3 ++- configs/M54418TWR_defconfig | 3 ++- configs/M54418TWR_nand_mii_defconfig | 3 ++- configs/M54418TWR_nand_rmii_defconfig | 3 ++- configs/M54418TWR_nand_rmii_lowfreq_defconfig | 3 ++- configs/M54418TWR_serial_mii_defconfig | 3 ++- configs/M54418TWR_serial_rmii_defconfig | 3 ++- configs/M54451EVB_defconfig | 3 ++- configs/M54451EVB_stmicro_defconfig | 3 ++- configs/M54455EVB_a66_defconfig | 3 ++- configs/M54455EVB_defconfig | 3 ++- configs/M54455EVB_i66_defconfig | 3 ++- configs/M54455EVB_intel_defconfig | 3 ++- configs/M54455EVB_stm33_defconfig | 3 ++- configs/MPC8536DS_36BIT_defconfig | 3 ++- configs/MPC8536DS_SDCARD_defconfig | 3 ++- configs/MPC8536DS_SPIFLASH_defconfig | 3 ++- configs/MPC8536DS_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_NAND_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_NOR_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 3 ++- configs/P1010RDB-PA_NAND_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_NAND_defconfig | 3 ++- configs/P1010RDB-PA_NOR_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_NOR_defconfig | 3 ++- configs/P1010RDB-PA_SDCARD_defconfig | 3 ++- configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PA_SPIFLASH_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_NAND_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_NOR_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 3 ++- configs/P1010RDB-PB_NAND_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_NAND_defconfig | 3 ++- configs/P1010RDB-PB_NOR_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_NOR_defconfig | 3 ++- configs/P1010RDB-PB_SDCARD_defconfig | 3 ++- configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig | 3 ++- configs/P1010RDB-PB_SPIFLASH_defconfig | 3 ++- configs/P1020RDB-PC_36BIT_NAND_defconfig | 3 ++- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 3 ++- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 3 ++- configs/P1020RDB-PC_36BIT_defconfig | 3 ++- configs/P1020RDB-PC_NAND_defconfig | 3 ++- configs/P1020RDB-PC_SDCARD_defconfig | 3 ++- configs/P1020RDB-PC_SPIFLASH_defconfig | 3 ++- configs/P1020RDB-PC_defconfig | 3 ++- configs/P1020RDB-PD_NAND_defconfig | 3 ++- configs/P1020RDB-PD_SDCARD_defconfig | 3 ++- configs/P1020RDB-PD_SPIFLASH_defconfig | 3 ++- configs/P1020RDB-PD_defconfig | 3 ++- configs/P1021RDB-PC_36BIT_NAND_defconfig | 3 ++- configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 3 ++- configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig | 3 ++- configs/P1021RDB-PC_36BIT_defconfig | 3 ++- configs/P1021RDB-PC_NAND_defconfig | 3 ++- configs/P1021RDB-PC_SDCARD_defconfig | 3 ++- configs/P1021RDB-PC_SPIFLASH_defconfig | 3 ++- configs/P1021RDB-PC_defconfig | 3 ++- configs/P1022DS_36BIT_NAND_defconfig | 3 ++- configs/P1022DS_36BIT_SDCARD_defconfig | 3 ++- configs/P1022DS_36BIT_SPIFLASH_defconfig | 3 ++- configs/P1022DS_36BIT_defconfig | 3 ++- configs/P1022DS_NAND_defconfig | 3 ++- configs/P1022DS_SDCARD_defconfig | 3 ++- configs/P1022DS_SPIFLASH_defconfig | 3 ++- configs/P1022DS_defconfig | 3 ++- configs/P1024RDB_36BIT_defconfig | 3 ++- configs/P1024RDB_NAND_defconfig | 3 ++- configs/P1024RDB_SDCARD_defconfig | 3 ++- configs/P1024RDB_SPIFLASH_defconfig | 3 ++- configs/P1024RDB_defconfig | 3 ++- configs/P1025RDB_36BIT_defconfig | 3 ++- configs/P1025RDB_NAND_defconfig | 3 ++- configs/P1025RDB_SDCARD_defconfig | 3 ++- configs/P1025RDB_SPIFLASH_defconfig | 3 ++- configs/P1025RDB_defconfig | 3 ++- configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 ++- configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 3 ++- configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 ++- configs/P2020RDB-PC_36BIT_defconfig | 3 ++- configs/P2020RDB-PC_NAND_defconfig | 3 ++- configs/P2020RDB-PC_SDCARD_defconfig | 3 ++- configs/P2020RDB-PC_SPIFLASH_defconfig | 3 ++- configs/P2020RDB-PC_defconfig | 3 ++- configs/P2041RDB_NAND_defconfig | 3 ++- configs/P2041RDB_SDCARD_defconfig | 3 ++- configs/P2041RDB_SECURE_BOOT_defconfig | 3 ++- configs/P2041RDB_SPIFLASH_defconfig | 3 ++- configs/P2041RDB_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/P2041RDB_defconfig | 3 ++- configs/P3041DS_NAND_SECURE_BOOT_defconfig | 3 ++- configs/P3041DS_NAND_defconfig | 3 ++- configs/P3041DS_SDCARD_defconfig | 3 ++- configs/P3041DS_SECURE_BOOT_defconfig | 3 ++- configs/P3041DS_SPIFLASH_defconfig | 3 ++- configs/P3041DS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/P3041DS_defconfig | 3 ++- configs/P4080DS_SDCARD_defconfig | 3 ++- configs/P4080DS_SECURE_BOOT_defconfig | 3 ++- configs/P4080DS_SPIFLASH_defconfig | 3 ++- configs/P4080DS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/P4080DS_defconfig | 3 ++- configs/P5020DS_NAND_SECURE_BOOT_defconfig | 3 ++- configs/P5020DS_NAND_defconfig | 3 ++- configs/P5020DS_SDCARD_defconfig | 3 ++- configs/P5020DS_SECURE_BOOT_defconfig | 3 ++- configs/P5020DS_SPIFLASH_defconfig | 3 ++- configs/P5020DS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/P5020DS_defconfig | 3 ++- configs/P5040DS_NAND_SECURE_BOOT_defconfig | 3 ++- configs/P5040DS_NAND_defconfig | 3 ++- configs/P5040DS_SDCARD_defconfig | 3 ++- configs/P5040DS_SECURE_BOOT_defconfig | 3 ++- configs/P5040DS_SPIFLASH_defconfig | 3 ++- configs/P5040DS_defconfig | 3 ++- configs/T1023RDB_NAND_defconfig | 3 ++- configs/T1023RDB_SDCARD_defconfig | 3 ++- configs/T1023RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1023RDB_SPIFLASH_defconfig | 3 ++- configs/T1023RDB_defconfig | 3 ++- configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 3 ++- configs/T1024QDS_DDR4_defconfig | 3 ++- configs/T1024QDS_NAND_defconfig | 3 ++- configs/T1024QDS_SDCARD_defconfig | 3 ++- configs/T1024QDS_SECURE_BOOT_defconfig | 3 ++- configs/T1024QDS_SPIFLASH_defconfig | 3 ++- configs/T1024QDS_defconfig | 3 ++- configs/T1024RDB_NAND_defconfig | 3 ++- configs/T1024RDB_SDCARD_defconfig | 3 ++- configs/T1024RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1024RDB_SPIFLASH_defconfig | 3 ++- configs/T1024RDB_defconfig | 3 ++- configs/T1040D4RDB_NAND_defconfig | 3 ++- configs/T1040D4RDB_SDCARD_defconfig | 3 ++- configs/T1040D4RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1040D4RDB_SPIFLASH_defconfig | 3 ++- configs/T1040D4RDB_defconfig | 3 ++- configs/T1040QDS_DDR4_defconfig | 3 ++- configs/T1040QDS_SECURE_BOOT_defconfig | 3 ++- configs/T1040QDS_defconfig | 3 ++- configs/T1040RDB_NAND_defconfig | 3 ++- configs/T1040RDB_SDCARD_defconfig | 3 ++- configs/T1040RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1040RDB_SPIFLASH_defconfig | 3 ++- configs/T1040RDB_defconfig | 3 ++- configs/T1042D4RDB_NAND_defconfig | 3 ++- configs/T1042D4RDB_SDCARD_defconfig | 3 ++- configs/T1042D4RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1042D4RDB_SPIFLASH_defconfig | 3 ++- configs/T1042D4RDB_defconfig | 3 ++- configs/T1042RDB_PI_NAND_defconfig | 3 ++- configs/T1042RDB_PI_SDCARD_defconfig | 3 ++- configs/T1042RDB_PI_SPIFLASH_defconfig | 3 ++- configs/T1042RDB_PI_defconfig | 3 ++- configs/T1042RDB_SECURE_BOOT_defconfig | 3 ++- configs/T1042RDB_defconfig | 3 ++- configs/T2080QDS_NAND_defconfig | 3 ++- configs/T2080QDS_SDCARD_defconfig | 3 ++- configs/T2080QDS_SECURE_BOOT_defconfig | 3 ++- configs/T2080QDS_SPIFLASH_defconfig | 3 ++- configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/T2080QDS_defconfig | 3 ++- configs/T2080RDB_NAND_defconfig | 3 ++- configs/T2080RDB_SDCARD_defconfig | 3 ++- configs/T2080RDB_SECURE_BOOT_defconfig | 3 ++- configs/T2080RDB_SPIFLASH_defconfig | 3 ++- configs/T2080RDB_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/T2080RDB_defconfig | 3 ++- configs/T2081QDS_NAND_defconfig | 3 ++- configs/T2081QDS_SDCARD_defconfig | 3 ++- configs/T2081QDS_SPIFLASH_defconfig | 3 ++- configs/T2081QDS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/T2081QDS_defconfig | 3 ++- configs/T4160QDS_NAND_defconfig | 3 ++- configs/T4160QDS_SDCARD_defconfig | 3 ++- configs/T4160QDS_SECURE_BOOT_defconfig | 3 ++- configs/T4160QDS_defconfig | 3 ++- configs/T4160RDB_defconfig | 3 ++- configs/T4240QDS_NAND_defconfig | 3 ++- configs/T4240QDS_SDCARD_defconfig | 3 ++- configs/T4240QDS_SECURE_BOOT_defconfig | 3 ++- configs/T4240QDS_SRIO_PCIE_BOOT_defconfig | 3 ++- configs/T4240QDS_defconfig | 3 ++- configs/T4240RDB_SDCARD_defconfig | 3 ++- configs/T4240RDB_defconfig | 3 ++- configs/UCP1020_SPIFLASH_defconfig | 3 ++- configs/UCP1020_defconfig | 3 ++- configs/alt_defconfig | 3 ++- configs/am335x_boneblack_defconfig | 3 ++- configs/am335x_boneblack_vboot_defconfig | 3 ++- configs/am335x_evm_defconfig | 3 ++- configs/am335x_evm_nor_defconfig | 3 ++- configs/am335x_evm_norboot_defconfig | 3 ++- configs/am335x_evm_spiboot_defconfig | 3 ++- configs/am335x_evm_usbspl_defconfig | 3 ++- configs/am335x_gp_evm_defconfig | 3 ++- configs/am437x_gp_evm_defconfig | 3 ++- configs/am437x_sk_evm_defconfig | 5 +++-- configs/am43xx_evm_defconfig | 3 ++- configs/am43xx_evm_ethboot_defconfig | 3 ++- configs/am43xx_evm_qspiboot_defconfig | 3 ++- configs/am43xx_evm_usbhost_boot_defconfig | 3 ++- configs/am57xx_evm_defconfig | 3 ++- configs/aristainetos2_defconfig | 3 ++- configs/aristainetos2b_defconfig | 3 ++- configs/aristainetos_defconfig | 3 ++- configs/at91sam9n12ek_mmc_defconfig | 3 ++- configs/at91sam9n12ek_nandflash_defconfig | 3 ++- configs/at91sam9n12ek_spiflash_defconfig | 3 ++- configs/at91sam9x5ek_dataflash_defconfig | 3 ++- configs/at91sam9x5ek_mmc_defconfig | 3 ++- configs/at91sam9x5ek_nandflash_defconfig | 3 ++- configs/at91sam9x5ek_spiflash_defconfig | 3 ++- configs/atngw100_defconfig | 3 ++- configs/atngw100mkii_defconfig | 3 ++- configs/axm_defconfig | 3 ++- configs/bayleybay_defconfig | 3 ++- configs/beaver_defconfig | 3 ++- configs/bf518f-ezbrd_defconfig | 3 ++- configs/bf525-ucr2_defconfig | 3 ++- configs/bf526-ezbrd_defconfig | 3 ++- configs/bf527-ad7160-eval_defconfig | 3 ++- configs/bf527-ezkit-v2_defconfig | 3 ++- configs/bf527-ezkit_defconfig | 3 ++- configs/bf527-sdp_defconfig | 3 ++- configs/bf537-minotaur_defconfig | 3 ++- configs/bf537-pnav_defconfig | 3 ++- configs/bf537-srv1_defconfig | 3 ++- configs/bf537-stamp_defconfig | 3 ++- configs/bf548-ezkit_defconfig | 3 ++- configs/bf561-acvilon_defconfig | 3 ++- configs/bf609-ezkit_defconfig | 3 ++- configs/bg0900_defconfig | 3 ++- configs/birdland_bav335a_defconfig | 3 ++- configs/birdland_bav335b_defconfig | 3 ++- configs/blackstamp_defconfig | 3 ++- configs/blackvme_defconfig | 3 ++- configs/br4_defconfig | 3 ++- configs/cardhu_defconfig | 3 ++- configs/chromebook_link_defconfig | 3 ++- configs/chromebox_panther_defconfig | 3 ++- configs/clearfog_defconfig | 3 ++- configs/cm_fx6_defconfig | 3 ++- configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 3 ++- configs/controlcenterd_36BIT_SDCARD_defconfig | 3 ++- configs/coreboot-x86_defconfig | 3 ++- configs/crownbay_defconfig | 3 ++- configs/d2net_v2_defconfig | 3 ++- configs/da850_am18xxevm_defconfig | 3 ++- configs/da850evm_defconfig | 3 ++- configs/da850evm_direct_nor_defconfig | 3 ++- configs/dalmore_defconfig | 3 ++- configs/db-88f6820-gp_defconfig | 3 ++- configs/db-mv784mp-gp_defconfig | 3 ++- configs/dra72_evm_defconfig | 5 +++-- configs/dra74_evm_defconfig | 5 +++-- configs/dra7xx_evm_defconfig | 3 ++- configs/dra7xx_evm_qspiboot_defconfig | 3 ++- configs/dra7xx_evm_uart3_defconfig | 3 ++- configs/draco_defconfig | 3 ++- configs/dreamplug_defconfig | 3 ++- configs/ds414_defconfig | 3 ++- configs/e2220-1170_defconfig | 3 ++- configs/ea20_defconfig | 3 ++- configs/ethernut5_defconfig | 3 ++- configs/galileo_defconfig | 3 ++- configs/gose_defconfig | 3 ++- configs/gplugd_defconfig | 3 ++- configs/inetspace_v2_defconfig | 3 ++- configs/ip04_defconfig | 3 ++- configs/jetson-tk1_defconfig | 3 ++- configs/k2e_evm_defconfig | 3 ++- configs/k2g_evm_defconfig | 3 ++- configs/k2hk_evm_defconfig | 3 ++- configs/k2l_evm_defconfig | 3 ++- configs/km_kirkwood_128m16_defconfig | 3 ++- configs/km_kirkwood_defconfig | 3 ++- configs/km_kirkwood_pci_defconfig | 3 ++- configs/kmcoge4_defconfig | 3 ++- configs/kmcoge5un_defconfig | 3 ++- configs/kmlion1_defconfig | 3 ++- configs/kmnusa_defconfig | 3 ++- configs/kmsugp1_defconfig | 3 ++- configs/kmsuv31_defconfig | 3 ++- configs/koelsch_defconfig | 3 ++- configs/lager_defconfig | 3 ++- configs/ls1021atwr_qspi_defconfig | 3 ++- configs/ls1021atwr_sdcard_qspi_defconfig | 3 ++- configs/ls1043aqds_defconfig | 3 ++- configs/ls1043aqds_lpuart_defconfig | 3 ++- configs/ls1043aqds_nand_defconfig | 3 ++- configs/ls1043aqds_nor_ddr3_defconfig | 3 ++- configs/ls1043aqds_qspi_defconfig | 3 ++- configs/ls1043aqds_sdcard_ifc_defconfig | 3 ++- configs/ls1043aqds_sdcard_qspi_defconfig | 3 ++- configs/ls1043ardb_SECURE_BOOT_defconfig | 3 ++- configs/ls1043ardb_defconfig | 3 ++- configs/ls1043ardb_nand_defconfig | 3 ++- configs/ls1043ardb_sdcard_defconfig | 3 ++- configs/ls2080aqds_defconfig | 2 +- configs/ls2080ardb_defconfig | 2 +- configs/ls2085aqds_defconfig | 2 +- configs/ls2085ardb_defconfig | 2 +- configs/lschlv2_defconfig | 3 ++- configs/lsxhl_defconfig | 3 ++- configs/m28evk_defconfig | 3 ++- configs/marsboard_defconfig | 3 ++- configs/maxbcm_defconfig | 3 ++- configs/mgcoge3un_defconfig | 3 ++- configs/minnowmax_defconfig | 3 ++- configs/mx28evk_auart_console_defconfig | 3 ++- configs/mx28evk_defconfig | 3 ++- configs/mx28evk_nand_defconfig | 3 ++- configs/mx28evk_spi_defconfig | 3 ++- configs/mx6dlsabreauto_defconfig | 3 ++- configs/mx6dlsabresd_defconfig | 3 ++- configs/mx6qpsabreauto_defconfig | 3 ++- configs/mx6qsabreauto_defconfig | 3 ++- configs/mx6qsabrelite_defconfig | 3 ++- configs/mx6qsabresd_defconfig | 3 ++- configs/mx6sabresd_spl_defconfig | 3 ++- configs/mx6slevk_defconfig | 3 ++- configs/mx6slevk_spinor_defconfig | 3 ++- configs/mx6slevk_spl_defconfig | 3 ++- configs/mx6sxsabreauto_defconfig | 3 ++- configs/mx6sxsabresd_defconfig | 3 ++- configs/mx6sxsabresd_spl_defconfig | 3 ++- configs/net2big_v2_defconfig | 3 ++- configs/netspace_lite_v2_defconfig | 3 ++- configs/netspace_max_v2_defconfig | 3 ++- configs/netspace_mini_v2_defconfig | 3 ++- configs/netspace_v2_defconfig | 3 ++- configs/nitrogen6dl2g_defconfig | 3 ++- configs/nitrogen6dl_defconfig | 3 ++- configs/nitrogen6q2g_defconfig | 3 ++- configs/nitrogen6q_defconfig | 3 ++- configs/nitrogen6s1g_defconfig | 3 ++- configs/nitrogen6s_defconfig | 3 ++- configs/nyan-big_defconfig | 3 ++- configs/omapl138_lcdk_defconfig | 3 ++- configs/ot1200_defconfig | 3 ++- configs/ot1200_spl_defconfig | 3 ++- configs/p2371-0000_defconfig | 3 ++- configs/p2371-2180_defconfig | 3 ++- configs/p2571_defconfig | 3 ++- configs/pcm051_rev1_defconfig | 3 ++- configs/pcm051_rev3_defconfig | 3 ++- configs/peach-pi_defconfig | 3 ++- configs/peach-pit_defconfig | 3 ++- configs/porter_defconfig | 3 ++- configs/portl2_defconfig | 3 ++- configs/pr1_defconfig | 3 ++- configs/pxm2_defconfig | 3 ++- configs/qemu-x86_defconfig | 3 ++- configs/rastaban_defconfig | 3 ++- configs/riotboard_defconfig | 3 ++- configs/rut_defconfig | 3 ++- configs/sama5d2_xplained_mmc_defconfig | 3 ++- configs/sama5d2_xplained_spiflash_defconfig | 3 ++- configs/sama5d3xek_mmc_defconfig | 3 ++- configs/sama5d3xek_nandflash_defconfig | 3 ++- configs/sama5d3xek_spiflash_defconfig | 3 ++- configs/sama5d4_xplained_mmc_defconfig | 3 ++- configs/sama5d4_xplained_nandflash_defconfig | 3 ++- configs/sama5d4_xplained_spiflash_defconfig | 3 ++- configs/sama5d4ek_mmc_defconfig | 3 ++- configs/sama5d4ek_nandflash_defconfig | 3 ++- configs/sama5d4ek_spiflash_defconfig | 3 ++- configs/sh7752evb_defconfig | 3 ++- configs/sh7753evb_defconfig | 3 ++- configs/sh7757lcr_defconfig | 3 ++- configs/silk_defconfig | 3 ++- configs/smdk5250_defconfig | 3 ++- configs/smdk5420_defconfig | 3 ++- configs/snow_defconfig | 3 ++- configs/socfpga_arria5_defconfig | 3 ++- configs/socfpga_cyclone5_defconfig | 3 ++- configs/socfpga_sockit_defconfig | 3 ++- configs/socfpga_socrates_defconfig | 3 ++- configs/socfpga_sr1500_defconfig | 3 ++- configs/spring_defconfig | 3 ++- configs/stout_defconfig | 3 ++- configs/taurus_defconfig | 3 ++- configs/tec-ng_defconfig | 3 ++- configs/theadorable_debug_defconfig | 3 ++- configs/theadorable_defconfig | 3 ++- configs/thuban_defconfig | 3 ++- configs/tqma6q_mba6_mmc_defconfig | 3 ++- configs/tqma6q_mba6_spi_defconfig | 3 ++- configs/tqma6s_mba6_mmc_defconfig | 3 ++- configs/tqma6s_mba6_spi_defconfig | 3 ++- configs/trimslice_defconfig | 3 ++- configs/tseries_spi_defconfig | 3 ++- configs/venice2_defconfig | 3 ++- configs/vf610twr_defconfig | 3 ++- configs/vf610twr_nand_defconfig | 3 ++- configs/zynq_zc702_defconfig | 3 ++- configs/zynq_zc706_defconfig | 3 ++- configs/zynq_zc770_xm010_defconfig | 3 ++- configs/zynq_zc770_xm013_defconfig | 3 ++- configs/zynq_zed_defconfig | 3 ++- configs/zynq_zybo_defconfig | 3 ++- 448 files changed, 894 insertions(+), 454 deletions(-)
diff --git a/arch/Kconfig b/arch/Kconfig index 2c58b9a..4aa4dd5 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -113,7 +113,7 @@ config X86 select DM_SERIAL select DM_GPIO select DM_SPI - select DM_SPI_FLASH + select MTD
endchoice
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b26dddb..193e9bb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -120,7 +120,7 @@ config ARCH_MVEBU select DM_ETH select DM_SERIAL select DM_SPI - select DM_SPI_FLASH + select MTD select SPL_DM select SPL_DM_SEQ_ALIAS select SPL_OF_CONTROL @@ -220,7 +220,7 @@ config TARGET_STV0991 select DM select DM_SERIAL select DM_SPI - select DM_SPI_FLASH + select MTD select SPI_FLASH
config TARGET_X600 @@ -422,7 +422,7 @@ config ARCH_EXYNOS bool "Samsung EXYNOS" select CPU_V7 select DM - select DM_SPI_FLASH + select MTD select DM_SERIAL select DM_SPI select DM_GPIO @@ -511,7 +511,7 @@ config ARCH_SOCFPGA select OF_CONTROL select SPL_OF_CONTROL select DM - select DM_SPI_FLASH + select MTD select DM_SPI
config TARGET_CM_T43 diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index d3bddb7..a515a5c 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -32,7 +32,7 @@ config DM_SERIAL config DM_SPI default y
-config DM_SPI_FLASH +config MTD default y
config DM_I2C diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 0b2852c..48d2869 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -11,7 +11,7 @@ config TEGRA_COMMON select DM_PCI_COMPAT select DM_SERIAL select DM_SPI - select DM_SPI_FLASH + select MTD select OF_CONTROL
config TEGRA_ARMV7_COMMON diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index e50833a..65b8ec1 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index b53a1cf..f7c1010 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index 8308b95..937a475 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index a8f05db..f5145a9 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 1a61dc3..6fcde70 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index 0875ee7..676ab28 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index 11db5bc..2e36e14 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index 54ceec7..9d7079d 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 5e0e09b..9e8122a 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -5,7 +5,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 4f666f1..386625a 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -5,7 +5,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index ca90c83..73b5b75 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_BSC9131RDB=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index 2902a68..4b02146 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_BSC9131RDB=y CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index 15e3862..bea6d1f 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index 48f1c3c..a2b2239 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index b909789..7e6b12b 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 06b411d..9e6135e 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 6f37d36..711f801 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index 4993dc9..578c79a 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index d69047e..00e44c6 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index f9129ca..3c439f5 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index d11e9e3..b409876 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index 4c22ce6..bd45600 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index f350c34..06944d5 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index 1862f0c..8e41abd 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index 5173a5b..79f4352 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index a1a5cd3..0bdca24 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 14ed190..317a272 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index 6e5fbaf..c08faf5 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index bef3771..8e615d0 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 110e597..ada892c 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index de0beb6..6b431ad 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index d2d9262..688f007 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 373db16..11a2b4d 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index 711a411..9683bb9 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 05d20d6..7ca2611 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index 62cebda..b019b63 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index de73e30..eedee6c 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index 139811c..c8000a8 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index a3cf48b..184936b 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index ad29d52..fd827e3 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index 62cebda..b019b63 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index a9fe02f..62cf895 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index f10e86c..447a506 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index 3053514..f9d6f73 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index 9f70f7e..b9275b0 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index 8421393..ddba2d5 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index c630108..d3312c5 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index 4e8aee4..c3a4bb0 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" # CONFIG_CMD_LOADB is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index fdea51d..158f1cf 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index a7492fd..2664fb4 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index e2a4226..99e0e7b 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index c07b84a..56d8929 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index c533f97..b8e864b 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 8c0f763..cd34f7e 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index c09e73e..3fcc68b 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index 32580d8..d08fa95 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index d656b21..1733ed7 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index 7d31491..d6364ad 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 981d4db..06f570d 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index d49b5a7..43791a4 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index f638ff2..8c9516e 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index 8a4793d..e177b60 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index f00c54f..f58ece4 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 384d0e7..44d1049 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index 751cc54..448de8c 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index fc4afce..452fc30 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index 40e2f26..7c9fd9d 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 6321123..c51ff2e 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index 982f829..fdd5864 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 521a3d4..4e284d2 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index ac6ee07..6726b95 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index 2363aec..a10026b 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 875e4d5..fd3061b 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 51286af..2fcf134 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 47e249c..9aa22cd 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index aa68725..1487448 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index c07fa85..80dd1af 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 7a431b5..4c0cf13 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index d3d9e49..e83fc7e 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 256bdf4..9a57911 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1010RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 0ecaaff..44c35ff 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 32d3606..f1ea15a 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index da260a7..00cfedd 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 3fad0b9..2995195 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 09616da..e696b40 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 4ed2f7c..0ef8c4d 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 3a26800..136d221 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 734824e..e55ed00 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index c45b2a8..a1d4a9a 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index bdfc29e..d8be9f5 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 4ebcfea..8b542ca 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 3c97423..ae1045a 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index d6ec2ad..dfbc3f6 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index 9414eab..d985f56 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index 429d249..b96f05f 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index 236d67a..e97e77d 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index e1410b6..b62c17e 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 8950dcd..9e3325e 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index 8760a60..9c0989c 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index fd52fcf..3bfbbef 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index a57ab4a..1146a7d 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 0e68138..7490834 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 130b7cf..2034b28 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index 5646062..b769062 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index ef08a9e..ef32d4e 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 8ff94af..1258cc3 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index ecc48cc..1c8e115 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 40c6621..3cdb129 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index 3f96330..c0750b5 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index 05c06b6..6b0a537 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index ad081e5..d6c9000 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index 12158de..be92545 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index 3d13da9..8f36af9 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 453c057..98eaa1e 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 1c5e06a..5ec12ef 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index fc01fe6..2b75f71 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index 0a37298..bb9298e 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index fe21544..c5708f4 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 578bfc5..7b58c3c 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 19c795a..97e81c8 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index bdc5e43..9c9a08a 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index b9d4a47..9b7a861 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index ea9f830..c5a2122 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 997887d..27574fc 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index e547ea4..0d41a4b 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index fdad880..a53e3e2 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 540b79d..cd1b116 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index e879d94..4a1716e 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index 114fc32..b6cbfd2 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 6feec40..63ceb71 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index 45ba154..385dbd2 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 9a455ef..0d1e391 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index 783089b..8f5c5f6 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index d8fa407..7a5f479 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 385bcc8..fd2493a 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 5d463a2..4d82118 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 2c52861..7dbd063 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index 6925f99..5927d6e 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index b41254d..736692b 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 4a0a65d..4bbc2fb 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index 92e1c1d..b2c51a2 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index c503a70..61d94c6 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index f9b877b..94a7067 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 319f1c7..6e61dae 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 46b78bc..2422375 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 259371c..8d0c593 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index 2da6f48..ed7120b 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index aeb7949..a3a672b 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index ae06e9c..7f75f6d 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index 53a279e..b135471 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index e133570..cee5c88 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index 063e0f7..7481328 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 2c5f058..465abd3 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index d78bea0..177b570 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index ca1c87c..29aab4c 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 4c403b6..5947a02 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index 4c01789..d3776dc 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -1,7 +1,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index 4fe6af8..d38b567 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -5,7 +5,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 84febc5..4ab8e9c 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -5,7 +5,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index 8e355be..bb80746 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index b72fc86..6b2d137 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -5,7 +5,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index eb5d4ef..e0cf08b 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 5a30ab4..0a76b70 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index 39dc0a6..75f1fa1 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 4425bb2..cbdb291 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index 97e32ca..dbcf4c1 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index aa5dcde..b8c075f 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index beaac8b..b5ccdd7 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index 7bb2ea6..f435979 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 065e168..018ed40 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index ae4f8cf..0f2cf27 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index e24c91b..9cb7985 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 91aad61..90d87a7 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index d43ec06..9bce26c 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index e96c984..4b13d87 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index e90d39d..2e06c44 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 17f7585..401773e 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 0191a63..1b265bd 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index 6feecb3..39c19ea 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index 52b67c8..d28bf0f 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index d98b87a..63647c1 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index 56eb500..af808b3 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 74f22d2..332919a 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index a0f9f2d..8917e52 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index 7b19069..9d3e40e 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 3305e49..69aa05f 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index 8b7816d..d100627 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 8c77cda..0b59e8e 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 0a3b0f8..5bdee2e 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index f856f7d..42a88f4 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 307de29..93840b0 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 1549200..9f72d7d 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index fb229df..287d8a8 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 3743a1f..9eca40d 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index ce3e54e..ea9e6d2 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 18d3967..21203df 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index cdcfccf..5852e83 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index 2a11421..54e97b8 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 13f40b4..6717c09 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index a72830e..2149a42 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 6a50147..ca4c322 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index dc66fd3..b7651f4 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index ca842a4..e522290 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 3d2be66..16abd88 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index e2eead4..ae8b23e 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index fc61d1a..04de928 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index fe4a439..cade10d 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 4fbaf65..fd40952 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index 95720ee..506e217 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index bc2fc92..e49e0aa 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 57f327c..8d8a476 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 74a134e..180c897 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 85d48c3..305f01f 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 70f87d7..0d71fff 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 23ed67c..e8dd888 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index bf88846..742b663 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index dcb9ac8..da5dc55 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 42e6508..3d3238e 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index d87eb23..4bceb10 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 708374b..354fa48 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 4ee998b..e92ded1 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 6a3320a..02e8b85 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index 861ac5c..f871a74 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index 0adca74..915e5ba 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index 7d8e826..0516ca2 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 009ec04..7b3b470 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -3,7 +3,8 @@ CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 217471a..9315958 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -2,7 +2,8 @@ CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index a075bcc..ca2ad6d 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -6,7 +6,8 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press "<Esc>" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b" CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index c8da464..241718c 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -6,7 +6,8 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press "<Esc>" to stop\n" CONFIG_AUTOBOOT_STOP_STR="\x1b" CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index aaf6a99..7f61e4b 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_ALT=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 8803da5..eb1646e 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -13,6 +13,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_DFU_TFTP=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 060aa1c..7d0ab0b 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -18,7 +18,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 7753ab5..525a735 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -12,6 +12,7 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index bde7b8a..370ba52 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NAND" # CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 94dfb5a..420c6a2 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -5,6 +5,7 @@ CONFIG_NOR_BOOT=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 9757142..e6c1d6b 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SPI_BOOT" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index 0329948..da9a8c7 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NAND,SPL_USBETH_SUPPORT" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_gp_evm_defconfig b/configs/am335x_gp_evm_defconfig index 49461e2..94bc717 100644 --- a/configs/am335x_gp_evm_defconfig +++ b/configs/am335x_gp_evm_defconfig @@ -11,7 +11,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y diff --git a/configs/am437x_gp_evm_defconfig b/configs/am437x_gp_evm_defconfig index 1d79ba19..e68c752 100644 --- a/configs/am437x_gp_evm_defconfig +++ b/configs/am437x_gp_evm_defconfig @@ -14,7 +14,8 @@ CONFIG_CMD_GPIO=y CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am437x_sk_evm_defconfig b/configs/am437x_sk_evm_defconfig index 9eb41f9..3ffe224 100644 --- a/configs/am437x_sk_evm_defconfig +++ b/configs/am437x_sk_evm_defconfig @@ -14,12 +14,13 @@ CONFIG_CMD_GPIO=y CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_SPI_FLASH_BAR=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 1ba1c8b..f090426 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig index ff2acf0..dfcbe63 100644 --- a/configs/am43xx_evm_ethboot_defconfig +++ b/configs/am43xx_evm_ethboot_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_ETH_SUPPORT" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 095f4d0..f78dac7 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -5,7 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index be99599..5446b5a 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND,SPL_USB_HOST_SUPPORT" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index c5e4670..510b8d1 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_DM_MMC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SYS_NS16550=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index b83e7ea..89f02d1 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index cdad556..e6cccd5 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index 15fc3a9..a2dfb33 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 6f2390b..fb7d1d8 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -7,5 +7,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index ec16f34..c70568d 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 655c574..cf6bc9b 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 43b32d1..17d8643 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index 29fdf31..b759cfe 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 004ee25..5db48d1 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -9,5 +9,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index c574422..98e5b88 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -9,5 +9,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/atngw100_defconfig b/configs/atngw100_defconfig index 7ef4677..56ab790 100644 --- a/configs/atngw100_defconfig +++ b/configs/atngw100_defconfig @@ -10,5 +10,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/atngw100mkii_defconfig b/configs/atngw100mkii_defconfig index b552421..fa6e3f8 100644 --- a/configs/atngw100mkii_defconfig +++ b/configs/atngw100mkii_defconfig @@ -9,5 +9,6 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_XIMG is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 25e4570..3b16b91 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index 0879d1e..f9e0764 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -20,7 +20,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 8add08d..cad0862 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig index a8eab8c..a211b44 100644 --- a/configs/bf518f-ezbrd_defconfig +++ b/configs/bf518f-ezbrd_defconfig @@ -3,7 +3,8 @@ CONFIG_TARGET_BF518F_EZBRD=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf525-ucr2_defconfig b/configs/bf525-ucr2_defconfig index 15a8f1f..416ffc0 100644 --- a/configs/bf525-ucr2_defconfig +++ b/configs/bf525-ucr2_defconfig @@ -5,5 +5,6 @@ CONFIG_TARGET_BF525_UCR2=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig index a5f4b73..cf608cd 100644 --- a/configs/bf526-ezbrd_defconfig +++ b/configs/bf526-ezbrd_defconfig @@ -3,5 +3,6 @@ CONFIG_TARGET_BF526_EZBRD=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/bf527-ad7160-eval_defconfig b/configs/bf527-ad7160-eval_defconfig index 4751df4..7aaf740 100644 --- a/configs/bf527-ad7160-eval_defconfig +++ b/configs/bf527-ad7160-eval_defconfig @@ -5,6 +5,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig index 356ab64..ef8ae9e 100644 --- a/configs/bf527-ezkit-v2_defconfig +++ b/configs/bf527-ezkit-v2_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_BF527_EZKIT=y CONFIG_SYS_EXTRA_OPTIONS="BF527_EZKIT_REV_2_1" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_LIB_RAND=y diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig index c1b139c..478e21a 100644 --- a/configs/bf527-ezkit_defconfig +++ b/configs/bf527-ezkit_defconfig @@ -3,5 +3,6 @@ CONFIG_TARGET_BF527_EZKIT=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_NET_TFTP_VARS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig index 383f62e..34ee175 100644 --- a/configs/bf527-sdp_defconfig +++ b/configs/bf527-sdp_defconfig @@ -5,7 +5,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/bf537-minotaur_defconfig b/configs/bf537-minotaur_defconfig index bf3d79f..4ce5aed 100644 --- a/configs/bf537-minotaur_defconfig +++ b/configs/bf537-minotaur_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_PROMPT="minotaur> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/bf537-pnav_defconfig b/configs/bf537-pnav_defconfig index e737561..3df58d7 100644 --- a/configs/bf537-pnav_defconfig +++ b/configs/bf537-pnav_defconfig @@ -3,5 +3,6 @@ CONFIG_TARGET_BF537_PNAV=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/bf537-srv1_defconfig b/configs/bf537-srv1_defconfig index ba80e63..580bc83 100644 --- a/configs/bf537-srv1_defconfig +++ b/configs/bf537-srv1_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_PROMPT="srv1> " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig index 34c774c..2e21cc5 100644 --- a/configs/bf537-stamp_defconfig +++ b/configs/bf537-stamp_defconfig @@ -3,7 +3,8 @@ CONFIG_TARGET_BF537_STAMP=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig index eca4c85..d0b96ff 100644 --- a/configs/bf548-ezkit_defconfig +++ b/configs/bf548-ezkit_defconfig @@ -2,7 +2,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF548_EZKIT=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig index 4a25d2e..171de78 100644 --- a/configs/bf561-acvilon_defconfig +++ b/configs/bf561-acvilon_defconfig @@ -5,7 +5,8 @@ CONFIG_SYS_PROMPT="Acvilon> " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/bf609-ezkit_defconfig b/configs/bf609-ezkit_defconfig index 642ca87..f050eff 100644 --- a/configs/bf609-ezkit_defconfig +++ b/configs/bf609-ezkit_defconfig @@ -2,7 +2,8 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF609_EZKIT=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_MACRONIX=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 620d621..cfc5f75 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index d807ea5..13140e9 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index 2ed64f6..6ba399f 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/blackstamp_defconfig b/configs/blackstamp_defconfig index 944145a..0a2bd94 100644 --- a/configs/blackstamp_defconfig +++ b/configs/blackstamp_defconfig @@ -3,5 +3,6 @@ CONFIG_TARGET_BLACKSTAMP=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/blackvme_defconfig b/configs/blackvme_defconfig index 41b5a23..e941e42 100644 --- a/configs/blackvme_defconfig +++ b/configs/blackvme_defconfig @@ -3,5 +3,6 @@ CONFIG_TARGET_BLACKVME=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/br4_defconfig b/configs/br4_defconfig index effba78..ae39cbb 100644 --- a/configs/br4_defconfig +++ b/configs/br4_defconfig @@ -5,7 +5,8 @@ CONFIG_SYS_PROMPT="br4>" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index c9f565a..1e897f5 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 1cee7d4..553a001 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -27,7 +27,8 @@ CONFIG_SYS_I2C_INTEL=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index e4a3821..0b8ea6e 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -21,7 +21,8 @@ CONFIG_SYSCON=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 57d6a64..5d7b7fd 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -9,7 +9,8 @@ CONFIG_SPL=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 528251c..edc6556 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -17,7 +17,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index 3df602f..b615635 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD,DEVELOP" # CONFIG_CMD_FLASH is not set CONFIG_CMD_TPM=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index c30dfae..782b2ca 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD" # CONFIG_CMD_FLASH is not set CONFIG_CMD_TPM=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index fda0db2..b83f50c 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -11,7 +11,8 @@ CONFIG_CMD_BOOTSTAGE=y CONFIG_CMD_TPM=y CONFIG_CMD_TPM_TEST=y CONFIG_OF_CONTROL=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index 6bc4b8d..e36f308 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -18,7 +18,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index c962a61..ab28651 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index c253c38..a0a34c0 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 75f4eb6..550a33c 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -7,7 +7,8 @@ CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index d8c002f..d4e55eb 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_DA850EVM=y CONFIG_SYS_EXTRA_OPTIONS="MAC_ADDR_IN_SPIFLASH,USE_NOR,DIRECT_NOR_BOOT" CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index dc5077d..76ddc41 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 111f3a1..2c474c9 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -9,7 +9,8 @@ CONFIG_SPL=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 6dda2ae..5f9bc78 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -11,7 +11,8 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_SPL_OF_TRANSLATE=y CONFIG_NAND_PXA3XX=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig index 32d1dc1..1442d96 100644 --- a/configs/dra72_evm_defconfig +++ b/configs/dra72_evm_defconfig @@ -15,12 +15,13 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/dra74_evm_defconfig b/configs/dra74_evm_defconfig index 9946261..cecf443 100644 --- a/configs/dra74_evm_defconfig +++ b/configs/dra74_evm_defconfig @@ -13,13 +13,14 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 1be2f5b..39d8e91 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -9,7 +9,8 @@ CONFIG_SPL_STACK_R=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y diff --git a/configs/dra7xx_evm_qspiboot_defconfig b/configs/dra7xx_evm_qspiboot_defconfig index 4370b96..1d3e2f9 100644 --- a/configs/dra7xx_evm_qspiboot_defconfig +++ b/configs/dra7xx_evm_qspiboot_defconfig @@ -10,7 +10,8 @@ CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/dra7xx_evm_uart3_defconfig b/configs/dra7xx_evm_uart3_defconfig index 204483a..a31dfec 100644 --- a/configs/dra7xx_evm_uart3_defconfig +++ b/configs/dra7xx_evm_uart3_defconfig @@ -11,7 +11,8 @@ CONFIG_SYS_EXTRA_OPTIONS="SPL_YMODEM_SUPPORT" CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index f7174e6..b282f97 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 966fa9e..6ed3592 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -9,6 +9,7 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 4c3c1df..f43d358 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -8,7 +8,8 @@ CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig index db2d159..1741e6d 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -10,7 +10,8 @@ CONFIG_SYS_PROMPT="Tegra210 (E2220-1170) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index 6fe19c7..27ef793 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_PROMPT="ea20 > " # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index 04d8611..b3d4f82 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_BDI is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index 925d3ee..eaf0912 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -14,7 +14,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 01aa817..23b1617 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_GOSE=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index d2c5e6a..e1285bf 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_GPLUGD=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 2d03974..ca9eaba 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig index e2aa906..00160eb 100644 --- a/configs/ip04_defconfig +++ b/configs/ip04_defconfig @@ -5,7 +5,8 @@ CONFIG_TARGET_IP04=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index efc4aee..7937904 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 9fb9dac..33dd747 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="K2E EVM # " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index 7bdf7a4..b1198be 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -9,6 +9,7 @@ CONFIG_SPL=y # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 940d483..c3b426e 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="K2HK EVM # " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 1b21ed0..84ebcca 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="K2L EVM # " # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index d2625e5..318731e 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 4db809e..aed8114 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 98b1c10..007a765 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index b4371ff..19b51a2 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_KMP204X=y CONFIG_SYS_EXTRA_OPTIONS="KMCOGE4" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 0b4fee1..6946003 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig index bf55746..08d170a 100644 --- a/configs/kmlion1_defconfig +++ b/configs/kmlion1_defconfig @@ -4,7 +4,8 @@ CONFIG_TARGET_KMP204X=y CONFIG_SYS_EXTRA_OPTIONS="KMLION1" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 13a3187..525e98c 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index 0f4c51b..d3d8e6e 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index 0c27f17..b6e5fa4 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index fc8a567..521a937 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_KOELSCH=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 77f1fb3..95f030f 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_LAGER=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index d7c7e4c..f62a5f6 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -7,7 +7,8 @@ CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 453a3bb..97bcd95 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -6,7 +6,8 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPL_FSL_PBL,SD_BOOT,SD_BOOT_QSPI" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_NETDEVICES=y diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index f7113c5..bd18d46 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 21d6407..97f0f70 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -6,5 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-lpuart" CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4,LPUART" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_FSL_LPUART=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 8d4370f..4153a1f 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index bc76996..029b851 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -4,5 +4,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index cb076c9..04655e3 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -5,5 +5,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SYS_NS16550=y CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 0409e33..f263517 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index 09fb1ed..cf77f53 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -6,5 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-qds-duart" CONFIG_SYS_NS16550=y CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index d9d6c97..4004435 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y \ No newline at end of file diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index 8622ce7..aad386f 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index c4f5f60..ccb50b1 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index 6c7eda3..1eba8fd 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_NS16550=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" CONFIG_OF_CONTROL=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_SPI=y diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 6ac09ce..441f405 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" # CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 1b30114..8d02762 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y # CONFIG_SYS_MALLOC_F is not set CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2080A" # CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085aqds_defconfig b/configs/ls2085aqds_defconfig index b4a1d8c..92d8c30 100644 --- a/configs/ls2085aqds_defconfig +++ b/configs/ls2085aqds_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080AQDS=y # CONFIG_SYS_MALLOC_F is not set CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A" # CONFIG_CMD_SETEXPR is not set diff --git a/configs/ls2085ardb_defconfig b/configs/ls2085ardb_defconfig index 0f514ca..55cee8f 100644 --- a/configs/ls2085ardb_defconfig +++ b/configs/ls2085ardb_defconfig @@ -2,7 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080ARDB=y # CONFIG_SYS_MALLOC_F is not set CONFIG_DM_SPI=y -CONFIG_DM_SPI_FLASH=y +CONFIG_MTD=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4, LS2085A" # CONFIG_CMD_SETEXPR is not set diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 7264c2d..f5b43e0 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 62acb40..41ff59d 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="LSXHL" # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig index 9da42eb..bf8b425 100644 --- a/configs/m28evk_defconfig +++ b/configs/m28evk_defconfig @@ -4,5 +4,6 @@ CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index 8495800..e03d1ba 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 200c7a0..5fb993d 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -8,7 +8,8 @@ CONFIG_SPL=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index 965972a..c774b40 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index af6a8ec..5055953 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -19,7 +19,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index dcabd7b..bb90ded 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_M # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index d7f0706..9433434 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index f4ace44..1f3f169 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 976ebc2..40c0302 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index 40d82ca..f0d362b 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6 # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index b2cf924..c60ec3a 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6qpsabreauto_defconfig b/configs/mx6qpsabreauto_defconfig index c44cd8f..0529fb1 100644 --- a/configs/mx6qpsabreauto_defconfig +++ b/configs/mx6qpsabreauto_defconfig @@ -3,5 +3,6 @@ CONFIG_ARCH_MX6=y CONFIG_TARGET_MX6QSABREAUTO=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6qp.cfg,MX6Q" CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 67b9e10..8cf7d46 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg, # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index 8736e31..ff2cc51 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 63187b3..6f47b7b 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128 # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index d047309..1850cd3 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 5eca5e9..6cea2e0 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index caf0335..40de0ca 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6slevk/imximage.cfg,MX6SL CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 2603927..56b88ac 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6SL" CONFIG_CMD_GPIO=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index d9e35df..4dd2f8f 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabreauto/imximage.cfg # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index 953a246..e248f0e 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sxsabresd/imximage.cfg,M # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y diff --git a/configs/mx6sxsabresd_spl_defconfig b/configs/mx6sxsabresd_spl_defconfig index 3843f99..b216759 100644 --- a/configs/mx6sxsabresd_spl_defconfig +++ b/configs/mx6sxsabresd_spl_defconfig @@ -7,4 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6SX" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 87f4f92..5d7b7c7 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 2e2ee35..97454f3 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index d336ef3..c2d223b 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 667da1b..c639212 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 949f680..ff19c5d 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index 281292d..bdd3830 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 5ae77e3..0b61988 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,M # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index e5c7824..434cdb1 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg, # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index e2a1242..0d4b14b 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 3d38c08..84da2e0 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg, # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 9b44758..2bdd51d 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -5,5 +5,6 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index ca0f9e0..fc29407 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -18,7 +18,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 7c2d6c8..63b7243 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index a1ecf06..c624dc4 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -5,7 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg, # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 5d44d7d..8b1daea 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -6,7 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index a7315ce..1fc8143 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -11,7 +11,8 @@ CONFIG_SYS_PROMPT="Tegra210 (P2371-0000) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index c41f322..6b4e6ed 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -11,7 +11,8 @@ CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index e6de2da..ee2f355 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -11,7 +11,8 @@ CONFIG_SYS_PROMPT="Tegra210 (P2571) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index ce7c4bb..8adb114 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="REV1" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 7c2dee4..1a452bb 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="REV3" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 65c6044..2c2bd45 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -20,7 +20,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 272988f..6634387 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -20,7 +20,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 44f2387..52036a9 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_PORTER=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 0efc4c6..9ce9a3e 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -4,6 +4,7 @@ CONFIG_TARGET_KM_KIRKWOOD=y CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/pr1_defconfig b/configs/pr1_defconfig index c813502..2f92389 100644 --- a/configs/pr1_defconfig +++ b/configs/pr1_defconfig @@ -5,7 +5,8 @@ CONFIG_SYS_PROMPT="pr1>" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index 02984ed..b270e4e 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index b0c935c..6d3c4af 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -14,7 +14,8 @@ CONFIG_BOOTSTAGE_REPORT=y CONFIG_CMD_BOOTSTAGE=y CONFIG_OF_CONTROL=y CONFIG_CPU=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index a1403fb..7b32177 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index 3cf82c3..f8e43ab 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg, # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y CONFIG_DM=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 4c1fd4b..cfb9d61 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index 75b1713..6836925 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -9,4 +9,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC" # CONFIG_CMD_FLASH is not set CONFIG_CMD_SF=y # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 6d61a7e..50d9a12 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -9,4 +9,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_SERIALFLASH" # CONFIG_CMD_FLASH is not set CONFIG_CMD_SF=y # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 644b150..72796db 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 1e42880..b84ba0f 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 724b55b..623680d 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -6,5 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" # CONFIG_CMD_IMI is not set # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 3daac36..db69bdb 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index e3517e8..1faf841 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 1cdb9bc..9af4b41 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index a75705a..7f307ac 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 346a890..549d70d 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index efba861..d8fb502 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -8,5 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" # CONFIG_CMD_LOADS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index 4c8883b..5754fe5 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -17,7 +17,8 @@ CONFIG_TARGET_SH7752EVB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index 9992cff..ae46a8f 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -16,7 +16,8 @@ CONFIG_TARGET_SH7753EVB=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 54d6436..51f9061 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_SH7757LCR=y # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 836beff..343ee9f 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_SILK=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index b0dec29..b08a266 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -12,7 +12,8 @@ CONFIG_CMD_SOUND=y CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_DM_I2C_COMPAT=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 50148fc..3dde244 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -9,7 +9,8 @@ CONFIG_SYS_PROMPT="SMDK5420 # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_DM_I2C_COMPAT=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 3d8081b..93150ef 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -21,7 +21,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 6e8976f..40d46f8 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -14,7 +14,8 @@ CONFIG_SPL_STACK_R=y CONFIG_CMD_GPIO=y CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index e31aa71..5db6c42 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -14,7 +14,8 @@ CONFIG_SPL_STACK_R=y CONFIG_CMD_GPIO=y CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 59fbb2c..d6d5a81 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -14,7 +14,8 @@ CONFIG_SPL_STACK_R=y CONFIG_CMD_GPIO=y CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index aaba8cb..937a66b 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -14,7 +14,8 @@ CONFIG_SPL_STACK_R=y CONFIG_CMD_GPIO=y CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DM_ETH=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index a4f0835..2f104e7 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -13,7 +13,8 @@ CONFIG_SPL_STACK_R_ADDR=0x00800000 # CONFIG_CMD_FLASH is not set CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 11cb6e3..37a3250 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -21,7 +21,8 @@ CONFIG_CROS_EC_KEYB=y CONFIG_CMD_CROS_EC=y CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_DM_PMIC=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index d353495..bc502e7 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_STOUT=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_MISC is not set CONFIG_SH_SDHI=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 3f08cc1..40e1d55 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SOURCE is not set # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 3d10fd0..1bf50b9 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA20_SLINK=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index fbed23c..4e38380 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -13,7 +13,8 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig index cce4669..c87de72 100644 --- a/configs/theadorable_defconfig +++ b/configs/theadorable_defconfig @@ -13,7 +13,8 @@ CONFIG_CMD_SF=y # CONFIG_CMD_NET is not set # CONFIG_CMD_NFS is not set CONFIG_SPL_OF_TRANSLATE=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index 13aade6..d1e1eb3 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -9,6 +9,7 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b\x1b" # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index cdc51c0..99d704e 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -4,5 +4,6 @@ CONFIG_TARGET_TQMA6=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index 1408be3..d14e841 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -5,5 +5,6 @@ CONFIG_TQMA6X_SPI_BOOT=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 4e5428b..387e9b4 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -5,5 +5,6 @@ CONFIG_TQMA6S=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 04740ec..0a4c4f6 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -6,5 +6,6 @@ CONFIG_TQMA6X_SPI_BOOT=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index e34faa3..0136342 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig index 11e4e6b..0354ae6 100644 --- a/configs/tseries_spi_defconfig +++ b/configs/tseries_spi_defconfig @@ -16,6 +16,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 05f6bc4..b40cbbc 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -12,7 +12,8 @@ CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_NFS is not set -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/vf610twr_defconfig b/configs/vf610twr_defconfig index d959293..6a9d549 100644 --- a/configs/vf610twr_defconfig +++ b/configs/vf610twr_defconfig @@ -12,5 +12,6 @@ CONFIG_DM=y CONFIG_VYBRID_GPIO=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_FSL_LPUART=y diff --git a/configs/vf610twr_nand_defconfig b/configs/vf610twr_nand_defconfig index b6a96f2..40a848a 100644 --- a/configs/vf610twr_nand_defconfig +++ b/configs/vf610twr_nand_defconfig @@ -12,5 +12,6 @@ CONFIG_DM=y CONFIG_VYBRID_GPIO=y CONFIG_NAND_VF610_NFC=y CONFIG_SYS_NAND_BUSWIDTH_16BIT=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_FSL_LPUART=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 3540653..2de47e8 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -12,7 +12,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index f333b7a..58ecda9 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -13,7 +13,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index ebfdeb0..c272beb 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -14,7 +14,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 9672940..382ef8f 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -14,6 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 5868012..f5c5167 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -13,7 +13,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index ebaae49..5bc9278 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -13,7 +13,8 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y

Replace legacy CONFIG_SPI_FLASH with CONFIG_MTD_SPI_NOR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- board/davinci/da8xxevm/da850evm.c | 2 +- common/splash_source.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index 356d3ce..7a2b8e0 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -234,7 +234,7 @@ const struct pinmux_resource pinmuxes[] = { PINMUX_ITEM(emac_pins_mii), #endif #endif -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR PINMUX_ITEM(spi1_pins_base), PINMUX_ITEM(spi1_pins_scs0), #endif diff --git a/common/splash_source.c b/common/splash_source.c index 3393f73..505fa2a 100644 --- a/common/splash_source.c +++ b/common/splash_source.c @@ -19,7 +19,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR static spi_flash_t *sf; static int splash_sf_read_raw(u32 bmp_load_addr, int offset, size_t read_size) {

for conditional construct CONFIG_SPI_FLASH => CONFIG_MTD_SPI_NOR
for defines replace CONFIG_SPI_FLASH => CONFIG_MTD_M25P80 and CONFIG_MTD_SPI_NOR
c: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- board/davinci/ea20/ea20.c | 2 +- include/configs/MPC8536DS.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/UCP1020.h | 4 ++-- include/configs/bfin_adi_common.h | 2 +- include/configs/cgtqmx6eval.h | 3 ++- include/configs/cm_t43.h | 6 ++++-- include/configs/dreamplug.h | 2 +- include/configs/exynos5-common.h | 2 +- include/configs/gw_ventana.h | 10 +++++----- include/configs/ls2080aqds.h | 3 ++- include/configs/ls2080ardb.h | 3 ++- include/configs/lsxl.h | 2 +- include/configs/mx6ul_14x14_evk.h | 3 ++- include/configs/mx7dsabresd.h | 3 ++- include/configs/p1_p2_rdb_pc.h | 2 +- include/configs/pcm052.h | 3 ++- include/configs/rk3036_common.h | 2 +- include/configs/rk3288_common.h | 2 +- include/configs/tegra-common-usb-gadget.h | 2 +- 21 files changed, 35 insertions(+), 27 deletions(-)
diff --git a/board/davinci/ea20/ea20.c b/board/davinci/ea20/ea20.c index 66804d7..ef72d6b 100644 --- a/board/davinci/ea20/ea20.c +++ b/board/davinci/ea20/ea20.c @@ -160,7 +160,7 @@ const struct pinmux_config halten_pin[] = { };
static const struct pinmux_resource pinmuxes[] = { -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR PINMUX_ITEM(spi1_pins), #endif PINMUX_ITEM(uart_pins), diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 294be3b..2df74a9 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -420,7 +420,7 @@ */ #define CONFIG_HARD_SPI
-#if defined(CONFIG_SPI_FLASH) +#if defined(CONFIG_MTD_SPI_NOR) #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index a56208c..2acf079 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -549,7 +549,7 @@ unsigned long get_board_ddr_clk(void); /* * eSPI - Enhanced SPI */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #ifndef CONFIG_SPL_BUILD #endif
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index b5290a1..3b9f2f7 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -503,7 +503,7 @@ unsigned long get_board_ddr_clk(void); /* * eSPI - Enhanced SPI */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_SPI_FLASH_BAR #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h index 2354009..934d7d1 100644 --- a/include/configs/UCP1020.h +++ b/include/configs/UCP1020.h @@ -45,7 +45,7 @@ #define CONFIG_NETMASK 255.255.252.0 #define CONFIG_ETHPRIME "eTSEC3"
-#ifndef CONFIG_SPI_FLASH +#ifndef CONFIG_MTD_SPI_NOR #endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
@@ -86,7 +86,7 @@ #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_ETHPRIME "eTSEC1"
-#ifndef CONFIG_SPI_FLASH +#ifndef CONFIG_MTD_SPI_NOR #endif #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 9c537e0..fb9d5bf 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -64,7 +64,7 @@ # if defined(CONFIG_BFIN_SPI) || defined(CONFIG_SOFT_SPI) # define CONFIG_CMD_SPI # endif -# ifdef CONFIG_SPI_FLASH +# ifdef CONFIG_MTD_SPI_NOR # define CONFIG_CMD_SF # endif # if defined(CONFIG_SYS_I2C) || defined(CONFIG_SYS_I2C_SOFT) diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 487c011..9dd883f 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -42,7 +42,8 @@
/* SPI NOR */ #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index d3cd38d..a4cd470 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -68,9 +68,11 @@ #define CONFIG_AM437X_USB2PHY2_HOST
/* SPI Flash support */ -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define CONFIG_TI_SPI_MMAP -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80_BAR #define CONFIG_SF_DEFAULT_SPEED 48000000 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index 0b7d89b..a9e1219 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -51,7 +51,7 @@ /* * Environment variables configurations */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_ENV_IS_IN_SPI_FLASH 1 #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64k */ #else diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 9c3ea88..d9a4584 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -128,7 +128,7 @@ #define CONFIG_I2C_EDID
/* SPI */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b7b9c78..01db2ec 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -62,7 +62,7 @@ #define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART2_BASE
-#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR
/* SPI */ #define CONFIG_CMD_SF @@ -95,7 +95,7 @@ #define CONFIG_APBH_DMA_BURST8 #endif
-#endif /* CONFIG_SPI_FLASH */ +#endif /* CONFIG_MTD_SPI_NOR */
/* Flattened Image Tree Suport */ #define CONFIG_FIT @@ -254,7 +254,7 @@ #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define MTDIDS_DEFAULT "nor0=nor" #define MTDPARTS_DEFAULT \ "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" @@ -264,7 +264,7 @@ #endif
/* Persistent Environment Config */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_ENV_IS_IN_SPI_FLASH #else #define CONFIG_ENV_IS_IN_NAND @@ -370,7 +370,7 @@ "fi; " \ "fi\0"
-#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_EXTRA_ENV_SETTINGS_COMMON \ "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h index a402c06..81eb7a4 100644 --- a/include/configs/ls2080aqds.h +++ b/include/configs/ls2080aqds.h @@ -284,7 +284,8 @@ unsigned long get_board_ddr_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #endif
/* diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index 116dbcd..a0c808e 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -257,7 +257,8 @@ unsigned long get_board_sys_clk(void); /* SPI */ #ifdef CONFIG_FSL_DSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define CONFIG_SPI_FLASH_BAR #endif
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 19ee5bc..a5ea845 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -89,7 +89,7 @@ /* * Environment variables configurations */ -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 8 #define CONFIG_ENV_IS_IN_SPI_FLASH 1 diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 4374c3a..861715a 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -197,7 +197,8 @@
#ifdef CONFIG_FSL_QSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define CONFIG_SPI_FLASH_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index d23e4f3..4db5f76 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -263,7 +263,8 @@
#ifdef CONFIG_FSL_QSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define CONFIG_SPI_FLASH_MACRONIX #define CONFIG_SPI_FLASH_BAR #define CONFIG_SF_DEFAULT_BUS 0 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 60bedaa..4c6eedd 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -709,7 +709,7 @@ */ #define CONFIG_HARD_SPI
-#if defined(CONFIG_SPI_FLASH) +#if defined(CONFIG_MTD_SPI_NOR) #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h index 9d80306..eb6130d 100644 --- a/include/configs/pcm052.h +++ b/include/configs/pcm052.h @@ -98,7 +98,8 @@
#ifdef CONFIG_FSL_QSPI #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR +#define CONFIG_MTD_M25P80 #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 #define CONFIG_SYS_FSL_QSPI_LE diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 368d046..c38d0e2 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -66,7 +66,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (512UL << 20UL)
-#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR #define CONFIG_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SPI diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 427ac4b..550b6d9 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -87,7 +87,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define SDRAM_BANK_SIZE (2UL << 30)
-#define CONFIG_SPI_FLASH +#define CONFIG_MTD_SPI_NOR #define CONFIG_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SPI diff --git a/include/configs/tegra-common-usb-gadget.h b/include/configs/tegra-common-usb-gadget.h index f6e1d5c..30e6f9c 100644 --- a/include/configs/tegra-common-usb-gadget.h +++ b/include/configs/tegra-common-usb-gadget.h @@ -36,7 +36,7 @@ #ifdef CONFIG_MMC #define CONFIG_DFU_MMC #endif -#ifdef CONFIG_SPI_FLASH +#ifdef CONFIG_MTD_SPI_NOR #define CONFIG_DFU_SF #endif #define CONFIG_DFU_RAM

CONFIG_SPI_FLASH_BAR => CONFIG_SPI_NOR_BAR
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/alt_defconfig | 2 +- configs/am437x_sk_evm_defconfig | 2 +- configs/am43xx_evm_defconfig | 2 +- configs/am57xx_evm_defconfig | 2 +- configs/bg0900_defconfig | 2 +- configs/dra72_evm_defconfig | 2 +- configs/dra74_evm_defconfig | 2 +- configs/dra7xx_evm_defconfig | 2 +- configs/ds414_defconfig | 2 +- configs/gose_defconfig | 2 +- configs/koelsch_defconfig | 2 +- configs/lager_defconfig | 2 +- configs/maxbcm_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/mx6sxsabresd_defconfig | 2 +- configs/porter_defconfig | 2 +- configs/silk_defconfig | 2 +- configs/stout_defconfig | 2 +- configs/zynq_zc702_defconfig | 2 +- configs/zynq_zc706_defconfig | 2 +- configs/zynq_zc770_xm010_defconfig | 2 +- configs/zynq_zc770_xm013_defconfig | 2 +- configs/zynq_zed_defconfig | 2 +- doc/SPI/README.ti_qspi_dra_test | 2 +- drivers/spi/fsl_qspi.c | 18 +++++++++--------- include/configs/T102xQDS.h | 2 +- include/configs/T102xRDB.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/gw_ventana.h | 2 +- include/configs/km/kmp204x-common.h | 2 +- include/configs/ls2080ardb.h | 2 +- include/configs/mx6ul_14x14_evk.h | 2 +- include/configs/mx7dsabresd.h | 2 +- include/configs/socfpga_common.h | 4 ++-- include/linux/mtd/spi-nor.h | 2 +- 37 files changed, 46 insertions(+), 46 deletions(-)
diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 7f61e4b..2fd873c 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_ALT=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/am437x_sk_evm_defconfig b/configs/am437x_sk_evm_defconfig index 3ffe224..f077f70 100644 --- a/configs/am437x_sk_evm_defconfig +++ b/configs/am437x_sk_evm_defconfig @@ -21,6 +21,6 @@ CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y CONFIG_MTD=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_TIMER=y CONFIG_OMAP_TIMER=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index f090426..73b16ac 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -8,7 +8,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 510b8d1..68b7278 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -18,5 +18,5 @@ CONFIG_DM=y CONFIG_DM_MMC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SYS_NS16550=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index cfc5f75..6cd2692 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -6,5 +6,5 @@ CONFIG_SPL=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig index 1442d96..46e5692 100644 --- a/configs/dra72_evm_defconfig +++ b/configs/dra72_evm_defconfig @@ -17,7 +17,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/dra74_evm_defconfig b/configs/dra74_evm_defconfig index cecf443..a096dd2 100644 --- a/configs/dra74_evm_defconfig +++ b/configs/dra74_evm_defconfig @@ -15,7 +15,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 39d8e91..56f362a 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index f43d358..a4ccc52 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 23b1617..040cbaa 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_GOSE=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 521a937..5bae9b4 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_KOELSCH=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 95f030f..ada450d 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_LAGER=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 5fb993d..03ab40e 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -10,7 +10,7 @@ CONFIG_SPL=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 4dd2f8f..3616c82 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_STMICRO=y diff --git a/configs/mx6sxsabresd_defconfig b/configs/mx6sxsabresd_defconfig index e248f0e..5f8adba 100644 --- a/configs/mx6sxsabresd_defconfig +++ b/configs/mx6sxsabresd_defconfig @@ -8,4 +8,4 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 52036a9..7fff267 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_PORTER=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 343ee9f..82f9034 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_SILK=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index bc502e7..7572ade 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_STOUT=y CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 2de47e8..8c96a2e 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -14,7 +14,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index 58ecda9..ce9a2ef 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -15,7 +15,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index c272beb..f45b043 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -16,7 +16,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 382ef8f..63199af 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -16,5 +16,5 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_ZYNQ_GEM=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index f5c5167..d7eb77d 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -15,7 +15,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_NOR_BAR=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/doc/SPI/README.ti_qspi_dra_test b/doc/SPI/README.ti_qspi_dra_test index fe37857..bff1be1 100644 --- a/doc/SPI/README.ti_qspi_dra_test +++ b/doc/SPI/README.ti_qspi_dra_test @@ -22,7 +22,7 @@ Commands to erase/write u-boot/mlo to flash device -------------------------------------------------- U-Boot# sf probe 0 SF: Detected S25FL256S_64K with page size 256 Bytes, erase size 64 KiB, total 32 MiB, mapped at 5c000000 -SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_FLASH_BAR +SF: Warning - Only lower 16MiB accessible, Full access #define CONFIG_SPI_NOR_BAR U-Boot# sf erase 0 0x10000 SF: 65536 bytes @ 0x0 Erased: OK U-Boot# sf erase 0x20000 0x10000 diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index cb8d929..1c4cb72 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -38,7 +38,7 @@ DECLARE_GLOBAL_DATA_PTR; #define SEQID_PP 6 #define SEQID_RDID 7 #define SEQID_BE_4K 8 -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR #define SEQID_BRRD 9 #define SEQID_BRWR 10 #define SEQID_RDEAR 11 @@ -178,7 +178,7 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
/* Fast Read */ lut_base = SEQID_FAST_READ * 4; -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR qspi_write32(priv->flags, ®s->lut[lut_base], OPRND0(QSPI_CMD_FAST_READ) | PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) | @@ -214,7 +214,7 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
/* Erase a sector */ lut_base = SEQID_SE * 4; -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR qspi_write32(priv->flags, ®s->lut[lut_base], OPRND0(QSPI_CMD_SE) | PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) | PAD1(LUT_PAD1) | INSTR1(LUT_ADDR)); @@ -245,7 +245,7 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv)
/* Page Program */ lut_base = SEQID_PP * 4; -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR qspi_write32(priv->flags, ®s->lut[lut_base], OPRND0(QSPI_CMD_PP) | PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) | PAD1(LUT_PAD1) | INSTR1(LUT_ADDR)); @@ -291,7 +291,7 @@ static void qspi_set_lut(struct fsl_qspi_priv *priv) PAD0(LUT_PAD1) | INSTR0(LUT_CMD) | OPRND1(ADDR24BIT) | PAD1(LUT_PAD1) | INSTR1(LUT_ADDR));
-#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR /* * BRRD BRWR RDEAR WREAR are all supported, because it is hard to * dynamically check whether to set BRRD BRWR or RDEAR WREAR during @@ -430,7 +430,7 @@ static void qspi_init_ahb_read(struct fsl_qspi_priv *priv) } #endif
-#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR /* Bank register read/write, EAR register read/write */ static void qspi_op_rdbank(struct fsl_qspi_priv *priv, u8 *rxbuf, u32 len) { @@ -601,7 +601,7 @@ static void qspi_op_write(struct fsl_qspi_priv *priv, u8 *txbuf, u32 len)
/* Default is page programming */ seqid = SEQID_PP; -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR if (priv->cur_seqid == QSPI_CMD_BRWR) seqid = SEQID_BRWR; else if (priv->cur_seqid == QSPI_CMD_WREAR) @@ -735,7 +735,7 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen, wr_sfaddr = swab32(txbuf) & OFFSET_BITS_MASK; } else if ((priv->cur_seqid == QSPI_CMD_BRWR) || (priv->cur_seqid == QSPI_CMD_WREAR)) { -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR wr_sfaddr = 0; #endif } @@ -752,7 +752,7 @@ int qspi_xfer(struct fsl_qspi_priv *priv, unsigned int bitlen, qspi_op_rdid(priv, din, bytes); else if (priv->cur_seqid == QSPI_CMD_RDSR) qspi_op_rdsr(priv, din, bytes); -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR else if ((priv->cur_seqid == QSPI_CMD_BRRD) || (priv->cur_seqid == QSPI_CMD_RDEAR)) { priv->sf_addr = 0; diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index e5df784..d446309 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -583,7 +583,7 @@ unsigned long get_board_ddr_clk(void); #ifndef CONFIG_SPL_BUILD #endif #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 3cda3b1..01424ce 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -573,7 +573,7 @@ unsigned long get_board_ddr_clk(void); #elif defined(CONFIG_T1023RDB) #endif #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 5fc3497..34ba4a4 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -537,7 +537,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg /* * eSPI - Enhanced SPI */ -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 2acf079..26bbb74 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -554,7 +554,7 @@ unsigned long get_board_ddr_clk(void); #endif
#define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 #endif diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 3b9f2f7..2857c6a 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -504,7 +504,7 @@ unsigned long get_board_ddr_clk(void); * eSPI - Enhanced SPI */ #ifdef CONFIG_MTD_SPI_NOR -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 01db2ec..2f15876 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -69,7 +69,7 @@ #ifdef CONFIG_CMD_SF #define CONFIG_MXC_SPI #define CONFIG_SPI_FLASH_MTD - #define CONFIG_SPI_FLASH_BAR + #define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 /* GPIO 3-19 (21248) */ diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 6860ad2..612020d 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -296,7 +296,7 @@ int get_scl(void); /* * eSPI - Enhanced SPI */ -#define CONFIG_SPI_FLASH_BAR /* 4 byte-addressing */ +#define CONFIG_SPI_NOR_BAR /* 4 byte-addressing */ #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE 0 diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h index a0c808e..2b00ba2 100644 --- a/include/configs/ls2080ardb.h +++ b/include/configs/ls2080ardb.h @@ -259,7 +259,7 @@ unsigned long get_board_sys_clk(void); #define CONFIG_CMD_SF #define CONFIG_MTD_SPI_NOR #define CONFIG_MTD_M25P80 -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #endif
/* diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 861715a..34c0989 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -199,7 +199,7 @@ #define CONFIG_CMD_SF #define CONFIG_MTD_SPI_NOR #define CONFIG_MTD_M25P80 -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 4db5f76..a8248ac 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -266,7 +266,7 @@ #define CONFIG_MTD_SPI_NOR #define CONFIG_MTD_M25P80 #define CONFIG_SPI_FLASH_MACRONIX -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 8de0ab9..a1a3a09 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -92,7 +92,7 @@ #define CONFIG_CMD_SPI #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 30000000 -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR /* * The base address is configurable in QSys, each board must specify the * base address based on it's particular FPGA configuration. Please note @@ -218,7 +218,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #define CONFIG_CQSPI_DECODER 0 #define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_BAR +#define CONFIG_SPI_NOR_BAR
/* * Designware SPI support diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index fb32c9f..daa4a5f 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -205,7 +205,7 @@ struct spi_nor { u8 read_opcode; u8 read_dummy; u8 program_opcode; -#ifdef CONFIG_SPI_FLASH_BAR +#ifdef CONFIG_SPI_NOR_BAR u8 bar_read_opcode; u8 bar_program_opcode; u8 bank_curr;

- CONFIG_SPI_FLASH_MACRONIX => CONFIG_SPI_NOR_MACRONIX - CONFIG_SPI_FLASH_STMICRO => CONFIG_SPI_NOR_STMICRO - CONFIG_SPI_FLASH_SPANSION => CONFIG_SPI_NOR_SPANSION - CONFIG_SPI_FLASH_SST => CONFIG_SPI_NOR_SST - CONFIG_SPI_FLASH_WINBOND => CONFIG_SPI_NOR_WINBOND
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/B4420QDS_NAND_defconfig | 2 +- configs/B4420QDS_SPIFLASH_defconfig | 2 +- configs/B4420QDS_defconfig | 2 +- configs/B4860QDS_NAND_defconfig | 2 +- configs/B4860QDS_SECURE_BOOT_defconfig | 2 +- configs/B4860QDS_SPIFLASH_defconfig | 2 +- configs/B4860QDS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/B4860QDS_defconfig | 2 +- configs/BSC9131RDB_NAND_SYSCLK100_defconfig | 2 +- configs/BSC9131RDB_NAND_defconfig | 2 +- configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig | 2 +- configs/BSC9131RDB_SPIFLASH_defconfig | 2 +- configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig | 2 +- configs/BSC9132QDS_NAND_DDRCLK100_defconfig | 2 +- configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig | 2 +- configs/BSC9132QDS_NAND_DDRCLK133_defconfig | 2 +- configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig | 2 +- configs/BSC9132QDS_NOR_DDRCLK100_defconfig | 2 +- configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig | 2 +- configs/BSC9132QDS_NOR_DDRCLK133_defconfig | 2 +- .../BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig | 2 +- configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig | 2 +- .../BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig | 2 +- configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig | 2 +- .../BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig | 2 +- configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig | 2 +- .../BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig | 2 +- configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig | 2 +- configs/C29XPCIE_NAND_defconfig | 2 +- configs/C29XPCIE_NOR_SECBOOT_defconfig | 2 +- configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 2 +- configs/C29XPCIE_SPIFLASH_defconfig | 2 +- configs/C29XPCIE_defconfig | 2 +- configs/M52277EVB_defconfig | 2 +- configs/M52277EVB_stmicro_defconfig | 2 +- configs/M54451EVB_defconfig | 2 +- configs/M54451EVB_stmicro_defconfig | 2 +- configs/M54455EVB_a66_defconfig | 2 +- configs/M54455EVB_defconfig | 2 +- configs/M54455EVB_i66_defconfig | 2 +- configs/M54455EVB_intel_defconfig | 2 +- configs/M54455EVB_stm33_defconfig | 2 +- configs/MPC8536DS_36BIT_defconfig | 2 +- configs/MPC8536DS_SDCARD_defconfig | 2 +- configs/MPC8536DS_SPIFLASH_defconfig | 2 +- configs/MPC8536DS_defconfig | 2 +- configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 +- configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 +- configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 +- .../P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PA_NAND_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_NAND_defconfig | 2 +- configs/P1010RDB-PA_NOR_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_NOR_defconfig | 2 +- configs/P1010RDB-PA_SDCARD_defconfig | 2 +- configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig | 2 +- configs/P1010RDB-PA_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 +- configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 +- configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 +- .../P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 +- configs/P1010RDB-PB_NAND_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_NAND_defconfig | 2 +- configs/P1010RDB-PB_NOR_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_NOR_defconfig | 2 +- configs/P1010RDB-PB_SDCARD_defconfig | 2 +- configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig | 2 +- configs/P1010RDB-PB_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 +- configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 +- configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PC_36BIT_defconfig | 2 +- configs/P1020RDB-PC_NAND_defconfig | 2 +- configs/P1020RDB-PC_SDCARD_defconfig | 2 +- configs/P1020RDB-PC_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PC_defconfig | 2 +- configs/P1020RDB-PD_NAND_defconfig | 2 +- configs/P1020RDB-PD_SDCARD_defconfig | 2 +- configs/P1020RDB-PD_SPIFLASH_defconfig | 2 +- configs/P1020RDB-PD_defconfig | 2 +- configs/P1021RDB-PC_36BIT_NAND_defconfig | 2 +- configs/P1021RDB-PC_36BIT_SDCARD_defconfig | 2 +- configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig | 2 +- configs/P1021RDB-PC_36BIT_defconfig | 2 +- configs/P1021RDB-PC_NAND_defconfig | 2 +- configs/P1021RDB-PC_SDCARD_defconfig | 2 +- configs/P1021RDB-PC_SPIFLASH_defconfig | 2 +- configs/P1021RDB-PC_defconfig | 2 +- configs/P1022DS_36BIT_NAND_defconfig | 2 +- configs/P1022DS_36BIT_SDCARD_defconfig | 2 +- configs/P1022DS_36BIT_SPIFLASH_defconfig | 2 +- configs/P1022DS_36BIT_defconfig | 2 +- configs/P1022DS_NAND_defconfig | 2 +- configs/P1022DS_SDCARD_defconfig | 2 +- configs/P1022DS_SPIFLASH_defconfig | 2 +- configs/P1022DS_defconfig | 2 +- configs/P1024RDB_36BIT_defconfig | 2 +- configs/P1024RDB_NAND_defconfig | 2 +- configs/P1024RDB_SDCARD_defconfig | 2 +- configs/P1024RDB_SPIFLASH_defconfig | 2 +- configs/P1024RDB_defconfig | 2 +- configs/P1025RDB_36BIT_defconfig | 2 +- configs/P1025RDB_NAND_defconfig | 2 +- configs/P1025RDB_SDCARD_defconfig | 2 +- configs/P1025RDB_SPIFLASH_defconfig | 2 +- configs/P1025RDB_defconfig | 2 +- configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 +- configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 +- configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 +- configs/P2020RDB-PC_36BIT_defconfig | 2 +- configs/P2020RDB-PC_NAND_defconfig | 2 +- configs/P2020RDB-PC_SDCARD_defconfig | 2 +- configs/P2020RDB-PC_SPIFLASH_defconfig | 2 +- configs/P2020RDB-PC_defconfig | 2 +- configs/P2041RDB_NAND_defconfig | 2 +- configs/P2041RDB_SDCARD_defconfig | 2 +- configs/P2041RDB_SECURE_BOOT_defconfig | 2 +- configs/P2041RDB_SPIFLASH_defconfig | 2 +- configs/P2041RDB_SRIO_PCIE_BOOT_defconfig | 2 +- configs/P2041RDB_defconfig | 2 +- configs/P3041DS_NAND_SECURE_BOOT_defconfig | 2 +- configs/P3041DS_NAND_defconfig | 2 +- configs/P3041DS_SDCARD_defconfig | 2 +- configs/P3041DS_SECURE_BOOT_defconfig | 2 +- configs/P3041DS_SPIFLASH_defconfig | 2 +- configs/P3041DS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/P3041DS_defconfig | 2 +- configs/P4080DS_SDCARD_defconfig | 2 +- configs/P4080DS_SECURE_BOOT_defconfig | 2 +- configs/P4080DS_SPIFLASH_defconfig | 2 +- configs/P4080DS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/P4080DS_defconfig | 2 +- configs/P5020DS_NAND_SECURE_BOOT_defconfig | 2 +- configs/P5020DS_NAND_defconfig | 2 +- configs/P5020DS_SDCARD_defconfig | 2 +- configs/P5020DS_SECURE_BOOT_defconfig | 2 +- configs/P5020DS_SPIFLASH_defconfig | 2 +- configs/P5020DS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/P5020DS_defconfig | 2 +- configs/P5040DS_NAND_SECURE_BOOT_defconfig | 2 +- configs/P5040DS_NAND_defconfig | 2 +- configs/P5040DS_SDCARD_defconfig | 2 +- configs/P5040DS_SECURE_BOOT_defconfig | 2 +- configs/P5040DS_SPIFLASH_defconfig | 2 +- configs/P5040DS_defconfig | 2 +- configs/T1023RDB_NAND_defconfig | 2 +- configs/T1023RDB_SDCARD_defconfig | 2 +- configs/T1023RDB_SECURE_BOOT_defconfig | 2 +- configs/T1023RDB_SPIFLASH_defconfig | 2 +- configs/T1023RDB_defconfig | 2 +- configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 4 ++-- configs/T1024QDS_DDR4_defconfig | 4 ++-- configs/T1024QDS_NAND_defconfig | 4 ++-- configs/T1024QDS_SDCARD_defconfig | 4 ++-- configs/T1024QDS_SECURE_BOOT_defconfig | 4 ++-- configs/T1024QDS_SPIFLASH_defconfig | 4 ++-- configs/T1024QDS_defconfig | 4 ++-- configs/T1024RDB_NAND_defconfig | 2 +- configs/T1024RDB_SDCARD_defconfig | 2 +- configs/T1024RDB_SECURE_BOOT_defconfig | 2 +- configs/T1024RDB_SPIFLASH_defconfig | 2 +- configs/T1024RDB_defconfig | 2 +- configs/T1040D4RDB_NAND_defconfig | 2 +- configs/T1040D4RDB_SDCARD_defconfig | 2 +- configs/T1040D4RDB_SECURE_BOOT_defconfig | 2 +- configs/T1040D4RDB_SPIFLASH_defconfig | 2 +- configs/T1040D4RDB_defconfig | 2 +- configs/T1040QDS_DDR4_defconfig | 4 ++-- configs/T1040QDS_SECURE_BOOT_defconfig | 4 ++-- configs/T1040QDS_defconfig | 4 ++-- configs/T1040RDB_NAND_defconfig | 2 +- configs/T1040RDB_SDCARD_defconfig | 2 +- configs/T1040RDB_SECURE_BOOT_defconfig | 2 +- configs/T1040RDB_SPIFLASH_defconfig | 2 +- configs/T1040RDB_defconfig | 2 +- configs/T1042D4RDB_NAND_defconfig | 2 +- configs/T1042D4RDB_SDCARD_defconfig | 2 +- configs/T1042D4RDB_SECURE_BOOT_defconfig | 2 +- configs/T1042D4RDB_SPIFLASH_defconfig | 2 +- configs/T1042D4RDB_defconfig | 2 +- configs/T1042RDB_PI_NAND_defconfig | 2 +- configs/T1042RDB_PI_SDCARD_defconfig | 2 +- configs/T1042RDB_PI_SPIFLASH_defconfig | 2 +- configs/T1042RDB_PI_defconfig | 2 +- configs/T1042RDB_SECURE_BOOT_defconfig | 2 +- configs/T1042RDB_defconfig | 2 +- configs/T2080QDS_NAND_defconfig | 4 ++-- configs/T2080QDS_SDCARD_defconfig | 4 ++-- configs/T2080QDS_SECURE_BOOT_defconfig | 4 ++-- configs/T2080QDS_SPIFLASH_defconfig | 4 ++-- configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 4 ++-- configs/T2080QDS_defconfig | 4 ++-- configs/T2080RDB_NAND_defconfig | 2 +- configs/T2080RDB_SDCARD_defconfig | 2 +- configs/T2080RDB_SECURE_BOOT_defconfig | 2 +- configs/T2080RDB_SPIFLASH_defconfig | 2 +- configs/T2080RDB_SRIO_PCIE_BOOT_defconfig | 2 +- configs/T2080RDB_defconfig | 2 +- configs/T2081QDS_NAND_defconfig | 4 ++-- configs/T2081QDS_SDCARD_defconfig | 4 ++-- configs/T2081QDS_SPIFLASH_defconfig | 4 ++-- configs/T2081QDS_SRIO_PCIE_BOOT_defconfig | 4 ++-- configs/T2081QDS_defconfig | 4 ++-- configs/T4160QDS_NAND_defconfig | 2 +- configs/T4160QDS_SDCARD_defconfig | 2 +- configs/T4160QDS_SECURE_BOOT_defconfig | 2 +- configs/T4160QDS_defconfig | 2 +- configs/T4160RDB_defconfig | 2 +- configs/T4240QDS_NAND_defconfig | 2 +- configs/T4240QDS_SDCARD_defconfig | 2 +- configs/T4240QDS_SECURE_BOOT_defconfig | 2 +- configs/T4240QDS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/T4240QDS_defconfig | 2 +- configs/T4240RDB_SDCARD_defconfig | 2 +- configs/T4240RDB_defconfig | 2 +- configs/UCP1020_SPIFLASH_defconfig | 6 +++--- configs/UCP1020_defconfig | 6 +++--- configs/alt_defconfig | 2 +- configs/am335x_boneblack_defconfig | 2 +- configs/am335x_boneblack_vboot_defconfig | 2 +- configs/am335x_evm_defconfig | 2 +- configs/am335x_evm_nor_defconfig | 2 +- configs/am335x_evm_norboot_defconfig | 2 +- configs/am335x_evm_spiboot_defconfig | 2 +- configs/am335x_evm_usbspl_defconfig | 2 +- configs/am335x_gp_evm_defconfig | 2 +- configs/am437x_gp_evm_defconfig | 2 +- configs/am437x_sk_evm_defconfig | 2 +- configs/am43xx_evm_defconfig | 2 +- configs/am43xx_evm_ethboot_defconfig | 2 +- configs/am43xx_evm_qspiboot_defconfig | 2 +- configs/am43xx_evm_usbhost_boot_defconfig | 2 +- configs/aristainetos2_defconfig | 2 +- configs/aristainetos2b_defconfig | 2 +- configs/aristainetos_defconfig | 2 +- configs/axm_defconfig | 2 +- configs/bayleybay_defconfig | 4 ++-- configs/beaver_defconfig | 2 +- configs/bf518f-ezbrd_defconfig | 4 ++-- configs/bf526-ezbrd_defconfig | 2 +- configs/bf527-ad7160-eval_defconfig | 2 +- configs/bf527-ezkit-v2_defconfig | 2 +- configs/bf527-ezkit_defconfig | 2 +- configs/bf527-sdp_defconfig | 10 ++++----- configs/bf537-minotaur_defconfig | 2 +- configs/bf537-pnav_defconfig | 2 +- configs/bf537-srv1_defconfig | 2 +- configs/bf537-stamp_defconfig | 10 ++++----- configs/bf548-ezkit_defconfig | 2 +- configs/bf609-ezkit_defconfig | 10 ++++----- configs/bg0900_defconfig | 2 +- configs/birdland_bav335a_defconfig | 2 +- configs/birdland_bav335b_defconfig | 2 +- configs/blackstamp_defconfig | 2 +- configs/blackvme_defconfig | 2 +- configs/br4_defconfig | 2 +- configs/cardhu_defconfig | 2 +- configs/chromebook_link_defconfig | 4 ++-- configs/chromebox_panther_defconfig | 4 ++-- configs/cm_fx6_defconfig | 10 ++++----- .../controlcenterd_36BIT_SDCARD_DEVELOP_defconfig | 2 +- configs/controlcenterd_36BIT_SDCARD_defconfig | 2 +- configs/coreboot-x86_defconfig | 4 ++-- configs/crownbay_defconfig | 6 +++--- configs/d2net_v2_defconfig | 2 +- configs/da850_am18xxevm_defconfig | 4 ++-- configs/da850evm_defconfig | 4 ++-- configs/da850evm_direct_nor_defconfig | 4 ++-- configs/dalmore_defconfig | 2 +- configs/db-88f6820-gp_defconfig | 4 ++-- configs/db-mv784mp-gp_defconfig | 4 ++-- configs/dra72_evm_defconfig | 2 +- configs/dra74_evm_defconfig | 2 +- configs/dra7xx_evm_defconfig | 2 +- configs/dra7xx_evm_qspiboot_defconfig | 2 +- configs/dra7xx_evm_uart3_defconfig | 2 +- configs/draco_defconfig | 2 +- configs/dreamplug_defconfig | 2 +- configs/ds414_defconfig | 2 +- configs/e2220-1170_defconfig | 2 +- configs/ea20_defconfig | 2 +- configs/galileo_defconfig | 4 ++-- configs/gose_defconfig | 2 +- configs/gplugd_defconfig | 2 +- configs/inetspace_v2_defconfig | 2 +- configs/ip04_defconfig | 4 ++-- configs/jetson-tk1_defconfig | 2 +- configs/k2e_evm_defconfig | 2 +- configs/k2g_evm_defconfig | 2 +- configs/k2hk_evm_defconfig | 2 +- configs/k2l_evm_defconfig | 2 +- configs/km_kirkwood_128m16_defconfig | 2 +- configs/km_kirkwood_defconfig | 2 +- configs/km_kirkwood_pci_defconfig | 2 +- configs/kmcoge4_defconfig | 4 ++-- configs/kmcoge5un_defconfig | 2 +- configs/kmlion1_defconfig | 4 ++-- configs/kmnusa_defconfig | 2 +- configs/kmsugp1_defconfig | 2 +- configs/kmsuv31_defconfig | 2 +- configs/koelsch_defconfig | 2 +- configs/lager_defconfig | 2 +- configs/ls1021aqds_qspi_defconfig | 2 +- configs/ls1021atwr_qspi_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/lschlv2_defconfig | 2 +- configs/lsxhl_defconfig | 2 +- configs/m28evk_defconfig | 2 +- configs/marsboard_defconfig | 2 +- configs/maxbcm_defconfig | 6 +++--- configs/mgcoge3un_defconfig | 2 +- configs/minnowmax_defconfig | 6 +++--- configs/mx28evk_auart_console_defconfig | 2 +- configs/mx28evk_defconfig | 2 +- configs/mx28evk_nand_defconfig | 2 +- configs/mx28evk_spi_defconfig | 2 +- configs/mx6dlsabreauto_defconfig | 2 +- configs/mx6dlsabresd_defconfig | 2 +- configs/mx6qpsabreauto_defconfig | 2 +- configs/mx6qsabreauto_defconfig | 2 +- configs/mx6qsabrelite_defconfig | 2 +- configs/mx6qsabresd_defconfig | 2 +- configs/mx6sabresd_spl_defconfig | 2 +- configs/mx6slevk_defconfig | 2 +- configs/mx6slevk_spinor_defconfig | 2 +- configs/mx6slevk_spl_defconfig | 2 +- configs/mx6sxsabreauto_defconfig | 2 +- configs/net2big_v2_defconfig | 2 +- configs/netspace_lite_v2_defconfig | 2 +- configs/netspace_max_v2_defconfig | 2 +- configs/netspace_mini_v2_defconfig | 2 +- configs/netspace_v2_defconfig | 2 +- configs/nitrogen6dl2g_defconfig | 2 +- configs/nitrogen6dl_defconfig | 2 +- configs/nitrogen6q2g_defconfig | 2 +- configs/nitrogen6q_defconfig | 2 +- configs/nitrogen6s1g_defconfig | 2 +- configs/nitrogen6s_defconfig | 2 +- configs/nyan-big_defconfig | 2 +- configs/omapl138_lcdk_defconfig | 4 ++-- configs/ot1200_defconfig | 8 ++++---- configs/ot1200_spl_defconfig | 8 ++++---- configs/p2371-0000_defconfig | 2 +- configs/p2371-2180_defconfig | 2 +- configs/p2571_defconfig | 2 +- configs/pcm051_rev1_defconfig | 2 +- configs/pcm051_rev3_defconfig | 2 +- configs/peach-pi_defconfig | 2 +- configs/peach-pit_defconfig | 2 +- configs/porter_defconfig | 2 +- configs/portl2_defconfig | 2 +- configs/pr1_defconfig | 2 +- configs/pxm2_defconfig | 2 +- configs/qemu-x86_defconfig | 4 ++-- configs/rastaban_defconfig | 2 +- configs/riotboard_defconfig | 2 +- configs/rut_defconfig | 2 +- configs/sandbox_defconfig | 10 ++++----- configs/sh7752evb_defconfig | 4 ++-- configs/sh7753evb_defconfig | 4 ++-- configs/sh7757lcr_defconfig | 2 +- configs/silk_defconfig | 2 +- configs/smdk5250_defconfig | 2 +- configs/smdk5420_defconfig | 2 +- configs/snow_defconfig | 2 +- configs/socfpga_arria5_defconfig | 4 ++-- configs/socfpga_cyclone5_defconfig | 4 ++-- configs/socfpga_sockit_defconfig | 4 ++-- configs/socfpga_socrates_defconfig | 4 ++-- configs/spring_defconfig | 2 +- configs/stout_defconfig | 2 +- configs/stv0991_defconfig | 4 ++-- configs/taurus_defconfig | 2 +- configs/tec-ng_defconfig | 2 +- configs/theadorable_debug_defconfig | 4 ++-- configs/theadorable_defconfig | 4 ++-- configs/thuban_defconfig | 2 +- configs/tqma6q_mba6_mmc_defconfig | 2 +- configs/tqma6q_mba6_spi_defconfig | 2 +- configs/tqma6s_mba6_mmc_defconfig | 2 +- configs/tqma6s_mba6_spi_defconfig | 2 +- configs/trimslice_defconfig | 2 +- configs/tseries_spi_defconfig | 2 +- configs/venice2_defconfig | 2 +- configs/zynq_microzed_defconfig | 6 +++--- configs/zynq_zc702_defconfig | 6 +++--- configs/zynq_zc706_defconfig | 6 +++--- configs/zynq_zc770_xm010_defconfig | 8 ++++---- configs/zynq_zed_defconfig | 6 +++--- configs/zynq_zybo_defconfig | 2 +- drivers/mtd/spi-nor/Kconfig | 10 ++++----- drivers/mtd/spi-nor/spi-nor-ids.c | 12 +++++------ drivers/mtd/spi-nor/spi-nor.c | 24 +++++++++++----------- include/configs/cgtqmx6eval.h | 4 ++-- include/configs/clearfog.h | 2 +- include/configs/ls1043a_common.h | 4 ++-- include/configs/ls1043aqds.h | 2 +- include/configs/mx6ul_14x14_evk.h | 2 +- include/configs/mx7dsabresd.h | 2 +- 405 files changed, 520 insertions(+), 520 deletions(-)
diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 65b8ec1..e7c430b 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4420QDS_SPIFLASH_defconfig b/configs/B4420QDS_SPIFLASH_defconfig index f7c1010..614ca30 100644 --- a/configs/B4420QDS_SPIFLASH_defconfig +++ b/configs/B4420QDS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4420QDS_defconfig b/configs/B4420QDS_defconfig index 937a475..430a824 100644 --- a/configs/B4420QDS_defconfig +++ b/configs/B4420QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index f5145a9..767ee12 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4860QDS_SECURE_BOOT_defconfig b/configs/B4860QDS_SECURE_BOOT_defconfig index 6fcde70..09a1f2c 100644 --- a/configs/B4860QDS_SECURE_BOOT_defconfig +++ b/configs/B4860QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4860QDS_SPIFLASH_defconfig b/configs/B4860QDS_SPIFLASH_defconfig index 676ab28..32fae29 100644 --- a/configs/B4860QDS_SPIFLASH_defconfig +++ b/configs/B4860QDS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig index 2e36e14..7b1ce58 100644 --- a/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/B4860QDS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/B4860QDS_defconfig b/configs/B4860QDS_defconfig index 9d7079d..9639717 100644 --- a/configs/B4860QDS_defconfig +++ b/configs/B4860QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_B4860QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig index 9e8122a..e016ea2 100644 --- a/configs/BSC9131RDB_NAND_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_NAND_SYSCLK100_defconfig @@ -7,6 +7,6 @@ CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND,SYS_CLK_100" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_NAND_defconfig b/configs/BSC9131RDB_NAND_defconfig index 386625a..55705f7 100644 --- a/configs/BSC9131RDB_NAND_defconfig +++ b/configs/BSC9131RDB_NAND_defconfig @@ -7,6 +7,6 @@ CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,NAND" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig index 73b5b75..7b4d461 100644 --- a/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_SYSCLK100_defconfig @@ -6,6 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH,SYS_CLK_100" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9131RDB_SPIFLASH_defconfig b/configs/BSC9131RDB_SPIFLASH_defconfig index 4b02146..fc0bef3 100644 --- a/configs/BSC9131RDB_SPIFLASH_defconfig +++ b/configs/BSC9131RDB_SPIFLASH_defconfig @@ -6,6 +6,6 @@ CONFIG_SYS_EXTRA_OPTIONS="BSC9131RDB,SPIFLASH" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig index bea6d1f..ecf1b13 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig index a2b2239..3948f90 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK100_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_100" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig index 7e6b12b..4118ca6 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig index 9e6135e..e8d9bbd 100644 --- a/configs/BSC9132QDS_NAND_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NAND_DDRCLK133_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,NAND,SYS_CLK_100_DDR_133" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig index 711f801..1bc8f0c 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig index 578c79a..4800d4a 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK100_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_100" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig index 00e44c6..8f75be5 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig index 3c439f5..fe6f24d 100644 --- a/configs/BSC9132QDS_NOR_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_NOR_DDRCLK133_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SYS_CLK_100_DDR_133" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig index b409876..ee0cca3 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig index bd45600..e9dcf47 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK100_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_100" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig index 06944d5..dbd464a 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig index 8e41abd..2bc8418 100644 --- a/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SDCARD_DDRCLK133_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig index 79f4352..5883577 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig index 0bdca24..0d6086c 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig index 317a272..c98730b 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_SECURE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig index c08faf5..1dfa45a 100644 --- a/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig +++ b/configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_BSC9132QDS=y CONFIG_SYS_EXTRA_OPTIONS="BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index 8e615d0..dfd8f91 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index ada892c..199b339 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index 6b431ad..31b3e30 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index 688f007..13b67a2 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 11a2b4d..4af50fa 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/M52277EVB_defconfig b/configs/M52277EVB_defconfig index 9683bb9..7727a19 100644 --- a/configs/M52277EVB_defconfig +++ b/configs/M52277EVB_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M52277EVB_stmicro_defconfig b/configs/M52277EVB_stmicro_defconfig index 7ca2611..51ac12b 100644 --- a/configs/M52277EVB_stmicro_defconfig +++ b/configs/M52277EVB_stmicro_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT" # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54451EVB_defconfig b/configs/M54451EVB_defconfig index 62cf895..6a7acfe 100644 --- a/configs/M54451EVB_defconfig +++ b/configs/M54451EVB_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54451EVB_stmicro_defconfig b/configs/M54451EVB_stmicro_defconfig index 447a506..0abe9da 100644 --- a/configs/M54451EVB_stmicro_defconfig +++ b/configs/M54451EVB_stmicro_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="CF_SBF,SYS_STMICRO_BOOT,SYS_INPUT_CLKSRC=24000000" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig index f9d6f73..e80d40b 100644 --- a/configs/M54455EVB_a66_defconfig +++ b/configs/M54455EVB_a66_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig index b9275b0..49bf46b 100644 --- a/configs/M54455EVB_defconfig +++ b/configs/M54455EVB_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig index ddba2d5..34ad0a0 100644 --- a/configs/M54455EVB_i66_defconfig +++ b/configs/M54455EVB_i66_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig index d3312c5..95b9623 100644 --- a/configs/M54455EVB_intel_defconfig +++ b/configs/M54455EVB_intel_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig index c3a4bb0..b896dcc 100644 --- a/configs/M54455EVB_stm33_defconfig +++ b/configs/M54455EVB_stm33_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/MPC8536DS_36BIT_defconfig b/configs/MPC8536DS_36BIT_defconfig index 158f1cf..9b57ade 100644 --- a/configs/MPC8536DS_36BIT_defconfig +++ b/configs/MPC8536DS_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8536DS_SDCARD_defconfig b/configs/MPC8536DS_SDCARD_defconfig index 2664fb4..826d5b8 100644 --- a/configs/MPC8536DS_SDCARD_defconfig +++ b/configs/MPC8536DS_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8536DS_SPIFLASH_defconfig b/configs/MPC8536DS_SPIFLASH_defconfig index 99e0e7b..e2b3731 100644 --- a/configs/MPC8536DS_SPIFLASH_defconfig +++ b/configs/MPC8536DS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_MPC8536DS=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/MPC8536DS_defconfig b/configs/MPC8536DS_defconfig index 56d8929..1a75377 100644 --- a/configs/MPC8536DS_defconfig +++ b/configs/MPC8536DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_MPC8536DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig index b8e864b..d80c906 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND_SECBOOT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index cd34f7e..56afc6d 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig index 3fcc68b..eabd4a3 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index d08fa95..dd00190 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index 1733ed7..9707b28 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig index d6364ad..1f2edd1 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 06f570d..47b9496 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig index 43791a4..0a94267 100644 --- a/configs/P1010RDB-PA_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NAND_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND_SECBOOT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 8c9516e..b7d7a32 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig index e177b60..ab1fce1 100644 --- a/configs/P1010RDB-PA_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_NOR_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index f58ece4..0d67869 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 44d1049..a3a3640 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig index 448de8c..daae5e8 100644 --- a/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 452fc30..a194491 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PA,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig index 7c9fd9d..d7ee912 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND_SECBOOT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index c51ff2e..7fe8e7e 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig index fdd5864..ee82c42 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 4e284d2..f9c91c7 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 6726b95..920013a 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig index a10026b..4a1960d 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index fd3061b..4719c1f 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig index 2fcf134..415ded1 100644 --- a/configs/P1010RDB-PB_NAND_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NAND_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND_SECBOOT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 9aa22cd..df8fb3d 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig index 1487448..9908364 100644 --- a/configs/P1010RDB-PB_NOR_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_NOR_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 80dd1af..1e3ebd4 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 4c0cf13..be02a89 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig index e83fc7e..03ca2d6 100644 --- a/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1010RDB=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 9a57911..cb49bc6 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1010RDB_PB,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index 44c35ff..4140d27 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index f1ea15a..b5931ae 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 00cfedd..9af4165 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 2995195..da6e36e 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index e696b40..661d9a7 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 0ef8c4d..67bcbf9 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 136d221..b412c41 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index e55ed00..9cbcb15 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PC" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index a1d4a9a..c6f04c1 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index d8be9f5..3798e26 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 8b542ca..15b8e99 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index ae1045a..9d586aa 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1020RDB_PD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_36BIT_NAND_defconfig b/configs/P1021RDB-PC_36BIT_NAND_defconfig index dfbc3f6..c1e76b0 100644 --- a/configs/P1021RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1021RDB-PC_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig index d985f56..2a3c91e 100644 --- a/configs/P1021RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1021RDB-PC_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig index b96f05f..d9e23b9 100644 --- a/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_36BIT_defconfig b/configs/P1021RDB-PC_36BIT_defconfig index e97e77d..57b1712 100644 --- a/configs/P1021RDB-PC_36BIT_defconfig +++ b/configs/P1021RDB-PC_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_NAND_defconfig b/configs/P1021RDB-PC_NAND_defconfig index b62c17e..a2c5068 100644 --- a/configs/P1021RDB-PC_NAND_defconfig +++ b/configs/P1021RDB-PC_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_SDCARD_defconfig b/configs/P1021RDB-PC_SDCARD_defconfig index 9e3325e..81ddba8 100644 --- a/configs/P1021RDB-PC_SDCARD_defconfig +++ b/configs/P1021RDB-PC_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_SPIFLASH_defconfig b/configs/P1021RDB-PC_SPIFLASH_defconfig index 9c0989c..64965cd 100644 --- a/configs/P1021RDB-PC_SPIFLASH_defconfig +++ b/configs/P1021RDB-PC_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1021RDB-PC_defconfig b/configs/P1021RDB-PC_defconfig index 3bfbbef..4ab190c 100644 --- a/configs/P1021RDB-PC_defconfig +++ b/configs/P1021RDB-PC_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1021RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_36BIT_NAND_defconfig b/configs/P1022DS_36BIT_NAND_defconfig index 1146a7d..0435455 100644 --- a/configs/P1022DS_36BIT_NAND_defconfig +++ b/configs/P1022DS_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_36BIT_SDCARD_defconfig b/configs/P1022DS_36BIT_SDCARD_defconfig index 7490834..1ed3734 100644 --- a/configs/P1022DS_36BIT_SDCARD_defconfig +++ b/configs/P1022DS_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_36BIT_SPIFLASH_defconfig b/configs/P1022DS_36BIT_SPIFLASH_defconfig index 2034b28..d067217 100644 --- a/configs/P1022DS_36BIT_SPIFLASH_defconfig +++ b/configs/P1022DS_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_36BIT_defconfig b/configs/P1022DS_36BIT_defconfig index b769062..2a37953 100644 --- a/configs/P1022DS_36BIT_defconfig +++ b/configs/P1022DS_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1022DS=y CONFIG_SYS_EXTRA_OPTIONS="36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_NAND_defconfig b/configs/P1022DS_NAND_defconfig index ef32d4e..5c49d85 100644 --- a/configs/P1022DS_NAND_defconfig +++ b/configs/P1022DS_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_SDCARD_defconfig b/configs/P1022DS_SDCARD_defconfig index 1258cc3..d24d4a1 100644 --- a/configs/P1022DS_SDCARD_defconfig +++ b/configs/P1022DS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_SPIFLASH_defconfig b/configs/P1022DS_SPIFLASH_defconfig index 1c8e115..4cd8e3f 100644 --- a/configs/P1022DS_SPIFLASH_defconfig +++ b/configs/P1022DS_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1022DS_defconfig b/configs/P1022DS_defconfig index 3cdb129..d07e41e 100644 --- a/configs/P1022DS_defconfig +++ b/configs/P1022DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P1022DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1024RDB_36BIT_defconfig b/configs/P1024RDB_36BIT_defconfig index c0750b5..3c81b61 100644 --- a/configs/P1024RDB_36BIT_defconfig +++ b/configs/P1024RDB_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1024RDB_NAND_defconfig b/configs/P1024RDB_NAND_defconfig index 6b0a537..9107622 100644 --- a/configs/P1024RDB_NAND_defconfig +++ b/configs/P1024RDB_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1024RDB_SDCARD_defconfig b/configs/P1024RDB_SDCARD_defconfig index d6c9000..a73e51f 100644 --- a/configs/P1024RDB_SDCARD_defconfig +++ b/configs/P1024RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1024RDB_SPIFLASH_defconfig b/configs/P1024RDB_SPIFLASH_defconfig index be92545..3d4d28f 100644 --- a/configs/P1024RDB_SPIFLASH_defconfig +++ b/configs/P1024RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1024RDB_defconfig b/configs/P1024RDB_defconfig index 8f36af9..4145c29 100644 --- a/configs/P1024RDB_defconfig +++ b/configs/P1024RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1024RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1025RDB_36BIT_defconfig b/configs/P1025RDB_36BIT_defconfig index 98eaa1e..28d32a7 100644 --- a/configs/P1025RDB_36BIT_defconfig +++ b/configs/P1025RDB_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1025RDB_NAND_defconfig b/configs/P1025RDB_NAND_defconfig index 5ec12ef..0b34761 100644 --- a/configs/P1025RDB_NAND_defconfig +++ b/configs/P1025RDB_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1025RDB_SDCARD_defconfig b/configs/P1025RDB_SDCARD_defconfig index 2b75f71..da9de70 100644 --- a/configs/P1025RDB_SDCARD_defconfig +++ b/configs/P1025RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1025RDB_SPIFLASH_defconfig b/configs/P1025RDB_SPIFLASH_defconfig index bb9298e..0fe4860 100644 --- a/configs/P1025RDB_SPIFLASH_defconfig +++ b/configs/P1025RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P1025RDB_defconfig b/configs/P1025RDB_defconfig index c5708f4..9b36692 100644 --- a/configs/P1025RDB_defconfig +++ b/configs/P1025RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P1025RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 7b58c3c..580f183 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 97e81c8..700a6a8 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 9c9a08a..fe3f6d1 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index 9b7a861..59ca8d7 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index c5a2122..03c76d3 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 27574fc..8221872 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 0d41a4b..cbb214a 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index a53e3e2..0bdb8f3 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P1_P2_RDB_PC=y CONFIG_SYS_EXTRA_OPTIONS="P2020RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index cd1b116..4a6a42a 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 4a1716e..6aa2b9f 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_SECURE_BOOT_defconfig b/configs/P2041RDB_SECURE_BOOT_defconfig index b6cbfd2..e1640c1 100644 --- a/configs/P2041RDB_SECURE_BOOT_defconfig +++ b/configs/P2041RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index 63ceb71..81b7947 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P2041RDB=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig index 385dbd2..2fd86ed 100644 --- a/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/P2041RDB_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index 0d1e391..3728aef 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P2041RDB=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_NAND_SECURE_BOOT_defconfig b/configs/P3041DS_NAND_SECURE_BOOT_defconfig index 8f5c5f6..2a86944 100644 --- a/configs/P3041DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P3041DS_NAND_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 7a5f479..48a0c74 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index fd2493a..0b4461a 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_SECURE_BOOT_defconfig b/configs/P3041DS_SECURE_BOOT_defconfig index 4d82118..e9bc693 100644 --- a/configs/P3041DS_SECURE_BOOT_defconfig +++ b/configs/P3041DS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 7dbd063..2a03284 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P3041DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig index 5927d6e..54f370d 100644 --- a/configs/P3041DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P3041DS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 736692b..3b4de80 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P3041DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index 4bbc2fb..3226793 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P4080DS_SECURE_BOOT_defconfig b/configs/P4080DS_SECURE_BOOT_defconfig index b2c51a2..88643cc 100644 --- a/configs/P4080DS_SECURE_BOOT_defconfig +++ b/configs/P4080DS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index 61d94c6..01d3f1e 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P4080DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig index 94a7067..4b94fb3 100644 --- a/configs/P4080DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P4080DS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index 6e61dae..d8aa6fc 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P4080DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_NAND_SECURE_BOOT_defconfig b/configs/P5020DS_NAND_SECURE_BOOT_defconfig index 2422375..44b82f7 100644 --- a/configs/P5020DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5020DS_NAND_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_NAND_defconfig b/configs/P5020DS_NAND_defconfig index 8d0c593..bcb769a 100644 --- a/configs/P5020DS_NAND_defconfig +++ b/configs/P5020DS_NAND_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_SDCARD_defconfig b/configs/P5020DS_SDCARD_defconfig index ed7120b..d292faa 100644 --- a/configs/P5020DS_SDCARD_defconfig +++ b/configs/P5020DS_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_SECURE_BOOT_defconfig b/configs/P5020DS_SECURE_BOOT_defconfig index a3a672b..8cfd81d 100644 --- a/configs/P5020DS_SECURE_BOOT_defconfig +++ b/configs/P5020DS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_SPIFLASH_defconfig b/configs/P5020DS_SPIFLASH_defconfig index 7f75f6d..471d29c 100644 --- a/configs/P5020DS_SPIFLASH_defconfig +++ b/configs/P5020DS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5020DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig index b135471..956e8ea 100644 --- a/configs/P5020DS_SRIO_PCIE_BOOT_defconfig +++ b/configs/P5020DS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF40000" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5020DS_defconfig b/configs/P5020DS_defconfig index cee5c88..af44de8 100644 --- a/configs/P5020DS_defconfig +++ b/configs/P5020DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5020DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_NAND_SECURE_BOOT_defconfig b/configs/P5040DS_NAND_SECURE_BOOT_defconfig index 7481328..fb39a45 100644 --- a/configs/P5040DS_NAND_SECURE_BOOT_defconfig +++ b/configs/P5040DS_NAND_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SECURE_BOOT,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 465abd3..8c7df6f 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 177b570..535bede 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_SECURE_BOOT_defconfig b/configs/P5040DS_SECURE_BOOT_defconfig index 29aab4c..2f7c914 100644 --- a/configs/P5040DS_SECURE_BOOT_defconfig +++ b/configs/P5040DS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 5947a02..6bcfd23 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_P5040DS=y CONFIG_SYS_EXTRA_OPTIONS="RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF40000" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index d3776dc..1ec0864 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -3,7 +3,7 @@ CONFIG_MPC85xx=y CONFIG_TARGET_P5040DS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index d38b567..797ac56 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 4ab8e9c..e7b025d 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_SECURE_BOOT_defconfig b/configs/T1023RDB_SECURE_BOOT_defconfig index bb80746..ce67386 100644 --- a/configs/T1023RDB_SECURE_BOOT_defconfig +++ b/configs/T1023RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 6b2d137..26e9ca4 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1023RDB_defconfig b/configs/T1023RDB_defconfig index e0cf08b..5d13fea 100644 --- a/configs/T1023RDB_defconfig +++ b/configs/T1023RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 0a76b70..9b2d38c 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index 75f1fa1..4dc0b3b 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -5,7 +5,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index cbdb291..8f16084 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index dbcf4c1..a4dee46 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index b8c075f..b16a71a 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index b5ccdd7..442a242 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index f435979..e6b351a 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 018ed40..df657dd 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 0f2cf27..4e9388a 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024RDB_SECURE_BOOT_defconfig b/configs/T1024RDB_SECURE_BOOT_defconfig index 9cb7985..56682ca 100644 --- a/configs/T1024RDB_SECURE_BOOT_defconfig +++ b/configs/T1024RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 90d87a7..df868dd 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 9bce26c..36fa82e 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index 4b13d87..9c6fe47 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index 2e06c44..160ea4f 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040D4RDB_SECURE_BOOT_defconfig b/configs/T1040D4RDB_SECURE_BOOT_defconfig index 401773e..66758ac 100644 --- a/configs/T1040D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1040D4RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index 1b265bd..f4643c0 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040D4RDB_defconfig b/configs/T1040D4RDB_defconfig index 39c19ea..6c616b1 100644 --- a/configs/T1040D4RDB_defconfig +++ b/configs/T1040D4RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index d28bf0f..20c71da 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 63647c1..7652128 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index af808b3..f1cc4f0 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 332919a..3fff884 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 8917e52..74c3e93 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040RDB_SECURE_BOOT_defconfig b/configs/T1040RDB_SECURE_BOOT_defconfig index 9d3e40e..b06dcc1 100644 --- a/configs/T1040RDB_SECURE_BOOT_defconfig +++ b/configs/T1040RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT,T1040RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 69aa05f..96dde34 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1040RDB_defconfig b/configs/T1040RDB_defconfig index d100627..8a2e071 100644 --- a/configs/T1040RDB_defconfig +++ b/configs/T1040RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 0b59e8e..3c8c186 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 5bdee2e..fd0fb6b 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042D4RDB_SECURE_BOOT_defconfig b/configs/T1042D4RDB_SECURE_BOOT_defconfig index 42a88f4..97dc5c2 100644 --- a/configs/T1042D4RDB_SECURE_BOOT_defconfig +++ b/configs/T1042D4RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 93840b0..b1ee3dc 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 9f72d7d..5027d45 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,T104XD4RDB,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index 287d8a8..d3e7731 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 9eca40d..1a1090d 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index ea9e6d2..1d1038f 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_PI_defconfig b/configs/T1042RDB_PI_defconfig index 21203df..91755f7 100644 --- a/configs/T1042RDB_PI_defconfig +++ b/configs/T1042RDB_PI_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_SECURE_BOOT_defconfig b/configs/T1042RDB_SECURE_BOOT_defconfig index 5852e83..69a8f22 100644 --- a/configs/T1042RDB_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,SECURE_BOOT,T1042RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig index 54e97b8..5d9bec2 100644 --- a/configs/T1042RDB_defconfig +++ b/configs/T1042RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T104XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 6717c09..b8dca69 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 2149a42..70e681f 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index ca4c322..4b965a0 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index b7651f4..d703ddb 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index e522290..6293533 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 16abd88..5cd1724 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index ae8b23e..2dea9d1 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 04de928..d70aea9 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_SECURE_BOOT_defconfig b/configs/T2080RDB_SECURE_BOOT_defconfig index cade10d..37ef76a 100644 --- a/configs/T2080RDB_SECURE_BOOT_defconfig +++ b/configs/T2080RDB_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index fd40952..2fbbd51 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig index 506e217..262ab15 100644 --- a/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080RDB_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index e49e0aa..e09e676 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T208XRDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 8d8a476..e93ca08 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 180c897..80fbb87 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 305f01f..af7e5e3 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index 0d71fff..d58f75f 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -7,8 +7,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index e8dd888..7f1c69b 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -5,8 +5,8 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 742b663..4942d45 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index da5dc55..3fe9fd4 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4160QDS_SECURE_BOOT_defconfig b/configs/T4160QDS_SECURE_BOOT_defconfig index 3d3238e..3723842 100644 --- a/configs/T4160QDS_SECURE_BOOT_defconfig +++ b/configs/T4160QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4160QDS_defconfig b/configs/T4160QDS_defconfig index 4bceb10..df90404 100644 --- a/configs/T4160QDS_defconfig +++ b/configs/T4160QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4160RDB_defconfig b/configs/T4160RDB_defconfig index 354fa48..b988163 100644 --- a/configs/T4160RDB_defconfig +++ b/configs/T4160RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index e92ded1..f1ec816 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index 02e8b85..f00f78a 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240QDS_SECURE_BOOT_defconfig b/configs/T4240QDS_SECURE_BOOT_defconfig index f871a74..98e42c3 100644 --- a/configs/T4240QDS_SECURE_BOOT_defconfig +++ b/configs/T4240QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig index 915e5ba..6a6a911 100644 --- a/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T4240QDS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240QDS_defconfig b/configs/T4240QDS_defconfig index 0516ca2..98d2726 100644 --- a/configs/T4240QDS_defconfig +++ b/configs/T4240QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 7b3b470..9f6a1ce 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 9315958..de08e16 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T4240RDB=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/UCP1020_SPIFLASH_defconfig b/configs/UCP1020_SPIFLASH_defconfig index ca2ad6d..febf3a3 100644 --- a/configs/UCP1020_SPIFLASH_defconfig +++ b/configs/UCP1020_SPIFLASH_defconfig @@ -8,9 +8,9 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig index 241718c..d25c57f 100644 --- a/configs/UCP1020_defconfig +++ b/configs/UCP1020_defconfig @@ -8,9 +8,9 @@ CONFIG_AUTOBOOT_STOP_STR="\x1b" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/alt_defconfig b/configs/alt_defconfig index 2fd873c..e9c6800 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index eb1646e..d6f81d0 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -15,5 +15,5 @@ CONFIG_CMD_GPIO=y CONFIG_DFU_TFTP=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 7d0ab0b..33b4ae7 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -20,7 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM_MMC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y CONFIG_TIMER=y diff --git a/configs/am335x_evm_defconfig b/configs/am335x_evm_defconfig index 525a735..13083df 100644 --- a/configs/am335x_evm_defconfig +++ b/configs/am335x_evm_defconfig @@ -14,5 +14,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_nor_defconfig b/configs/am335x_evm_nor_defconfig index 370ba52..e0ada36 100644 --- a/configs/am335x_evm_nor_defconfig +++ b/configs/am335x_evm_nor_defconfig @@ -10,5 +10,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_norboot_defconfig b/configs/am335x_evm_norboot_defconfig index 420c6a2..91fb1b6 100644 --- a/configs/am335x_evm_norboot_defconfig +++ b/configs/am335x_evm_norboot_defconfig @@ -7,5 +7,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index e6c1d6b..2fbb2c4 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -10,5 +10,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_evm_usbspl_defconfig b/configs/am335x_evm_usbspl_defconfig index da9a8c7..3976443 100644 --- a/configs/am335x_evm_usbspl_defconfig +++ b/configs/am335x_evm_usbspl_defconfig @@ -10,5 +10,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/am335x_gp_evm_defconfig b/configs/am335x_gp_evm_defconfig index 94bc717..8fe7b93 100644 --- a/configs/am335x_gp_evm_defconfig +++ b/configs/am335x_gp_evm_defconfig @@ -13,7 +13,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM_MMC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_SYS_NS16550=y CONFIG_RSA=y diff --git a/configs/am437x_gp_evm_defconfig b/configs/am437x_gp_evm_defconfig index e68c752..59d6e34 100644 --- a/configs/am437x_gp_evm_defconfig +++ b/configs/am437x_gp_evm_defconfig @@ -16,7 +16,7 @@ CONFIG_DM=y CONFIG_DM_MMC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_TIMER=y diff --git a/configs/am437x_sk_evm_defconfig b/configs/am437x_sk_evm_defconfig index f077f70..192c61e 100644 --- a/configs/am437x_sk_evm_defconfig +++ b/configs/am437x_sk_evm_defconfig @@ -16,7 +16,7 @@ CONFIG_DM=y CONFIG_DM_MMC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 73b16ac..2c4685c 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -9,6 +9,6 @@ CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig index dfcbe63..f75aabd 100644 --- a/configs/am43xx_evm_ethboot_defconfig +++ b/configs/am43xx_evm_ethboot_defconfig @@ -8,6 +8,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index f78dac7..ecc8ab1 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -7,6 +7,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 5446b5a..f94da72 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -8,6 +8,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/aristainetos2_defconfig b/configs/aristainetos2_defconfig index 89f02d1..f6dbbd6 100644 --- a/configs/aristainetos2_defconfig +++ b/configs/aristainetos2_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/aristainetos2b_defconfig b/configs/aristainetos2b_defconfig index e6cccd5..ca4e65b 100644 --- a/configs/aristainetos2b_defconfig +++ b/configs/aristainetos2b_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos2.cfg,MX6DL" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/aristainetos_defconfig b/configs/aristainetos_defconfig index a2dfb33..b639b89 100644 --- a/configs/aristainetos_defconfig +++ b/configs/aristainetos_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/aristainetos/aristainetos.cfg,MX6DL" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index 3b16b91..6f318b7 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -12,5 +12,5 @@ CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,MACH_TYPE=2068,BOARD_AXM" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index f9e0764..eade706 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -23,8 +23,8 @@ CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_DM_PCI=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index cad0862..ece2062 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_TEGRA20_SLINK=y diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig index a211b44..c6e942f 100644 --- a/configs/bf518f-ezbrd_defconfig +++ b/configs/bf518f-ezbrd_defconfig @@ -5,6 +5,6 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig index cf608cd..a7c1807 100644 --- a/configs/bf526-ezbrd_defconfig +++ b/configs/bf526-ezbrd_defconfig @@ -5,4 +5,4 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/bf527-ad7160-eval_defconfig b/configs/bf527-ad7160-eval_defconfig index 7aaf740..0cf8517 100644 --- a/configs/bf527-ad7160-eval_defconfig +++ b/configs/bf527-ad7160-eval_defconfig @@ -7,5 +7,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig index ef8ae9e..373d473 100644 --- a/configs/bf527-ezkit-v2_defconfig +++ b/configs/bf527-ezkit-v2_defconfig @@ -5,5 +5,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_LIB_RAND=y diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig index 478e21a..1bedcb8 100644 --- a/configs/bf527-ezkit_defconfig +++ b/configs/bf527-ezkit_defconfig @@ -5,4 +5,4 @@ CONFIG_NET_RANDOM_ETHADDR=y # CONFIG_NET_TFTP_VARS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig index 34ee175..d74f1df 100644 --- a/configs/bf527-sdp_defconfig +++ b/configs/bf527-sdp_defconfig @@ -9,9 +9,9 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf537-minotaur_defconfig b/configs/bf537-minotaur_defconfig index 4ce5aed..ee3629b 100644 --- a/configs/bf537-minotaur_defconfig +++ b/configs/bf537-minotaur_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_PROMPT="minotaur> " CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf537-pnav_defconfig b/configs/bf537-pnav_defconfig index 3df58d7..0b23c59 100644 --- a/configs/bf537-pnav_defconfig +++ b/configs/bf537-pnav_defconfig @@ -5,4 +5,4 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf537-srv1_defconfig b/configs/bf537-srv1_defconfig index 580bc83..8d78779 100644 --- a/configs/bf537-srv1_defconfig +++ b/configs/bf537-srv1_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_PROMPT="srv1> " CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig index 2e21cc5..c3161fa 100644 --- a/configs/bf537-stamp_defconfig +++ b/configs/bf537-stamp_defconfig @@ -7,8 +7,8 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig index d0b96ff..e922cbd 100644 --- a/configs/bf548-ezkit_defconfig +++ b/configs/bf548-ezkit_defconfig @@ -4,6 +4,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/bf609-ezkit_defconfig b/configs/bf609-ezkit_defconfig index f050eff..de8d28c 100644 --- a/configs/bf609-ezkit_defconfig +++ b/configs/bf609-ezkit_defconfig @@ -6,11 +6,11 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y CONFIG_LIB_RAND=y diff --git a/configs/bg0900_defconfig b/configs/bg0900_defconfig index 6cd2692..119c6a5 100644 --- a/configs/bg0900_defconfig +++ b/configs/bg0900_defconfig @@ -7,4 +7,4 @@ CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/birdland_bav335a_defconfig b/configs/birdland_bav335a_defconfig index 13140e9..81842dc 100644 --- a/configs/birdland_bav335a_defconfig +++ b/configs/birdland_bav335a_defconfig @@ -9,5 +9,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/birdland_bav335b_defconfig b/configs/birdland_bav335b_defconfig index 6ba399f..da03508 100644 --- a/configs/birdland_bav335b_defconfig +++ b/configs/birdland_bav335b_defconfig @@ -9,5 +9,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/blackstamp_defconfig b/configs/blackstamp_defconfig index 0a2bd94..0079a6e 100644 --- a/configs/blackstamp_defconfig +++ b/configs/blackstamp_defconfig @@ -5,4 +5,4 @@ CONFIG_TARGET_BLACKSTAMP=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/blackvme_defconfig b/configs/blackvme_defconfig index e941e42..f3df98d 100644 --- a/configs/blackvme_defconfig +++ b/configs/blackvme_defconfig @@ -5,4 +5,4 @@ CONFIG_TARGET_BLACKVME=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/br4_defconfig b/configs/br4_defconfig index ae39cbb..92af6e0 100644 --- a/configs/br4_defconfig +++ b/configs/br4_defconfig @@ -7,6 +7,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 1e897f5..90da7e4 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_TEGRA20_SLINK=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 553a001..97c50f0 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -30,8 +30,8 @@ CONFIG_CROS_EC_LPC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PCI=y CONFIG_DM_RTC=y CONFIG_DEBUG_UART=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 0b8ea6e..8b9f04a 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -24,8 +24,8 @@ CONFIG_CROS_EC_LPC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PCI=y CONFIG_DM_RTC=y CONFIG_SYS_NS16550=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index edc6556..0029445 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -22,11 +22,11 @@ CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index b615635..2d5e9df 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -8,7 +8,7 @@ CONFIG_CMD_TPM=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y CONFIG_TPM_AUTH_SESSIONS=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index 782b2ca..a9f1d6d 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -8,7 +8,7 @@ CONFIG_CMD_TPM=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y CONFIG_FSL_ESPI=y CONFIG_TPM_AUTH_SESSIONS=y diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index b83f50c..48a8fa8 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -14,8 +14,8 @@ CONFIG_OF_CONTROL=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_DM_PCI=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index e36f308..dfc6b0f 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -21,9 +21,9 @@ CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_PCH_GBE=y diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index ab28651..cdf9598 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index a0a34c0..44bfdf0 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -8,6 +8,6 @@ CONFIG_SYS_EXTRA_OPTIONS="DA850_AM18X_EVM,MAC_ADDR_IN_EEPROM,SYS_I2C_EEPROM_ADDR # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 550a33c..b09e136 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -9,6 +9,6 @@ CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index d4e55eb..aca78cb 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -6,6 +6,6 @@ CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 76ddc41..8b155cb 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_USB=y diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index 2c474c9..ddedec5 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -11,8 +11,8 @@ CONFIG_CMD_USB=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index 5f9bc78..6b5fe0c 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -13,8 +13,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_NAND_PXA3XX=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/dra72_evm_defconfig b/configs/dra72_evm_defconfig index 46e5692..bbdfb49 100644 --- a/configs/dra72_evm_defconfig +++ b/configs/dra72_evm_defconfig @@ -18,7 +18,7 @@ CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y CONFIG_DM_SPI=y diff --git a/configs/dra74_evm_defconfig b/configs/dra74_evm_defconfig index a096dd2..910f362 100644 --- a/configs/dra74_evm_defconfig +++ b/configs/dra74_evm_defconfig @@ -16,7 +16,7 @@ CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 56f362a..2d59d6a 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -12,6 +12,6 @@ CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/dra7xx_evm_qspiboot_defconfig b/configs/dra7xx_evm_qspiboot_defconfig index 1d3e2f9..ccdfded 100644 --- a/configs/dra7xx_evm_qspiboot_defconfig +++ b/configs/dra7xx_evm_qspiboot_defconfig @@ -12,6 +12,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/dra7xx_evm_uart3_defconfig b/configs/dra7xx_evm_uart3_defconfig index a31dfec..10221b0 100644 --- a/configs/dra7xx_evm_uart3_defconfig +++ b/configs/dra7xx_evm_uart3_defconfig @@ -13,6 +13,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_SYS_NS16550=y CONFIG_TI_QSPI=y diff --git a/configs/draco_defconfig b/configs/draco_defconfig index b282f97..26abcde 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 6ed3592..d5eaa3c 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index a4ccc52..eb8b241 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -11,7 +11,7 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig index 1741e6d..c15c7fb 100644 --- a/configs/e2220-1170_defconfig +++ b/configs/e2220-1170_defconfig @@ -12,7 +12,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_USB=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index 27ef793..fe6183b 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index eaf0912..d111024 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -17,8 +17,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_DM_PCI=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index 040cbaa..8b5744b 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index e1285bf..7c3de52 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -7,5 +7,5 @@ CONFIG_TARGET_GPLUGD=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index ca9eaba..8afac5e 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig index 00160eb..164fb51 100644 --- a/configs/ip04_defconfig +++ b/configs/ip04_defconfig @@ -7,6 +7,6 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 7937904..f239822 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 33dd747..ac7c361 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -12,5 +12,5 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index b1198be..50feb4e 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -11,5 +11,5 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index c3b426e..9e90f68 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -12,5 +12,5 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 84ebcca..4e03da6 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -12,5 +12,5 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 318731e..57dc29a 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index aed8114..fa90017 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 007a765..a8fb03c 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmcoge4_defconfig b/configs/kmcoge4_defconfig index 19b51a2..cae013b 100644 --- a/configs/kmcoge4_defconfig +++ b/configs/kmcoge4_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="KMCOGE4" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 6946003..a0393ed 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmlion1_defconfig b/configs/kmlion1_defconfig index 08d170a..be798ad 100644 --- a/configs/kmlion1_defconfig +++ b/configs/kmlion1_defconfig @@ -6,8 +6,8 @@ CONFIG_SYS_EXTRA_OPTIONS="KMLION1" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 525e98c..98fe11f 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index d3d8e6e..cbd8398 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index b6e5fa4..74586e8 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 5bae9b4..6eaea02 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/lager_defconfig b/configs/lager_defconfig index ada450d..7621f22 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig index a3cade5..310c6cd 100644 --- a/configs/ls1021aqds_qspi_defconfig +++ b/configs/ls1021aqds_qspi_defconfig @@ -11,7 +11,7 @@ CONFIG_MTD=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_MTD_DATAFLASH=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index f62a5f6..a850276 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -10,7 +10,7 @@ CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 97bcd95..6be898d 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -9,7 +9,7 @@ CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y CONFIG_SYS_NS16550=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index f5b43e0..e1095cb 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -8,5 +8,5 @@ CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 41ff59d..769c51e 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -8,5 +8,5 @@ CONFIG_SYS_EXTRA_OPTIONS="LSXHL" CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/m28evk_defconfig b/configs/m28evk_defconfig index bf8b425..6f00b54 100644 --- a/configs/m28evk_defconfig +++ b/configs/m28evk_defconfig @@ -6,4 +6,4 @@ CONFIG_SPL=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/marsboard_defconfig b/configs/marsboard_defconfig index e03d1ba..cc39419 100644 --- a/configs/marsboard_defconfig +++ b/configs/marsboard_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 03ab40e..3ecae2f 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -11,9 +11,9 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index c774b40..529a4ba 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 5055953..839cd63 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -22,9 +22,9 @@ CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_DM_PCI=y CONFIG_DM_RTC=y diff --git a/configs/mx28evk_auart_console_defconfig b/configs/mx28evk_auart_console_defconfig index bb90ded..96e6556 100644 --- a/configs/mx28evk_auart_console_defconfig +++ b/configs/mx28evk_auart_console_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="MXS_AUART,MXS_AUART_BASE=MXS_UARTAPP3_BASE,ENV_IS_IN_M CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/mx28evk_defconfig b/configs/mx28evk_defconfig index 9433434..6943e68 100644 --- a/configs/mx28evk_defconfig +++ b/configs/mx28evk_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_MMC" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/mx28evk_nand_defconfig b/configs/mx28evk_nand_defconfig index 1f3f169..0d9d54c 100644 --- a/configs/mx28evk_nand_defconfig +++ b/configs/mx28evk_nand_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_NAND" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/mx28evk_spi_defconfig b/configs/mx28evk_spi_defconfig index 40c0302..f2b8952 100644 --- a/configs/mx28evk_spi_defconfig +++ b/configs/mx28evk_spi_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="ENV_IS_IN_SPI_FLASH" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/mx6dlsabreauto_defconfig b/configs/mx6dlsabreauto_defconfig index f0d362b..84abcb0 100644 --- a/configs/mx6dlsabreauto_defconfig +++ b/configs/mx6dlsabreauto_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6dl.cfg,MX6 CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index c60ec3a..b8e7ddf 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6qpsabreauto_defconfig b/configs/mx6qpsabreauto_defconfig index 0529fb1..a415d78 100644 --- a/configs/mx6qpsabreauto_defconfig +++ b/configs/mx6qpsabreauto_defconfig @@ -5,4 +5,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6qp.cfg,MX6 CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6qsabreauto_defconfig b/configs/mx6qsabreauto_defconfig index 8cf7d46..8a0acf5 100644 --- a/configs/mx6qsabreauto_defconfig +++ b/configs/mx6qsabreauto_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/imximage.cfg, CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index ff2cc51..cd5761a 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6qsabresd_defconfig b/configs/mx6qsabresd_defconfig index 6f47b7b..680a25b 100644 --- a/configs/mx6qsabresd_defconfig +++ b/configs/mx6qsabresd_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6q_4x_mt41j128 CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6sabresd_spl_defconfig b/configs/mx6sabresd_spl_defconfig index 1850cd3..7929b3b 100644 --- a/configs/mx6sabresd_spl_defconfig +++ b/configs/mx6sabresd_spl_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,SPL,MX6Q" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/mx6slevk_defconfig b/configs/mx6slevk_defconfig index 6cea2e0..54d6ec4 100644 --- a/configs/mx6slevk_defconfig +++ b/configs/mx6slevk_defconfig @@ -9,5 +9,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6slevk_spinor_defconfig b/configs/mx6slevk_spinor_defconfig index 40de0ca..c9fe36f 100644 --- a/configs/mx6slevk_spinor_defconfig +++ b/configs/mx6slevk_spinor_defconfig @@ -9,5 +9,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6slevk_spl_defconfig b/configs/mx6slevk_spl_defconfig index 56b88ac..9a0b897 100644 --- a/configs/mx6slevk_spl_defconfig +++ b/configs/mx6slevk_spl_defconfig @@ -7,5 +7,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_THERMAL=y diff --git a/configs/mx6sxsabreauto_defconfig b/configs/mx6sxsabreauto_defconfig index 3616c82..ff44bf8 100644 --- a/configs/mx6sxsabreauto_defconfig +++ b/configs/mx6sxsabreauto_defconfig @@ -9,4 +9,4 @@ CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index 5d7b7c7..f5ac8be 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 97454f3..fda7112 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index c2d223b..cf01f02 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index c639212..a0c7db0 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index ff19c5d..0fdf008 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -7,5 +7,5 @@ CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index bdd3830..bad3028 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 0b61988..a643c7a 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,M CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 434cdb1..6f71a7b 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg, CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index 0d4b14b..3078945 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index 84da2e0..3716f97 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg, CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 2bdd51d..253cf91 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -7,4 +7,4 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index fc29407..c3eca0c 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -20,7 +20,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_TPM_TIS_INFINEON=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index 63b7243..ed8f098 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -8,6 +8,6 @@ CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/ot1200_defconfig b/configs/ot1200_defconfig index c624dc4..10f6c2d 100644 --- a/configs/ot1200_defconfig +++ b/configs/ot1200_defconfig @@ -7,7 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/bachmann/ot1200/mx6q_4x_mt41j128.cfg, CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y diff --git a/configs/ot1200_spl_defconfig b/configs/ot1200_spl_defconfig index 8b1daea..d1db287 100644 --- a/configs/ot1200_spl_defconfig +++ b/configs/ot1200_spl_defconfig @@ -8,7 +8,7 @@ CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,MX6Q" CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 1fc8143..373db4a 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_USB=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 6b4e6ed..27caf44 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_PCI_TEGRA=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index ee2f355..01c50c3 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_USB=y diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 8adb114..3df6874 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 1a452bb..4d554c7 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 2c2bd45..33fc805 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -23,7 +23,7 @@ CONFIG_CROS_EC_SPI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y CONFIG_DM_REGULATOR=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 6634387..3889628 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -23,7 +23,7 @@ CONFIG_CROS_EC_SPI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y CONFIG_DM_REGULATOR=y diff --git a/configs/porter_defconfig b/configs/porter_defconfig index 7fff267..2587350 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 9ce9a3e..4f58d7c 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -6,5 +6,5 @@ CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/pr1_defconfig b/configs/pr1_defconfig index 2f92389..efc1912 100644 --- a/configs/pr1_defconfig +++ b/configs/pr1_defconfig @@ -7,6 +7,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index b270e4e..cba2c06 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index 6d3c4af..d20d579 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -17,8 +17,8 @@ CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_DM_PCI=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index 7b32177..df740aa 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/riotboard_defconfig b/configs/riotboard_defconfig index f8e43ab..176a1eb 100644 --- a/configs/riotboard_defconfig +++ b/configs/riotboard_defconfig @@ -8,5 +8,5 @@ CONFIG_CMD_GPIO=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SST=y +CONFIG_SPI_NOR_SST=y CONFIG_DM_THERMAL=y diff --git a/configs/rut_defconfig b/configs/rut_defconfig index cfb9d61..6598211 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 0d8815a..dfc3190 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -46,11 +46,11 @@ CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_ATMEL=y CONFIG_SPI_FLASH_EON=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y CONFIG_DM_PCI=y CONFIG_PCI_SANDBOX=y diff --git a/configs/sh7752evb_defconfig b/configs/sh7752evb_defconfig index 5754fe5..91df9e1 100644 --- a/configs/sh7752evb_defconfig +++ b/configs/sh7752evb_defconfig @@ -19,6 +19,6 @@ CONFIG_TARGET_SH7752EVB=y # CONFIG_CMD_MISC is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7753evb_defconfig b/configs/sh7753evb_defconfig index ae46a8f..9a9c5d5 100644 --- a/configs/sh7753evb_defconfig +++ b/configs/sh7753evb_defconfig @@ -18,6 +18,6 @@ CONFIG_TARGET_SH7753EVB=y # CONFIG_CMD_MISC is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/sh7757lcr_defconfig b/configs/sh7757lcr_defconfig index 51f9061..8b54203 100644 --- a/configs/sh7757lcr_defconfig +++ b/configs/sh7757lcr_defconfig @@ -19,5 +19,5 @@ CONFIG_TARGET_SH7757LCR=y # CONFIG_CMD_MISC is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_USE_PRIVATE_LIBGCC=y diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 82f9034..2e06549 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index b08a266..c48a519 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -15,7 +15,7 @@ CONFIG_DM_I2C_COMPAT=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y CONFIG_DM_REGULATOR=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 3dde244..c3e8bbd 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -12,7 +12,7 @@ CONFIG_DM_I2C_COMPAT=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y CONFIG_EXYNOS_SPI=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 93150ef..85699e2 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -24,7 +24,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y CONFIG_PMIC_S5M8767=y diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 40d46f8..cfe05bc 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 5db6c42..82a1ad8 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index d6d5a81..2ffd7bb 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 937a66b..77d869d 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_SIMPLE_BUS=y CONFIG_DWAPB_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 37a3250..ad0b5d9 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -24,7 +24,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_FLASH_GIGADEVICE=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y CONFIG_PMIC_S5M8767=y diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 7572ade..a6ab9ba 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -20,4 +20,4 @@ CONFIG_SH_SDHI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y diff --git a/configs/stv0991_defconfig b/configs/stv0991_defconfig index cce8818..4aea344 100644 --- a/configs/stv0991_defconfig +++ b/configs/stv0991_defconfig @@ -11,8 +11,8 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_NETDEVICES=y CONFIG_ETH_DESIGNWARE=y CONFIG_CADENCE_QSPI=y diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 40e1d55..21db7c1 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -13,5 +13,5 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_USE_TINY_PRINTF=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 1bf50b9..24a3830 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA20_SLINK=y CONFIG_USB=y diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 4e38380..d848859 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -15,8 +15,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/theadorable_defconfig b/configs/theadorable_defconfig index c87de72..60f2e6e 100644 --- a/configs/theadorable_defconfig +++ b/configs/theadorable_defconfig @@ -15,8 +15,8 @@ CONFIG_CMD_SF=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_MACRONIX=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_DEBUG_UART_CLOCK=250000000 diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index d1e1eb3..fbb3ed2 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -11,5 +11,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y diff --git a/configs/tqma6q_mba6_mmc_defconfig b/configs/tqma6q_mba6_mmc_defconfig index 99d704e..dafdb55 100644 --- a/configs/tqma6q_mba6_mmc_defconfig +++ b/configs/tqma6q_mba6_mmc_defconfig @@ -6,4 +6,4 @@ CONFIG_TARGET_TQMA6=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/tqma6q_mba6_spi_defconfig b/configs/tqma6q_mba6_spi_defconfig index d14e841..9e06149 100644 --- a/configs/tqma6q_mba6_spi_defconfig +++ b/configs/tqma6q_mba6_spi_defconfig @@ -7,4 +7,4 @@ CONFIG_TQMA6X_SPI_BOOT=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/tqma6s_mba6_mmc_defconfig b/configs/tqma6s_mba6_mmc_defconfig index 387e9b4..cf5dd61 100644 --- a/configs/tqma6s_mba6_mmc_defconfig +++ b/configs/tqma6s_mba6_mmc_defconfig @@ -7,4 +7,4 @@ CONFIG_TQMA6S=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/tqma6s_mba6_spi_defconfig b/configs/tqma6s_mba6_spi_defconfig index 0a4c4f6..133c82d 100644 --- a/configs/tqma6s_mba6_spi_defconfig +++ b/configs/tqma6s_mba6_spi_defconfig @@ -8,4 +8,4 @@ CONFIG_TQMA6X_SPI_BOOT=y CONFIG_CMD_GPIO=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 0136342..3b6a067 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_PCI_TEGRA=y CONFIG_SYS_NS16550=y CONFIG_TEGRA20_SFLASH=y diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig index 0354ae6..70fc6ce 100644 --- a/configs/tseries_spi_defconfig +++ b/configs/tseries_spi_defconfig @@ -18,5 +18,5 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_NOR_STMICRO=y CONFIG_SYS_NS16550=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index b40cbbc..2368b18 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_SYS_NS16550=y CONFIG_TEGRA114_SPI=y CONFIG_USB=y diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index db02ba3..7922d74 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -13,9 +13,9 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y CONFIG_MTD_M25P80=y diff --git a/configs/zynq_zc702_defconfig b/configs/zynq_zc702_defconfig index 8c96a2e..2772b0d 100644 --- a/configs/zynq_zc702_defconfig +++ b/configs/zynq_zc702_defconfig @@ -15,9 +15,9 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y diff --git a/configs/zynq_zc706_defconfig b/configs/zynq_zc706_defconfig index ce9a2ef..502e766 100644 --- a/configs/zynq_zc706_defconfig +++ b/configs/zynq_zc706_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index f45b043..78cc4c5 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -17,10 +17,10 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_SST=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_SST=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index d7eb77d..4852b26 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -16,8 +16,8 @@ CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_BAR=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_NOR_SPANSION=y +CONFIG_SPI_NOR_STMICRO=y +CONFIG_SPI_NOR_WINBOND=y CONFIG_ZYNQ_GEM=y CONFIG_ZYNQ_QSPI=y diff --git a/configs/zynq_zybo_defconfig b/configs/zynq_zybo_defconfig index 5bc9278..5ba4ac3 100644 --- a/configs/zynq_zybo_defconfig +++ b/configs/zynq_zybo_defconfig @@ -15,7 +15,7 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_NOR_SPANSION=y CONFIG_ZYNQ_GEM=y CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_ZYNQ=y diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 3a82c49..ffed6bc 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -62,27 +62,27 @@ config SPI_NOR_MISC Add support for various Atmel, EON, ESMT, Everspin, Fujitsu, GigaDevice, Intel, ISSI, PMC and non-JEDEC SPI NOR flash chips.
-config SPI_FLASH_MACRONIX +config SPI_NOR_MACRONIX bool "Macronix SPI flash support" help Add support for various Macronix SPI flash chips (MX25Lxxx)
-config SPI_FLASH_SPANSION +config SPI_NOR_SPANSION bool "Spansion SPI flash support" help Add support for various Spansion SPI flash chips (S25FLxxx)
-config SPI_FLASH_STMICRO +config SPI_NOR_STMICRO bool "STMicro SPI flash support" help Add support for various STMicro SPI flash chips (M25Pxxx and N25Qxxx)
-config SPI_FLASH_SST +config SPI_NOR_SST bool "SST SPI flash support" help Add support for various SST SPI flash chips (SST25xxx)
-config SPI_FLASH_WINBOND +config SPI_NOR_WINBOND bool "Winbond SPI flash support" help Add support for various Winbond SPI flash chips (W25xxx) diff --git a/drivers/mtd/spi-nor/spi-nor-ids.c b/drivers/mtd/spi-nor/spi-nor-ids.c index f6ee627..4c22140 100644 --- a/drivers/mtd/spi-nor/spi-nor-ids.c +++ b/drivers/mtd/spi-nor/spi-nor-ids.c @@ -128,7 +128,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "is25lp064", INFO(0x9d6017, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, { "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256, SNOR_READ_BASE, 0) }, #endif -#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ +#ifdef CONFIG_SPI_NOR_MACRONIX /* MACRONIX */ /* Macronix */ { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1, SNOR_READ_BASE, SECT_4K) }, { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4, SNOR_READ_BASE, SECT_4K) }, @@ -146,7 +146,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, { "mx66l1g55g", INFO(0xc2261b, 0, 64 * 1024, 2048, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, #endif -#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ +#ifdef CONFIG_SPI_NOR_STMICRO /* STMICRO */ /* Micron */ { "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SNOR_READ_FULL, SNOR_WRITE_QUAD) }, { "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SNOR_READ_FULL, SNOR_WRITE_QUAD | SECT_4K) }, @@ -164,7 +164,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SNOR_READ_BASE, SECT_4K_PMC) }, { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024, 64, SNOR_READ_BASE, SECT_4K) }, #endif -#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ +#ifdef CONFIG_SPI_NOR_SPANSION /* SPANSION */ /* Spansion -- single (large) sector size only, at least * for the chips listed here (without boot sectors). */ @@ -193,7 +193,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "s25fl164k", INFO(0x014017, 0, 64 * 1024, 128, SNOR_READ_BASE, SECT_4K) }, { "s25fl204k", INFO(0x014013, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K) }, #endif -#ifdef CONFIG_SPI_FLASH_SST /* SST */ +#ifdef CONFIG_SPI_NOR_SST /* SST */ /* SST -- large erase sizes are "overlays", "sectors" are 4K */ { "sst25vf040b", INFO(0xbf258d, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, { "sst25vf080b", INFO(0xbf258e, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, @@ -209,7 +209,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, { "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SNOR_READ_BASE, SECT_4K | SST_WRITE) }, #endif -#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ +#ifdef CONFIG_SPI_NOR_STMICRO /* STMICRO */ /* ST Microelectronics -- newer production may have feature updates */ { "m25p05", INFO(0x202010, 0, 32 * 1024, 2, SNOR_READ_BASE, 0) }, { "m25p10", INFO(0x202011, 0, 32 * 1024, 4, SNOR_READ_BASE, 0) }, @@ -246,7 +246,7 @@ const struct spi_nor_info spi_nor_ids[] = { { "m25px64", INFO(0x207117, 0, 64 * 1024, 128, SNOR_READ_BASE, 0) }, { "m25px80", INFO(0x207114, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, #endif -#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ +#ifdef CONFIG_SPI_NOR_WINBOND /* WINBOND */ /* Winbond -- w25x "blocks" are 64K, "sectors" are 4KiB */ { "W25P80", INFO(0xef2014, 0, 64 * 1024, 16, SNOR_READ_BASE, 0) }, { "W25P16", INFO(0xef2015, 0, 64 * 1024, 32, SNOR_READ_BASE, 0) }, diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 130f7af..8cf95a5 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -74,7 +74,7 @@ static int write_sr(struct spi_nor *nor, u8 ws) return nor->write_reg(nor, SNOR_OP_WRSR, nor->cmd_buf, 1); }
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_NOR_SPANSION) || defined(CONFIG_SPI_NOR_WINBOND) static int read_cr(struct spi_nor *nor) { u8 cr; @@ -104,7 +104,7 @@ static int write_sr_cr(struct spi_nor *nor, u16 val) } #endif
-#ifdef CONFIG_SPI_FLASH_STMICRO +#ifdef CONFIG_SPI_NOR_STMICRO static int read_evcr(struct spi_nor *nor) { u8 evcr; @@ -264,7 +264,7 @@ static void spi_nor_dual(struct spi_nor *nor, u32 *addr) } #endif
-#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) +#if defined(CONFIG_SPI_NOR_STMICRO) || defined(CONFIG_SPI_NOR_SST) static void stm_get_locked_range(struct spi_nor *nor, u8 sr, loff_t *ofs, uint64_t *len) { @@ -676,7 +676,7 @@ static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len, return ret; }
-#ifdef CONFIG_SPI_FLASH_SST +#ifdef CONFIG_SPI_NOR_SST static int sst_byte_write(struct spi_nor *nor, u32 offset, const void *buf, size_t *retlen) { @@ -784,7 +784,7 @@ static int sst_write_bp(struct mtd_info *mtd, loff_t offset, size_t len, } #endif
-#ifdef CONFIG_SPI_FLASH_MACRONIX +#ifdef CONFIG_SPI_NOR_MACRONIX static int macronix_quad_enable(struct spi_nor *nor) { int ret, val; @@ -815,7 +815,7 @@ static int macronix_quad_enable(struct spi_nor *nor) } #endif
-#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_NOR_SPANSION) || defined(CONFIG_SPI_NOR_WINBOND) static int spansion_quad_enable(struct spi_nor *nor) { int ret, val; @@ -847,7 +847,7 @@ static int spansion_quad_enable(struct spi_nor *nor) } #endif
-#ifdef CONFIG_SPI_FLASH_STMICRO +#ifdef CONFIG_SPI_NOR_STMICRO static int micron_quad_enable(struct spi_nor *nor) { int ret, val; @@ -877,16 +877,16 @@ static int micron_quad_enable(struct spi_nor *nor) static int set_quad_mode(struct spi_nor *nor, const struct spi_nor_info *info) { switch (JEDEC_MFR(info)) { -#ifdef CONFIG_SPI_FLASH_MACRONIX +#ifdef CONFIG_SPI_NOR_MACRONIX case SNOR_MFR_MACRONIX: return macronix_quad_enable(nor); #endif -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) +#if defined(CONFIG_SPI_NOR_SPANSION) || defined(CONFIG_SPI_NOR_WINBOND) case SNOR_MFR_SPANSION: case SNOR_MFR_WINBOND: return spansion_quad_enable(nor); #endif -#ifdef CONFIG_SPI_FLASH_STMICRO +#ifdef CONFIG_SPI_NOR_STMICRO case SNOR_MFR_MICRON: return micron_quad_enable(nor); #endif @@ -985,7 +985,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->flags |= SNOR_F_SST_WRITE;
mtd->_write = spi_nor_write; -#if defined(CONFIG_SPI_FLASH_SST) +#if defined(CONFIG_SPI_NOR_SST) if (nor->flags & SNOR_F_SST_WRITE) { if (nor->mode & SNOR_WRITE_1_1_BYTE) mtd->_write = sst_write_bp; @@ -994,7 +994,7 @@ int spi_nor_scan(struct spi_nor *nor) } #endif
-#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) +#if defined(CONFIG_SPI_NOR_STMICRO) || defined(CONFIG_SPI_NOR_SST) /* NOR protection support for STmicro/Micron chips and similar */ if (JEDEC_MFR(info) == SNOR_MFR_MICRON || JEDEC_MFR(info) == SNOR_MFR_SST) { diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 9dd883f..b07c751 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -44,8 +44,8 @@ #define CONFIG_CMD_SF #define CONFIG_MTD_SPI_NOR #define CONFIG_MTD_M25P80 -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_NOR_STMICRO +#define CONFIG_SPI_NOR_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index f0de827..69c1d94 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -52,7 +52,7 @@ /* SPI NOR flash default params, used by sf commands */ #define CONFIG_SF_DEFAULT_SPEED 1000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_NOR_STMICRO
/* * SDIO/MMC Card Configuration diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 6150bc1..e5e2793 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -204,8 +204,8 @@ #ifdef CONFIG_FSL_DSPI #define CONFIG_CMD_SF #define CONFIG_DM_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO /* cs0 */ -#define CONFIG_SPI_FLASH_SST /* cs1 */ +#define CONFIG_SPI_NOR_STMICRO /* cs0 */ +#define CONFIG_SPI_NOR_SST /* cs1 */ #define CONFIG_SPI_FLASH_EON /* cs2 */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SF_DEFAULT_BUS 1 diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index 4ab8e13..bec7e24 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -373,7 +373,7 @@ unsigned long get_board_ddr_clk(void); #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_FSL_QSPI #ifdef CONFIG_FSL_QSPI -#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_NOR_SPANSION #define FSL_QSPI_FLASH_SIZE (1 << 24) #define FSL_QSPI_FLASH_NUM 2 #endif diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index 34c0989..0b43de2 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -204,7 +204,7 @@ #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 40000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_NOR_STMICRO #define FSL_QSPI_FLASH_NUM 1 #define FSL_QSPI_FLASH_SIZE SZ_32M #endif diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index a8248ac..86c44d0 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -265,7 +265,7 @@ #define CONFIG_CMD_SF #define CONFIG_MTD_SPI_NOR #define CONFIG_MTD_M25P80 -#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_NOR_MACRONIX #define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0

CONFIG_SPI_FLASH_ATMEL CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_GIGADEVICE CONFIG_SPI_FLASH_ISSI
All these configs are grouped in CONFIG_SPI_NOR_MISC
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/C29XPCIE_NAND_defconfig | 2 +- configs/C29XPCIE_NOR_SECBOOT_defconfig | 2 +- configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig | 2 +- configs/C29XPCIE_SPIFLASH_defconfig | 2 +- configs/C29XPCIE_defconfig | 2 +- configs/M54418TWR_defconfig | 2 +- configs/M54418TWR_nand_mii_defconfig | 2 +- configs/M54418TWR_nand_rmii_defconfig | 2 +- configs/M54418TWR_nand_rmii_lowfreq_defconfig | 2 +- configs/M54418TWR_serial_mii_defconfig | 2 +- configs/M54418TWR_serial_rmii_defconfig | 2 +- configs/T1024QDS_DDR4_SECURE_BOOT_defconfig | 2 +- configs/T1024QDS_DDR4_defconfig | 2 +- configs/T1024QDS_NAND_defconfig | 2 +- configs/T1024QDS_SDCARD_defconfig | 2 +- configs/T1024QDS_SECURE_BOOT_defconfig | 2 +- configs/T1024QDS_SPIFLASH_defconfig | 2 +- configs/T1024QDS_defconfig | 2 +- configs/T1040QDS_DDR4_defconfig | 2 +- configs/T1040QDS_SECURE_BOOT_defconfig | 2 +- configs/T1040QDS_defconfig | 2 +- configs/T2080QDS_NAND_defconfig | 2 +- configs/T2080QDS_SDCARD_defconfig | 2 +- configs/T2080QDS_SECURE_BOOT_defconfig | 2 +- configs/T2080QDS_SPIFLASH_defconfig | 2 +- configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/T2080QDS_defconfig | 2 +- configs/T2081QDS_NAND_defconfig | 2 +- configs/T2081QDS_SDCARD_defconfig | 2 +- configs/T2081QDS_SPIFLASH_defconfig | 2 +- configs/T2081QDS_SRIO_PCIE_BOOT_defconfig | 2 +- configs/T2081QDS_defconfig | 2 +- configs/at91sam9n12ek_mmc_defconfig | 2 +- configs/at91sam9n12ek_nandflash_defconfig | 2 +- configs/at91sam9n12ek_spiflash_defconfig | 2 +- configs/at91sam9x5ek_dataflash_defconfig | 2 +- configs/at91sam9x5ek_mmc_defconfig | 2 +- configs/at91sam9x5ek_nandflash_defconfig | 2 +- configs/at91sam9x5ek_spiflash_defconfig | 2 +- configs/atngw100_defconfig | 2 +- configs/atngw100mkii_defconfig | 2 +- configs/bayleybay_defconfig | 2 +- configs/bf525-ucr2_defconfig | 2 +- configs/bf527-sdp_defconfig | 3 +-- configs/bf537-stamp_defconfig | 3 +-- configs/bf561-acvilon_defconfig | 2 +- configs/bf609-ezkit_defconfig | 3 +-- configs/chromebook_link_defconfig | 2 +- configs/chromebox_panther_defconfig | 2 +- configs/cm_fx6_defconfig | 4 +--- configs/coreboot-x86_defconfig | 2 +- configs/crownbay_defconfig | 2 +- configs/ethernut5_defconfig | 2 +- configs/galileo_defconfig | 2 +- configs/gplugd_defconfig | 2 +- configs/ls1021atwr_qspi_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/minnowmax_defconfig | 2 +- configs/peach-pi_defconfig | 2 +- configs/peach-pit_defconfig | 2 +- configs/qemu-x86_defconfig | 2 +- configs/sama5d3xek_mmc_defconfig | 2 +- configs/sama5d3xek_nandflash_defconfig | 2 +- configs/sama5d3xek_spiflash_defconfig | 2 +- configs/sama5d4_xplained_mmc_defconfig | 2 +- configs/sama5d4_xplained_nandflash_defconfig | 2 +- configs/sama5d4_xplained_spiflash_defconfig | 2 +- configs/sama5d4ek_mmc_defconfig | 2 +- configs/sama5d4ek_nandflash_defconfig | 2 +- configs/sama5d4ek_spiflash_defconfig | 2 +- configs/sandbox_defconfig | 4 +--- configs/smdk5250_defconfig | 2 +- configs/smdk5420_defconfig | 2 +- configs/snow_defconfig | 2 +- configs/spring_defconfig | 2 +- examples/standalone/Makefile | 2 +- include/configs/chromebook_jerry.h | 2 +- include/configs/ls1043a_common.h | 2 +- include/configs/rk3036_common.h | 2 +- include/configs/sama5d2_xplained.h | 2 +- include/configs/zynq-common.h | 2 +- 81 files changed, 81 insertions(+), 88 deletions(-)
diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index dfd8f91..8b9de28 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -6,7 +6,7 @@ CONFIG_TPL=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/C29XPCIE_NOR_SECBOOT_defconfig b/configs/C29XPCIE_NOR_SECBOOT_defconfig index 199b339..c9753c2 100644 --- a/configs/C29XPCIE_NOR_SECBOOT_defconfig +++ b/configs/C29XPCIE_NOR_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig index 31b3e30..fed39c2 100644 --- a/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig +++ b/configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/C29XPCIE_SPIFLASH_defconfig b/configs/C29XPCIE_SPIFLASH_defconfig index 13b67a2..c68fde5 100644 --- a/configs/C29XPCIE_SPIFLASH_defconfig +++ b/configs/C29XPCIE_SPIFLASH_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/C29XPCIE_defconfig b/configs/C29XPCIE_defconfig index 4af50fa..238666f 100644 --- a/configs/C29XPCIE_defconfig +++ b/configs/C29XPCIE_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_C29XPCIE=y CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_SPANSION=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/M54418TWR_defconfig b/configs/M54418TWR_defconfig index b019b63..da95871 100644 --- a/configs/M54418TWR_defconfig +++ b/configs/M54418TWR_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/M54418TWR_nand_mii_defconfig b/configs/M54418TWR_nand_mii_defconfig index eedee6c..14e36ce 100644 --- a/configs/M54418TWR_nand_mii_defconfig +++ b/configs/M54418TWR_nand_mii_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/M54418TWR_nand_rmii_defconfig b/configs/M54418TWR_nand_rmii_defconfig index c8000a8..528b706 100644 --- a/configs/M54418TWR_nand_rmii_defconfig +++ b/configs/M54418TWR_nand_rmii_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/M54418TWR_nand_rmii_lowfreq_defconfig b/configs/M54418TWR_nand_rmii_lowfreq_defconfig index 184936b..2e9e945 100644 --- a/configs/M54418TWR_nand_rmii_lowfreq_defconfig +++ b/configs/M54418TWR_nand_rmii_lowfreq_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/M54418TWR_serial_mii_defconfig b/configs/M54418TWR_serial_mii_defconfig index fd827e3..83bf3fd 100644 --- a/configs/M54418TWR_serial_mii_defconfig +++ b/configs/M54418TWR_serial_mii_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/M54418TWR_serial_rmii_defconfig b/configs/M54418TWR_serial_rmii_defconfig index b019b63..da95871 100644 --- a/configs/M54418TWR_serial_rmii_defconfig +++ b/configs/M54418TWR_serial_rmii_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="-> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig index 9b2d38c..9709d6a 100644 --- a/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_DDR4_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1024QDS_DDR4_defconfig b/configs/T1024QDS_DDR4_defconfig index 4dc0b3b..d37dd1f 100644 --- a/configs/T1024QDS_DDR4_defconfig +++ b/configs/T1024QDS_DDR4_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_SYS_NS16550=y diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 8f16084..30c116e 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index a4dee46..75a49f3 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1024QDS_SECURE_BOOT_defconfig b/configs/T1024QDS_SECURE_BOOT_defconfig index b16a71a..f535b98 100644 --- a/configs/T1024QDS_SECURE_BOOT_defconfig +++ b/configs/T1024QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index 442a242..bef3e71 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1024QDS_defconfig b/configs/T1024QDS_defconfig index e6b351a..e8eb5d1 100644 --- a/configs/T1024QDS_defconfig +++ b/configs/T1024QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T102XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1040QDS_DDR4_defconfig b/configs/T1040QDS_DDR4_defconfig index 20c71da..0694e43 100644 --- a/configs/T1040QDS_DDR4_defconfig +++ b/configs/T1040QDS_DDR4_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SYS_FSL_DDR4" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1040QDS_SECURE_BOOT_defconfig b/configs/T1040QDS_SECURE_BOOT_defconfig index 7652128..685c9f1 100644 --- a/configs/T1040QDS_SECURE_BOOT_defconfig +++ b/configs/T1040QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T1040QDS_defconfig b/configs/T1040QDS_defconfig index f1cc4f0..af45eaa 100644 --- a/configs/T1040QDS_defconfig +++ b/configs/T1040QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T1040QDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index b8dca69..815a613 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 70e681f..b114453 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig index 4b965a0..f7888b7 100644 --- a/configs/T2080QDS_SECURE_BOOT_defconfig +++ b/configs/T2080QDS_SECURE_BOOT_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SECURE_BOOT" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index d703ddb..d6f05bb 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig index 6293533..50f81c0 100644 --- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig index 5cd1724..e25956c 100644 --- a/configs/T2080QDS_defconfig +++ b/configs/T2080QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index e93ca08..9be89c0 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 80fbb87..435ac20 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index af7e5e3..b155254 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -5,7 +5,7 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig index d58f75f..5196759 100644 --- a/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig +++ b/configs/T2081QDS_SRIO_PCIE_BOOT_defconfig @@ -6,7 +6,7 @@ CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,SRIO_PCIE_BOOT_SLAVE,SYS_TEXT_BASE=0xFFF4000 # CONFIG_CMD_FLASH is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/T2081QDS_defconfig b/configs/T2081QDS_defconfig index 7f1c69b..03362f6 100644 --- a/configs/T2081QDS_defconfig +++ b/configs/T2081QDS_defconfig @@ -4,7 +4,7 @@ CONFIG_TARGET_T208XQDS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081" CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_SST=y CONFIG_NETDEVICES=y diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index fb7d1d8..eb74314 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -9,4 +9,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index c70568d..642ff38 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index cf6bc9b..aff0fb1 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index 17d8643..5216ffc 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index b759cfe..8ed396d 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 5db48d1..0abdaf5 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -11,4 +11,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 98e5b88..efcf106 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -11,4 +11,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/atngw100_defconfig b/configs/atngw100_defconfig index 56ab790..668b49e 100644 --- a/configs/atngw100_defconfig +++ b/configs/atngw100_defconfig @@ -12,4 +12,4 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/atngw100mkii_defconfig b/configs/atngw100mkii_defconfig index fa6e3f8..09904be 100644 --- a/configs/atngw100mkii_defconfig +++ b/configs/atngw100mkii_defconfig @@ -11,4 +11,4 @@ CONFIG_AUTOBOOT_STOP_STR=" " # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/bayleybay_defconfig b/configs/bayleybay_defconfig index eade706..32d567b 100644 --- a/configs/bayleybay_defconfig +++ b/configs/bayleybay_defconfig @@ -22,7 +22,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y diff --git a/configs/bf525-ucr2_defconfig b/configs/bf525-ucr2_defconfig index 416ffc0..644002f 100644 --- a/configs/bf525-ucr2_defconfig +++ b/configs/bf525-ucr2_defconfig @@ -7,4 +7,4 @@ CONFIG_TARGET_BF525_UCR2=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig index d74f1df..6f8aa33 100644 --- a/configs/bf527-sdp_defconfig +++ b/configs/bf527-sdp_defconfig @@ -7,8 +7,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_NFS is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig index c3161fa..6e98854 100644 --- a/configs/bf537-stamp_defconfig +++ b/configs/bf537-stamp_defconfig @@ -5,8 +5,7 @@ CONFIG_CMD_GPIO=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig index 171de78..3207107 100644 --- a/configs/bf561-acvilon_defconfig +++ b/configs/bf561-acvilon_defconfig @@ -7,6 +7,6 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y CONFIG_LIB_RAND=y diff --git a/configs/bf609-ezkit_defconfig b/configs/bf609-ezkit_defconfig index de8d28c..4f76941 100644 --- a/configs/bf609-ezkit_defconfig +++ b/configs/bf609-ezkit_defconfig @@ -4,8 +4,7 @@ CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 97c50f0..408aef1 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -29,7 +29,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PCI=y diff --git a/configs/chromebox_panther_defconfig b/configs/chromebox_panther_defconfig index 8b9f04a..3be3103 100644 --- a/configs/chromebox_panther_defconfig +++ b/configs/chromebox_panther_defconfig @@ -23,7 +23,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_LPC=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PCI=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig index 0029445..4033e4b 100644 --- a/configs/cm_fx6_defconfig +++ b/configs/cm_fx6_defconfig @@ -19,9 +19,7 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index 48a8fa8..76af89c 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -13,7 +13,7 @@ CONFIG_CMD_TPM_TEST=y CONFIG_OF_CONTROL=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index dfc6b0f..2ebee29 100644 --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -20,7 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SST=y CONFIG_SPI_NOR_WINBOND=y diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig index b3d4f82..de50435 100644 --- a/configs/ethernut5_defconfig +++ b/configs/ethernut5_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_PROMPT="U-Boot> " # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/galileo_defconfig b/configs/galileo_defconfig index d111024..465500e 100644 --- a/configs/galileo_defconfig +++ b/configs/galileo_defconfig @@ -16,7 +16,7 @@ CONFIG_OF_CONTROL=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index 7c3de52..59fbfb1 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -6,6 +6,6 @@ CONFIG_TARGET_GPLUGD=y # CONFIG_CMD_SETEXPR is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SYS_NS16550=y diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index a850276..2e8e951 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -9,7 +9,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 6be898d..05f0806 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -8,7 +8,7 @@ CONFIG_OF_CONTROL=y CONFIG_DM=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_STMICRO=y CONFIG_NETDEVICES=y CONFIG_E1000=y diff --git a/configs/minnowmax_defconfig b/configs/minnowmax_defconfig index 839cd63..58115ac 100644 --- a/configs/minnowmax_defconfig +++ b/configs/minnowmax_defconfig @@ -21,7 +21,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_STMICRO=y CONFIG_SPI_NOR_WINBOND=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 33fc805..7e77fec 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -22,7 +22,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 3889628..ad38604 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -22,7 +22,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_SPI=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_PMIC_TPS65090=y diff --git a/configs/qemu-x86_defconfig b/configs/qemu-x86_defconfig index d20d579..b9de008 100644 --- a/configs/qemu-x86_defconfig +++ b/configs/qemu-x86_defconfig @@ -16,7 +16,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_ETH=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index 72796db..acfbff8 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_MMC" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index b84ba0f..f2e1270 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_NANDFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 623680d..623bcaa 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -8,4 +8,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D3,SYS_USE_SERIALFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index db69bdb..57267f6 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index 1faf841..7da4f57 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 9af4b41..da2737f 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 7f307ac..4eb9246 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_MMC" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 549d70d..1c02423 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_NANDFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index d8fb502..61ae45f 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -10,4 +10,4 @@ CONFIG_SYS_EXTRA_OPTIONS="SAMA5D4,SYS_USE_SERIALFLASH" # CONFIG_CMD_FPGA is not set CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y +CONFIG_SPI_NOR_MISC=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index dfc3190..0d1825f 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -43,9 +43,7 @@ CONFIG_DM_MMC=y CONFIG_SPI_NOR_SANDBOX=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_ATMEL=y -CONFIG_SPI_FLASH_EON=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index c48a519..813584e 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -14,7 +14,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_DM_I2C_COMPAT=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index c3e8bbd..dddaa60 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -11,7 +11,7 @@ CONFIG_CMD_GPIO=y CONFIG_DM_I2C_COMPAT=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_REGULATOR=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 85699e2..2c17432 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -23,7 +23,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index ad0b5d9..9f289d5 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -23,7 +23,7 @@ CONFIG_CROS_EC=y CONFIG_CROS_EC_I2C=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_WINBOND=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_MAX77686=y diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 5a6ae00..ef51f21 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -8,7 +8,7 @@ extra-y := hello_world extra-$(CONFIG_SMC91111) += smc91111_eeprom extra-$(CONFIG_SMC911X) += smc911x_eeprom -extra-$(CONFIG_SPI_FLASH_ATMEL) += atmel_df_pow2 +extra-$(CONFIG_SPI_NOR_MISC) += atmel_df_pow2 extra-$(CONFIG_MPC5xxx) += interrupt extra-$(CONFIG_8xx) += test_burst timer extra-$(CONFIG_MPC8260) += mem_to_mem_idma2intr diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h index 67f45c0..ff17e1c 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/chromebook_jerry.h @@ -18,7 +18,7 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_NOR_MISC
#define CONFIG_CMD_SF_TEST #define CONFIG_CMD_TIME diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index e5e2793..22b2692 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -206,7 +206,7 @@ #define CONFIG_DM_SPI_FLASH #define CONFIG_SPI_NOR_STMICRO /* cs0 */ #define CONFIG_SPI_NOR_SST /* cs1 */ -#define CONFIG_SPI_FLASH_EON /* cs2 */ +#define CONFIG_SPI_NOR_MISC /* cs2 */ #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI) #define CONFIG_SF_DEFAULT_BUS 1 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index c38d0e2..a9b0367 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -70,7 +70,7 @@ #define CONFIG_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_NOR_MISC #define CONFIG_SF_DEFAULT_SPEED 20000000
#define CONFIG_CMD_I2C diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 272257e..b08829f 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -41,7 +41,7 @@ #ifdef CONFIG_CMD_SF #define CONFIG_ATMEL_SPI #define CONFIG_ATMEL_SPI0 -#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_NOR_MISC #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 30000000 diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 582b2a3..6feb912 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -65,7 +65,7 @@ /* QSPI */ #ifdef CONFIG_ZYNQ_QSPI # define CONFIG_SF_DEFAULT_SPEED 30000000 -# define CONFIG_SPI_FLASH_ISSI +# define CONFIG_SPI_NOR_MISC # define CONFIG_CMD_SF #endif

Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
CONFIG_SPI_FLASH_ATMEL CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_GIGADEVICE CONFIG_SPI_FLASH_ISSI
All these configs are grouped in CONFIG_SPI_NOR_MISC
So these 4 configs are no longer needed? But I see they are still in the x86 config files, like the one we discussed here [1]. Should we remove them?
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
[1] http://patchwork.ozlabs.org/patch/549644/
[snip]
Regards, Bin

Hi Bin,
On 17 February 2016 at 14:23, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
CONFIG_SPI_FLASH_ATMEL CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_GIGADEVICE CONFIG_SPI_FLASH_ISSI
All these configs are grouped in CONFIG_SPI_NOR_MISC
So these 4 configs are no longer needed? But I see they are still in the x86 config files, like the one we discussed here [1]. Should we remove them?
I have updated them as well, in all x86 files too.
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index dfc6b0f..2ebee29 100644 (file) --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -20,7 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SST=y CONFIG_SPI_NOR_WINBOND=y
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
thanks!

Hi Jagan,
On Wed, Feb 17, 2016 at 5:05 PM, Jagan Teki jteki@openedev.com wrote:
Hi Bin,
On 17 February 2016 at 14:23, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
CONFIG_SPI_FLASH_ATMEL CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_GIGADEVICE CONFIG_SPI_FLASH_ISSI
All these configs are grouped in CONFIG_SPI_NOR_MISC
So these 4 configs are no longer needed? But I see they are still in the x86 config files, like the one we discussed here [1]. Should we remove them?
I have updated them as well, in all x86 files too.
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index dfc6b0f..2ebee29 100644 (file) --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -20,7 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SST=y CONFIG_SPI_NOR_WINBOND=y
So how about the others? Looks a follow-up patch is needed to clean up the other configs? Each x86 board just have one type of SPI flash (and one driver instead)
Regards, Bin

Hi Bin,
On 17 February 2016 at 14:39, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Wed, Feb 17, 2016 at 5:05 PM, Jagan Teki jteki@openedev.com wrote:
Hi Bin,
On 17 February 2016 at 14:23, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
CONFIG_SPI_FLASH_ATMEL CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_GIGADEVICE CONFIG_SPI_FLASH_ISSI
All these configs are grouped in CONFIG_SPI_NOR_MISC
So these 4 configs are no longer needed? But I see they are still in the x86 config files, like the one we discussed here [1]. Should we remove them?
I have updated them as well, in all x86 files too.
diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig index dfc6b0f..2ebee29 100644 (file) --- a/configs/crownbay_defconfig +++ b/configs/crownbay_defconfig @@ -20,7 +20,7 @@ CONFIG_OF_CONTROL=y CONFIG_CPU=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y -CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_NOR_MISC=y CONFIG_SPI_NOR_MACRONIX=y CONFIG_SPI_NOR_SST=y CONFIG_SPI_NOR_WINBOND=y
So how about the others? Looks a follow-up patch is needed to clean up the other configs? Each x86 board just have one type of SPI flash (and one driver instead)
Since the other configs have dependent code on spi-nor core, i have not touched that.
thanks!

mp2580 will take care of tx and rx mode's so there is no need to differentiate these into spi layer level hence replaced all mode_rx macros with mode.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- drivers/mtd/spi-nor/m25p80.c | 2 +- drivers/spi/ich.c | 6 ++---- drivers/spi/spi-uclass.c | 11 ++++------- drivers/spi/ti_qspi.c | 6 +++--- include/spi.h | 14 ++++---------- 5 files changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 7e2702d..58e879c 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -178,7 +178,7 @@ static int m25p80_spi_nor(struct spi_nor *nor) return ret; }
- switch (spi->mode_rx) { + switch (spi->mode) { case SPI_RX_SLOW: nor->read_mode = SNOR_READ; break; diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e543b8f..5f03508 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -678,10 +678,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */ - if (plat->ich_version == PCHV_7) { - slave->mode_rx = SPI_RX_SLOW; - slave->mode = SPI_TX_BYTE; - } + if (plat->ich_version == PCHV_7) + slave->mode = SPI_TX_BYTE | SPI_RX_SLOW;
return 0; } diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 0dfdd8b..ed6c771 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -181,7 +181,6 @@ static int spi_child_pre_probe(struct udevice *dev)
slave->max_hz = plat->max_hz; slave->mode = plat->mode; - slave->mode_rx = plat->mode_rx;
return 0; } @@ -393,7 +392,7 @@ void spi_free_slave(struct spi_slave *slave) int spi_slave_ofdata_to_platdata(const void *blob, int node, struct dm_spi_slave_platdata *plat) { - int mode = 0, mode_rx = 0; + int mode = 0; int value;
plat->cs = fdtdec_get_int(blob, node, "reg", -1); @@ -425,24 +424,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node, break; }
- plat->mode = mode; - value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1); switch (value) { case 1: break; case 2: - mode_rx |= SPI_RX_DUAL; + mode |= SPI_RX_DUAL; break; case 4: - mode_rx |= SPI_RX_QUAD; + mode |= SPI_RX_QUAD; break; default: error("spi-rx-bus-width %d not supported\n", value); break; }
- plat->mode_rx = mode_rx; + plat->mode = mode;
return 0; } diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index b5c974c..d9d65b4 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -338,7 +338,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS); - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; #else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval; - u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL); + u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL);
if (!enable) { writel(0, &priv->base->setup0); @@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD; - slave->mode_rx = SPI_RX_QUAD; + slave->mode |= SPI_RX_QUAD; break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL; diff --git a/include/spi.h b/include/spi.h index dd0b11b..61fefa4 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,12 +26,10 @@ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ - -/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ +#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -61,13 +59,11 @@ struct dm_spi_bus { * @cs: Chip select number (0..n-1) * @max_hz: Maximum bus speed that this slave can tolerate * @mode: SPI mode to use for this device (see SPI mode flags) - * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) */ struct dm_spi_slave_platdata { unsigned int cs; uint max_hz; uint mode; - u8 mode_rx; };
#endif /* CONFIG_DM_SPI */ @@ -94,7 +90,6 @@ struct dm_spi_slave_platdata { * bus (bus->seq) so does not need to be stored * @cs: ID of the chip select connected to the slave. * @mode: SPI mode to use for this slave (see SPI mode flags) - * @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags) * @wordlen: Size of SPI word in number of bits * @max_write_size: If non-zero, the maximum number of bytes which can * be written at once, excluding command bytes. @@ -112,7 +107,6 @@ struct spi_slave { unsigned int cs; #endif uint mode; - u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;

Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
mp2580 will take care of tx and rx mode's so there is no need to differentiate these into spi layer level hence replaced all mode_rx macros with mode.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
drivers/mtd/spi-nor/m25p80.c | 2 +- drivers/spi/ich.c | 6 ++---- drivers/spi/spi-uclass.c | 11 ++++------- drivers/spi/ti_qspi.c | 6 +++--- include/spi.h | 14 ++++---------- 5 files changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 7e2702d..58e879c 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -178,7 +178,7 @@ static int m25p80_spi_nor(struct spi_nor *nor) return ret; }
switch (spi->mode_rx) {
switch (spi->mode) { case SPI_RX_SLOW: nor->read_mode = SNOR_READ; break;
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e543b8f..5f03508 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -678,10 +678,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */
if (plat->ich_version == PCHV_7) {
slave->mode_rx = SPI_RX_SLOW;
slave->mode = SPI_TX_BYTE;
}
if (plat->ich_version == PCHV_7)
slave->mode = SPI_TX_BYTE | SPI_RX_SLOW;
This won't apply. Please rebase this series on top of origin/master. I plan to give a test against this series soon.
return 0;
} diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 0dfdd8b..ed6c771 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -181,7 +181,6 @@ static int spi_child_pre_probe(struct udevice *dev)
slave->max_hz = plat->max_hz; slave->mode = plat->mode;
slave->mode_rx = plat->mode_rx; return 0;
} @@ -393,7 +392,7 @@ void spi_free_slave(struct spi_slave *slave) int spi_slave_ofdata_to_platdata(const void *blob, int node, struct dm_spi_slave_platdata *plat) {
int mode = 0, mode_rx = 0;
int mode = 0; int value; plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -425,24 +424,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node, break; }
plat->mode = mode;
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1); switch (value) { case 1: break; case 2:
mode_rx |= SPI_RX_DUAL;
mode |= SPI_RX_DUAL; break; case 4:
mode_rx |= SPI_RX_QUAD;
mode |= SPI_RX_QUAD; break; default: error("spi-rx-bus-width %d not supported\n", value); break; }
plat->mode_rx = mode_rx;
plat->mode = mode; return 0;
} diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index b5c974c..d9d65b4 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -338,7 +338,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
slave->mode_rx = SPI_RX_QUAD;
slave->mode |= SPI_RX_QUAD;
#else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval;
u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); if (!enable) { writel(0, &priv->base->setup0);
@@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD;
slave->mode_rx = SPI_RX_QUAD;
slave->mode |= SPI_RX_QUAD; break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL;
diff --git a/include/spi.h b/include/spi.h index dd0b11b..61fefa4 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,12 +26,10 @@ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
-/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ +#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -61,13 +59,11 @@ struct dm_spi_bus {
- @cs: Chip select number (0..n-1)
- @max_hz: Maximum bus speed that this slave can tolerate
- @mode: SPI mode to use for this device (see SPI mode flags)
*/
- @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
struct dm_spi_slave_platdata { unsigned int cs; uint max_hz; uint mode;
u8 mode_rx;
};
#endif /* CONFIG_DM_SPI */ @@ -94,7 +90,6 @@ struct dm_spi_slave_platdata {
bus (bus->seq) so does not need to be stored
- @cs: ID of the chip select connected to the slave.
- @mode: SPI mode to use for this slave (see SPI mode flags)
- @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
- @wordlen: Size of SPI word in number of bits
- @max_write_size: If non-zero, the maximum number of bytes which can
be written at once, excluding command bytes.
@@ -112,7 +107,6 @@ struct spi_slave { unsigned int cs; #endif uint mode;
u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;
--
Regards, Bin

Hi Bin,
On 15 February 2016 at 16:46, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
mp2580 will take care of tx and rx mode's so there is no need to differentiate these into spi layer level hence replaced all mode_rx macros with mode.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
drivers/mtd/spi-nor/m25p80.c | 2 +- drivers/spi/ich.c | 6 ++---- drivers/spi/spi-uclass.c | 11 ++++------- drivers/spi/ti_qspi.c | 6 +++--- include/spi.h | 14 ++++---------- 5 files changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 7e2702d..58e879c 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -178,7 +178,7 @@ static int m25p80_spi_nor(struct spi_nor *nor) return ret; }
switch (spi->mode_rx) {
switch (spi->mode) { case SPI_RX_SLOW: nor->read_mode = SNOR_READ; break;
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e543b8f..5f03508 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -678,10 +678,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */
if (plat->ich_version == PCHV_7) {
slave->mode_rx = SPI_RX_SLOW;
slave->mode = SPI_TX_BYTE;
}
if (plat->ich_version == PCHV_7)
slave->mode = SPI_TX_BYTE | SPI_RX_SLOW;
This won't apply. Please rebase this series on top of origin/master. I plan to give a test against this series soon.
Did that on u-boot-spi/spi-nor please find it.
return 0;
} diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 0dfdd8b..ed6c771 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -181,7 +181,6 @@ static int spi_child_pre_probe(struct udevice *dev)
slave->max_hz = plat->max_hz; slave->mode = plat->mode;
slave->mode_rx = plat->mode_rx; return 0;
} @@ -393,7 +392,7 @@ void spi_free_slave(struct spi_slave *slave) int spi_slave_ofdata_to_platdata(const void *blob, int node, struct dm_spi_slave_platdata *plat) {
int mode = 0, mode_rx = 0;
int mode = 0; int value; plat->cs = fdtdec_get_int(blob, node, "reg", -1);
@@ -425,24 +424,22 @@ int spi_slave_ofdata_to_platdata(const void *blob, int node, break; }
plat->mode = mode;
value = fdtdec_get_uint(blob, node, "spi-rx-bus-width", 1); switch (value) { case 1: break; case 2:
mode_rx |= SPI_RX_DUAL;
mode |= SPI_RX_DUAL; break; case 4:
mode_rx |= SPI_RX_QUAD;
mode |= SPI_RX_QUAD; break; default: error("spi-rx-bus-width %d not supported\n", value); break; }
plat->mode_rx = mode_rx;
plat->mode = mode; return 0;
} diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index b5c974c..d9d65b4 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -338,7 +338,7 @@ static void ti_spi_setup_spi_register(struct ti_qspi_priv *priv) QSPI_SETUP0_NUM_D_BYTES_8_BITS | QSPI_SETUP0_READ_QUAD | QSPI_CMD_WRITE | QSPI_NUM_DUMMY_BITS);
slave->mode_rx = SPI_RX_QUAD;
slave->mode |= SPI_RX_QUAD;
#else memval |= QSPI_CMD_READ | QSPI_SETUP0_NUM_A_BYTES | QSPI_SETUP0_NUM_D_BYTES_NO_BITS | @@ -422,7 +422,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, bool enable) { u32 memval;
u32 mode = slave->mode_rx & (SPI_RX_QUAD | SPI_RX_DUAL);
u32 mode = slave->mode & (SPI_RX_QUAD | SPI_RX_DUAL); if (!enable) { writel(0, &priv->base->setup0);
@@ -436,7 +436,7 @@ static void __ti_qspi_setup_memorymap(struct ti_qspi_priv *priv, memval |= QSPI_CMD_READ_QUAD; memval |= QSPI_SETUP0_NUM_D_BYTES_8_BITS; memval |= QSPI_SETUP0_READ_QUAD;
slave->mode_rx = SPI_RX_QUAD;
slave->mode |= SPI_RX_QUAD; break; case SPI_RX_DUAL: memval |= QSPI_CMD_READ_DUAL;
diff --git a/include/spi.h b/include/spi.h index dd0b11b..61fefa4 100644 --- a/include/spi.h +++ b/include/spi.h @@ -26,12 +26,10 @@ #define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */
-/* SPI mode_rx flags */ -#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */ +#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ +#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ +#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -61,13 +59,11 @@ struct dm_spi_bus {
- @cs: Chip select number (0..n-1)
- @max_hz: Maximum bus speed that this slave can tolerate
- @mode: SPI mode to use for this device (see SPI mode flags)
*/
- @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
struct dm_spi_slave_platdata { unsigned int cs; uint max_hz; uint mode;
u8 mode_rx;
};
#endif /* CONFIG_DM_SPI */ @@ -94,7 +90,6 @@ struct dm_spi_slave_platdata {
bus (bus->seq) so does not need to be stored
- @cs: ID of the chip select connected to the slave.
- @mode: SPI mode to use for this slave (see SPI mode flags)
- @mode_rx: SPI RX mode to use for this slave (see SPI mode_rx flags)
- @wordlen: Size of SPI word in number of bits
- @max_write_size: If non-zero, the maximum number of bytes which can
be written at once, excluding command bytes.
@@ -112,7 +107,6 @@ struct spi_slave { unsigned int cs; #endif uint mode;
u8 mode_rx; unsigned int wordlen; unsigned int max_write_size; void *memory_map;
--
thanks!

Hi Jagan,
On Mon, Feb 15, 2016 at 9:07 PM, Jagan Teki jteki@openedev.com wrote:
Hi Bin,
On 15 February 2016 at 16:46, Bin Meng bmeng.cn@gmail.com wrote:
Hi Jagan,
On Mon, Feb 15, 2016 at 4:49 AM, Jagan Teki jteki@openedev.com wrote:
mp2580 will take care of tx and rx mode's so there is no need to differentiate these into spi layer level hence replaced all mode_rx macros with mode.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com
drivers/mtd/spi-nor/m25p80.c | 2 +- drivers/spi/ich.c | 6 ++---- drivers/spi/spi-uclass.c | 11 ++++------- drivers/spi/ti_qspi.c | 6 +++--- include/spi.h | 14 ++++---------- 5 files changed, 14 insertions(+), 25 deletions(-)
diff --git a/drivers/mtd/spi-nor/m25p80.c b/drivers/mtd/spi-nor/m25p80.c index 7e2702d..58e879c 100644 --- a/drivers/mtd/spi-nor/m25p80.c +++ b/drivers/mtd/spi-nor/m25p80.c @@ -178,7 +178,7 @@ static int m25p80_spi_nor(struct spi_nor *nor) return ret; }
switch (spi->mode_rx) {
switch (spi->mode) { case SPI_RX_SLOW: nor->read_mode = SNOR_READ; break;
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c index e543b8f..5f03508 100644 --- a/drivers/spi/ich.c +++ b/drivers/spi/ich.c @@ -678,10 +678,8 @@ static int ich_spi_child_pre_probe(struct udevice *dev) * ICH 7 SPI controller only supports array read command * and byte program command for SST flash */
if (plat->ich_version == PCHV_7) {
slave->mode_rx = SPI_RX_SLOW;
slave->mode = SPI_TX_BYTE;
}
if (plat->ich_version == PCHV_7)
slave->mode = SPI_TX_BYTE | SPI_RX_SLOW;
This won't apply. Please rebase this series on top of origin/master. I plan to give a test against this series soon.
Did that on u-boot-spi/spi-nor please find it.
Thanks. I see that. Will schedule some test soon.
[snip]
Regards, Bin

SPI_RX_FAST at spi layer used for spi-nor core to find the fastest read mode, but this handling is taking care at m25p80 hence removed the same at spi layer level.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/spi.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/include/spi.h b/include/spi.h index 61fefa4..9af2fbb 100644 --- a/include/spi.h +++ b/include/spi.h @@ -27,9 +27,8 @@ #define SPI_TX_DUAL BIT(9) /* transmit with 2 wires */ #define SPI_TX_QUAD BIT(10) /* transmit with 4 wires */ #define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ -#define SPI_RX_FAST BIT(12) /* receive with 1 wire fast */ -#define SPI_RX_DUAL BIT(13) /* receive with 2 wires */ -#define SPI_RX_QUAD BIT(14) /* receive with 4 wires */ +#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ +#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0)

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/ls1021atwr_qspi_defconfig | 1 + include/configs/am43xx_evm.h | 2 +- include/configs/dra7xx_evm.h | 2 +- include/configs/ls1021atwr.h | 1 - include/configs/ls1043a_common.h | 2 +- 5 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/configs/ls1021atwr_qspi_defconfig b/configs/ls1021atwr_qspi_defconfig index 2e8e951..0fb7a60 100644 --- a/configs/ls1021atwr_qspi_defconfig +++ b/configs/ls1021atwr_qspi_defconfig @@ -7,6 +7,7 @@ CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT" # CONFIG_CMD_SETEXPR is not set CONFIG_OF_CONTROL=y CONFIG_DM=y +CONFIG_MTD=y CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_MISC=y diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index c3867ef..538771a 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -143,7 +143,7 @@ #ifdef CONFIG_SPL_BUILD #undef CONFIG_DM_MMC #undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_MTD #undef CONFIG_TIMER #endif
diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 9d62421..32137ba 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -144,7 +144,7 @@
#ifdef CONFIG_SPL_BUILD #undef CONFIG_DM_SPI -#undef CONFIG_DM_SPI_FLASH +#undef CONFIG_MTD #endif
/* diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index ae58646..d70a49b 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -321,7 +321,6 @@ /* DM SPI */ #if defined(CONFIG_FSL_DSPI) || defined(CONFIG_FSL_QSPI) #define CONFIG_CMD_SF -#define CONFIG_DM_SPI_FLASH #endif
/* diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 22b2692..7018cb5 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -203,7 +203,7 @@ #define CONFIG_FSL_DSPI #ifdef CONFIG_FSL_DSPI #define CONFIG_CMD_SF -#define CONFIG_DM_SPI_FLASH +#define CONFIG_MTD #define CONFIG_SPI_NOR_STMICRO /* cs0 */ #define CONFIG_SPI_NOR_SST /* cs1 */ #define CONFIG_SPI_NOR_MISC /* cs2 */

Since mtd support is part of spi-nor core, hence removed legacy defines.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/aristainetos-common.h | 1 - include/configs/gw_ventana.h | 1 - include/configs/socfpga_common.h | 1 - 3 files changed, 3 deletions(-)
diff --git a/include/configs/aristainetos-common.h b/include/configs/aristainetos-common.h index 0b97ccc..cbba6be 100644 --- a/include/configs/aristainetos-common.h +++ b/include/configs/aristainetos-common.h @@ -42,7 +42,6 @@ #define CONFIG_PHY_MICREL
#define CONFIG_CMD_SF -#define CONFIG_SPI_FLASH_MTD #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 2f15876..a4a3a5f 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -68,7 +68,6 @@ #define CONFIG_CMD_SF #ifdef CONFIG_CMD_SF #define CONFIG_MXC_SPI - #define CONFIG_SPI_FLASH_MTD #define CONFIG_SPI_NOR_BAR #define CONFIG_SF_DEFAULT_BUS 0 #define CONFIG_SF_DEFAULT_CS 0 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a1a3a09..d3b9d4a 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -205,7 +205,6 @@ unsigned int cm_get_l4_sp_clk_hz(void); */ /* Enable multiple SPI NOR flash manufacturers */ #ifndef CONFIG_SPL_BUILD -#define CONFIG_SPI_FLASH_MTD #define CONFIG_CMD_MTDPARTS #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS

Since spi-nor flash is part of MTD uclass, so replaced UCLASS_SPI_FLASH with UCLASS_MTD.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- arch/arm/mach-rockchip/rk3288-board-spl.c | 2 +- arch/x86/lib/mrccache.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c b/arch/arm/mach-rockchip/rk3288-board-spl.c index 6a54368..3ba2382 100644 --- a/arch/arm/mach-rockchip/rk3288-board-spl.c +++ b/arch/arm/mach-rockchip/rk3288-board-spl.c @@ -53,7 +53,7 @@ u32 spl_boot_device(void) } debug("Found device %s\n", dev->name); switch (device_get_uclass_id(dev)) { - case UCLASS_SPI_FLASH: + case UCLASS_MTD: return BOOT_DEVICE_SPI; case UCLASS_MMC: return BOOT_DEVICE_MMC1; diff --git a/arch/x86/lib/mrccache.c b/arch/x86/lib/mrccache.c index 67bace4..8c08c14 100644 --- a/arch/x86/lib/mrccache.c +++ b/arch/x86/lib/mrccache.c @@ -216,8 +216,7 @@ int mrccache_get_region(struct udevice **devp, struct mrc_region *entry) entry->length = reg[1];
if (devp) { - ret = uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, - devp); + ret = uclass_get_device_by_of_offset(UCLASS_MTD, node, devp); debug("ret = %d\n", ret); if (ret) return ret;

Drop using UCLASS_SPI_FLASH, spi-nor flash is part of MTD uclass now.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/dm/uclass-id.h | 1 - 1 file changed, 1 deletion(-)
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 73cd3ac..324d4fd 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -64,7 +64,6 @@ enum uclass_id { UCLASS_RTC, /* Real time clock device */ UCLASS_SERIAL, /* Serial UART */ UCLASS_SPI, /* SPI bus */ - UCLASS_SPI_FLASH, /* SPI flash */ UCLASS_SPI_GENERIC, /* Generic SPI flash target */ UCLASS_SYSCON, /* System configuration device */ UCLASS_THERMAL, /* Thermal sensor */

CONFIG_SPL_SPI_FLASH_SUPPORT => CONFIG_SPL_SPI_NOR_SUPPORT
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/P1010RDB.h | 2 +- include/configs/P1022DS.h | 2 +- include/configs/T102xQDS.h | 2 +- include/configs/T102xRDB.h | 2 +- include/configs/T104xRDB.h | 2 +- include/configs/T208xQDS.h | 2 +- include/configs/T208xRDB.h | 2 +- include/configs/am335x_evm.h | 2 +- include/configs/at91sam9n12ek.h | 2 +- include/configs/at91sam9x5ek.h | 2 +- include/configs/bav335x.h | 2 +- include/configs/cgtqmx6eval.h | 2 +- include/configs/chromebook_jerry.h | 2 +- include/configs/clearfog.h | 2 +- include/configs/cm_fx6.h | 2 +- include/configs/cm_t43.h | 2 +- include/configs/da850evm.h | 4 ++-- include/configs/db-88f6820-gp.h | 2 +- include/configs/db-mv784mp-gp.h | 2 +- include/configs/dra7xx_evm.h | 2 +- include/configs/ds414.h | 2 +- include/configs/maxbcm.h | 2 +- include/configs/omapl138_lcdk.h | 2 +- include/configs/ot1200.h | 2 +- include/configs/p1_p2_rdb_pc.h | 2 +- include/configs/pcm051.h | 2 +- include/configs/sama5d2_xplained.h | 2 +- include/configs/sama5d3xek.h | 2 +- include/configs/sama5d4_xplained.h | 2 +- include/configs/sama5d4ek.h | 2 +- include/configs/siemens-am33x-common.h | 2 +- include/configs/socfpga_common.h | 2 +- include/configs/taurus.h | 2 +- include/configs/theadorable.h | 2 +- include/configs/ti_armv7_keystone2.h | 2 +- include/configs/tseries.h | 2 +- 36 files changed, 37 insertions(+), 37 deletions(-)
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 3c0faca..a76630a 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -61,7 +61,7 @@ #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 6235bbb..c8e7524 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -50,7 +50,7 @@ #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index d446309..999fce2 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -80,7 +80,7 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 01424ce..0ad1ce7 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -87,7 +87,7 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 34ba4a4..b81c194 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -73,7 +73,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 26bbb74..76a9f93 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -90,7 +90,7 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 2857c6a..a71f430 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -79,7 +79,7 @@ #ifdef CONFIG_SPIFLASH #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 6ebe0b3..e4d53e4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -437,7 +437,7 @@ /* SPL related */ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index ba91d1f..f7f3733 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -280,7 +280,7 @@
#elif CONFIG_SYS_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 45bb861..1eb7a86 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -282,7 +282,7 @@
#elif CONFIG_SYS_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index e61a098..0431f78 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -551,7 +551,7 @@ DEFAULT_LINUX_BOOT_ENV \ /* SPL related */ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index b07c751..0f50f34 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -21,7 +21,7 @@ #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h index ff17e1c..b3c1bc8 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/chromebook_jerry.h @@ -16,7 +16,7 @@
#define CONFIG_ENV_IS_NOWHERE #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPI_NOR_MISC
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 69c1d94..1880dc7 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -145,7 +145,7 @@ #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index 180ea28..d70041c 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -234,7 +234,7 @@ #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index a4cd470..1b7a396 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -168,7 +168,7 @@ #define CONFIG_SPL_POWER_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024) #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD
#endif /* __CONFIG_CM_T43_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 63abb80..ea319a3 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -150,7 +150,7 @@
#ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 @@ -358,7 +358,7 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index ef14132..32fba11 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -145,7 +145,7 @@ #if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index c8b0344..3749280 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -135,7 +135,7 @@
/* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 32137ba..bb1a426 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -185,7 +185,7 @@ #define CONFIG_SPL_DMA_SUPPORT #define CONFIG_TI_EDMA3 #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/ds414.h b/include/configs/ds414.h index e3c7087..02c2cd0 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -139,7 +139,7 @@
/* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 43d7fd0..0b6031e 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -98,7 +98,7 @@
/* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index bce4fad..790fe5b 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -98,7 +98,7 @@
#ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index 879ad58..ae20e54 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -87,7 +87,7 @@ #include "imx6_spl.h" #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 4c6eedd..d5b6e50 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -217,7 +217,7 @@ #define CONFIG_SPL_ENV_SUPPORT #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 45c140d..ad3a478 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -130,7 +130,7 @@
#ifdef CONFIG_SPI_BOOT #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index b08829f..7d1dbdf 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -152,7 +152,7 @@
#elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index bd5f4ee..efd02fe 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -206,7 +206,7 @@
#elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 52b4584..8252046 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -167,7 +167,7 @@
#elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index ce96a7c..e6e7e61 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -165,7 +165,7 @@
#elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index eac7270..eb3d85f 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -158,7 +158,7 @@ #define CONFIG_SPL_WATCHDOG_SUPPORT
#define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index d3b9d4a..765bec2 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -369,7 +369,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
/* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #endif diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 1d6f9c3..06ee51c 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -166,7 +166,7 @@ /* SPL related */ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index cd9d6b6..5809975 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -157,7 +157,7 @@
/* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index a7206f4..ba2aa58 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -52,7 +52,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE + \ SPL_MALLOC_F_SIZE + \ CONFIG_SPL_STACK_SIZE - 4) -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO diff --git a/include/configs/tseries.h b/include/configs/tseries.h index 93e3454..9a18039 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -269,7 +269,7 @@ MMCARGS #define CONFIG_SF_DEFAULT_SPEED 24000000
#define CONFIG_SPL_SPI_SUPPORT -#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #undef CONFIG_ENV_IS_NOWHERE

Since SPI-NOR is driven by MTD core, so the SPL need to use the MTD as well.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- include/configs/P1010RDB.h | 1 + include/configs/P1022DS.h | 1 + include/configs/T102xQDS.h | 1 + include/configs/T102xRDB.h | 1 + include/configs/T104xRDB.h | 1 + include/configs/T208xQDS.h | 1 + include/configs/T208xRDB.h | 1 + include/configs/am335x_evm.h | 1 + include/configs/at91sam9n12ek.h | 1 + include/configs/at91sam9x5ek.h | 1 + include/configs/bav335x.h | 1 + include/configs/cgtqmx6eval.h | 1 + include/configs/chromebook_jerry.h | 1 + include/configs/clearfog.h | 1 + include/configs/cm_fx6.h | 1 + include/configs/cm_t43.h | 1 + include/configs/da850evm.h | 2 ++ include/configs/db-88f6820-gp.h | 1 + include/configs/db-mv784mp-gp.h | 1 + include/configs/dra7xx_evm.h | 1 + include/configs/ds414.h | 1 + include/configs/maxbcm.h | 1 + include/configs/omapl138_lcdk.h | 1 + include/configs/ot1200.h | 1 + include/configs/p1_p2_rdb_pc.h | 1 + include/configs/pcm051.h | 1 + include/configs/sama5d2_xplained.h | 1 + include/configs/sama5d3xek.h | 1 + include/configs/sama5d4_xplained.h | 1 + include/configs/sama5d4ek.h | 1 + include/configs/siemens-am33x-common.h | 1 + include/configs/socfpga_common.h | 1 + include/configs/taurus.h | 1 + include/configs/theadorable.h | 1 + include/configs/ti_armv7_keystone2.h | 1 + include/configs/tseries.h | 1 + include/configs/zynq-common.h | 1 + 37 files changed, 38 insertions(+)
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index a76630a..ec311fc 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -62,6 +62,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index c8e7524..d4c17f9 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -51,6 +51,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index 999fce2..569af49 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -81,6 +81,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 0ad1ce7..643eae0 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -88,6 +88,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index b81c194..4132814 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -74,6 +74,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg #define CONFIG_RESET_VECTOR_ADDRESS 0x30000FFC #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x30000000) diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 76a9f93..05c123c 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -91,6 +91,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a71f430..5269741 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -80,6 +80,7 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x200FFC #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x00200000) diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index e4d53e4..db30727 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -438,6 +438,7 @@ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index f7f3733..03f5c9f 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -281,6 +281,7 @@ #elif CONFIG_SYS_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 1eb7a86..63a4256 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -283,6 +283,7 @@ #elif CONFIG_SYS_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index 0431f78..a881eee 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -552,6 +552,7 @@ DEFAULT_LINUX_BOOT_ENV \ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h index 0f50f34..f973ffb 100644 --- a/include/configs/cgtqmx6eval.h +++ b/include/configs/cgtqmx6eval.h @@ -22,6 +22,7 @@ #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD #include "imx6_spl.h" diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h index b3c1bc8..a8243b1 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/chromebook_jerry.h @@ -17,6 +17,7 @@ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPI_NOR_MISC
diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 1880dc7..10c24d7 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -146,6 +146,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index d70041c..2001836 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -235,6 +235,7 @@ #define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD
diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index 1b7a396..9d94373 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -169,6 +169,7 @@ #define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024) #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD
#endif /* __CONFIG_CM_T43_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index ea319a3..db55f5b 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -151,6 +151,7 @@ #ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 @@ -359,6 +360,7 @@ #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index 32fba11..1255c8b 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -146,6 +146,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 3749280..5a88fed 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -136,6 +136,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index bb1a426..359c3ba 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -186,6 +186,7 @@ #define CONFIG_TI_EDMA3 #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000
#define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 02c2cd0..334f61b 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -140,6 +140,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 0b6031e..aa006e8 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -99,6 +99,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 790fe5b..27af5c7 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -99,6 +99,7 @@ #ifdef CONFIG_USE_SPIFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 diff --git a/include/configs/ot1200.h b/include/configs/ot1200.h index ae20e54..2165562 100644 --- a/include/configs/ot1200.h +++ b/include/configs/ot1200.h @@ -88,6 +88,7 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) #define CONFIG_SPL_SPI_LOAD #endif diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d5b6e50..53bd57f 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -218,6 +218,7 @@ #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index ad3a478..3583152 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -131,6 +131,7 @@ #ifdef CONFIG_SPI_BOOT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index 7d1dbdf..b4146f7 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -153,6 +153,7 @@ #elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index efd02fe..02df0f2 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -207,6 +207,7 @@ #elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index 8252046..486e4e0 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -168,6 +168,7 @@ #elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index e6e7e61..98368a7 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -166,6 +166,7 @@ #elif CONFIG_SYS_USE_SERIALFLASH #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index eb3d85f..7c030c8 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -159,6 +159,7 @@
#define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 765bec2..694e95c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -370,6 +370,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL QSPI boot support */ #ifdef CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #endif diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 06ee51c..6dda72c 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -167,6 +167,7 @@ #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 5809975..4bbf017 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -158,6 +158,7 @@ /* SPL related SPI defines */ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SPL_SPI_CS 0 diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index ba2aa58..c283555 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -53,6 +53,7 @@ SPL_MALLOC_F_SIZE + \ CONFIG_SPL_STACK_SIZE - 4) #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO diff --git a/include/configs/tseries.h b/include/configs/tseries.h index 9a18039..cc18810 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -270,6 +270,7 @@ MMCARGS
#define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_NOR_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #undef CONFIG_ENV_IS_NOWHERE diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 6feb912..6d51b34 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -348,6 +348,7 @@ #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_NOR_SUPPORT #define CONFIG_SPL_MTD_SUPPORT +#define CONFIG_SPL_MTD_SUPPORT #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000

All set ready for SPI-NOR.
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- MAINTAINERS | 1 - Makefile | 1 - cmd/sf.c | 4 +- common/env_sf.c | 4 +- drivers/Makefile | 1 - drivers/mtd/Kconfig | 2 - drivers/mtd/spi/Kconfig | 131 ----- drivers/mtd/spi/Makefile | 18 - drivers/mtd/spi/fsl_espi_spl.c | 90 --- drivers/mtd/spi/sandbox.c | 697 ----------------------- drivers/mtd/spi/sf-uclass.c | 103 ---- drivers/mtd/spi/sf.c | 58 -- drivers/mtd/spi/sf_dataflash.c | 701 ------------------------ drivers/mtd/spi/sf_internal.h | 243 --------- drivers/mtd/spi/sf_mtd.c | 104 ---- drivers/mtd/spi/sf_params.c | 146 ----- drivers/mtd/spi/sf_probe.c | 181 ------ drivers/mtd/spi/spi_flash.c | 1182 ---------------------------------------- drivers/mtd/spi/spi_spl_load.c | 90 --- include/spi_flash.h | 225 +------- 20 files changed, 6 insertions(+), 3976 deletions(-) delete mode 100644 drivers/mtd/spi/Kconfig delete mode 100644 drivers/mtd/spi/Makefile delete mode 100644 drivers/mtd/spi/fsl_espi_spl.c delete mode 100644 drivers/mtd/spi/sandbox.c delete mode 100644 drivers/mtd/spi/sf-uclass.c delete mode 100644 drivers/mtd/spi/sf.c delete mode 100644 drivers/mtd/spi/sf_dataflash.c delete mode 100644 drivers/mtd/spi/sf_internal.h delete mode 100644 drivers/mtd/spi/sf_mtd.c delete mode 100644 drivers/mtd/spi/sf_params.c delete mode 100644 drivers/mtd/spi/sf_probe.c delete mode 100644 drivers/mtd/spi/spi_flash.c delete mode 100644 drivers/mtd/spi/spi_spl_load.c
diff --git a/MAINTAINERS b/MAINTAINERS index b387207..4b23d18 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -385,7 +385,6 @@ SPI M: Jagan Teki jteki@openedev.com S: Maintained T: git git://git.denx.de/u-boot-spi.git -F: drivers/mtd/spi/ F: drivers/spi/ F: include/spi*
diff --git a/Makefile b/Makefile index f299a24..ad3a66e 100644 --- a/Makefile +++ b/Makefile @@ -636,7 +636,6 @@ libs-y += drivers/mtd/ libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ libs-y += drivers/mtd/onenand/ libs-$(CONFIG_CMD_UBI) += drivers/mtd/ubi/ -libs-y += drivers/mtd/spi/ libs-y += drivers/mtd/spi-nor/ libs-y += drivers/net/ libs-y += drivers/net/phy/ diff --git a/cmd/sf.c b/cmd/sf.c index 5dd7177..90f20d6 100644 --- a/cmd/sf.c +++ b/cmd/sf.c @@ -85,7 +85,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) unsigned int speed = CONFIG_SF_DEFAULT_SPEED; unsigned int mode = CONFIG_SF_DEFAULT_MODE; char *endp; -#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) +#ifdef CONFIG_MTD_DM_SPI_NOR struct udevice *new, *bus_dev; int ret; #else @@ -118,7 +118,7 @@ static int do_spi_flash_probe(int argc, char * const argv[]) return -1; }
-#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) +#ifdef CONFIG_MTD_DM_SPI_NOR /* Remove the old device, otherwise probe will just be a nop */ ret = spi_find_bus_and_cs(bus, cs, &bus_dev, &new); if (!ret) { diff --git a/common/env_sf.c b/common/env_sf.c index cf909c0..1ff0733 100644 --- a/common/env_sf.c +++ b/common/env_sf.c @@ -52,7 +52,7 @@ int saveenv(void) char *saved_buffer = NULL, flag = OBSOLETE_FLAG; u32 saved_size, saved_offset, sector = 1; int ret; -#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) +#ifdef CONFIG_MTD_DM_SPI_NOR struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, @@ -242,7 +242,7 @@ int saveenv(void) char *saved_buffer = NULL; int ret = 1; env_t env_new; -#if defined(CONFIG_DM_SPI_FLASH) || defined (CONFIG_MTD_DM_SPI_NOR) +#ifdef CONFIG_MTD_DM_SPI_NOR struct udevice *new;
ret = spi_flash_probe_bus_cs(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, diff --git a/drivers/Makefile b/drivers/Makefile index 1d179b9..c3bc3c5 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -19,7 +19,6 @@ obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/ obj-$(CONFIG_ALTERA_SDRAM) += ddr/altera/ obj-$(CONFIG_SPL_SERIAL_SUPPORT) += serial/ obj-$(CONFIG_SPL_SPI_NOR_SUPPORT) += mtd/spi-nor/ -obj-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += mtd/spi/ obj-$(CONFIG_SPL_SPI_SUPPORT) += spi/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/ diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 2c8846b..99b821a 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -32,6 +32,4 @@ endmenu
source "drivers/mtd/nand/Kconfig"
-source "drivers/mtd/spi/Kconfig" - source "drivers/mtd/spi-nor/Kconfig" diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig deleted file mode 100644 index 3f7433c..0000000 --- a/drivers/mtd/spi/Kconfig +++ /dev/null @@ -1,131 +0,0 @@ -menu "SPI Flash Support" - -config DM_SPI_FLASH - bool "Enable Driver Model for SPI flash" - depends on DM && DM_SPI - help - Enable driver model for SPI flash. This SPI flash interface - (spi_flash_probe(), spi_flash_write(), etc.) is then - implemented by the SPI flash uclass. There is one standard - SPI flash driver which knows how to probe most chips - supported by U-Boot. The uclass interface is defined in - include/spi_flash.h, but is currently fully compatible - with the old interface to avoid confusion and duplication - during the transition parent. SPI and SPI flash must be - enabled together (it is not possible to use driver model - for one and not the other). - -config SPI_FLASH_SANDBOX - bool "Support sandbox SPI flash device" - depends on SANDBOX && DM_SPI_FLASH - help - Since sandbox cannot access real devices, an emulation mechanism is - provided instead. Drivers can be connected up to the sandbox SPI - bus (see CONFIG_SANDBOX_SPI) and SPI traffic will be routed to this - device. Typically the contents of the emulated SPI flash device is - stored in a file on the host filesystem. - -config SPI_FLASH - bool "Legacy SPI Flash Interface support" - help - Enable the legacy SPI flash support. This will include basic - standard support for things like probing, read / write, and - erasing through cmd_sf interface. - - If unsure, say N - -config SPI_FLASH_BAR - bool "SPI flash Bank/Extended address register support" - depends on SPI_FLASH - help - Enable the SPI flash Bank/Extended address register support. - Bank/Extended address registers are used to access the flash - which has size > 16MiB in 3-byte addressing. - -if SPI_FLASH - -config SPI_FLASH_ATMEL - bool "Atmel SPI flash support" - help - Add support for various Atmel SPI flash chips (AT45xxx and AT25xxx) - -config SPI_FLASH_EON - bool "EON SPI flash support" - help - Add support for various EON SPI flash chips (EN25xxx) - -config SPI_FLASH_GIGADEVICE - bool "GigaDevice SPI flash support" - help - Add support for various GigaDevice SPI flash chips (GD25xxx) - -config SPI_FLASH_MACRONIX - bool "Macronix SPI flash support" - help - Add support for various Macronix SPI flash chips (MX25Lxxx) - -config SPI_FLASH_SPANSION - bool "Spansion SPI flash support" - help - Add support for various Spansion SPI flash chips (S25FLxxx) - -config SPI_FLASH_STMICRO - bool "STMicro SPI flash support" - help - Add support for various STMicro SPI flash chips (M25Pxxx and N25Qxxx) - -config SPI_FLASH_SST - bool "SST SPI flash support" - help - Add support for various SST SPI flash chips (SST25xxx) - -config SPI_FLASH_WINBOND - bool "Winbond SPI flash support" - help - Add support for various Winbond SPI flash chips (W25xxx) - -endif - -config SPI_FLASH_USE_4K_SECTORS - bool "Use small 4096 B erase sectors" - depends on SPI_FLASH - default y - help - Many flash memories support erasing small (4096 B) sectors. Depending - on the usage this feature may provide performance gain in comparison - to erasing whole blocks (32/64 KiB). - Changing a small part of the flash's contents is usually faster with - small sectors. On the other hand erasing should be faster when using - 64 KiB block instead of 16 × 4 KiB sectors. - - Please note that some tools/drivers/filesystems may not work with - 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). - -config SPI_FLASH_DATAFLASH - bool "AT45xxx DataFlash support" - depends on SPI_FLASH && DM_SPI_FLASH - help - Enable the access for SPI-flash-based AT45xxx DataFlash chips. - DataFlash is a kind of SPI flash. Most AT45 chips have two buffers - in each chip, which may be used for double buffered I/O; but this - driver doesn't (yet) use these for any kind of i/o overlap or prefetching. - - Sometimes DataFlash is packaged in MMC-format cards, although the - MMC stack can't (yet?) distinguish between MMC and DataFlash - protocols during enumeration. - - If unsure, say N - -config SPI_FLASH_MTD - bool "SPI Flash MTD support" - depends on SPI_FLASH - help - Enable the MTD support for spi flash layer, this adapter is for - translating mtd_read/mtd_write commands into spi_flash_read/write - commands. It is not intended to use it within sf_cmd or the SPI - flash subsystem. Such an adapter is needed for subsystems like - UBI which can only operate on top of the MTD layer. - - If unsure, say N - -endmenu # menu "SPI Flash Support" diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile deleted file mode 100644 index c665836..0000000 --- a/drivers/mtd/spi/Makefile +++ /dev/null @@ -1,18 +0,0 @@ -# -# (C) Copyright 2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-$(CONFIG_DM_SPI_FLASH) += sf-uclass.o - -ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_SPL_SPI_LOAD) += spi_spl_load.o -obj-$(CONFIG_SPL_SPI_BOOT) += fsl_espi_spl.o -endif - -obj-$(CONFIG_SPI_FLASH) += sf_probe.o spi_flash.o sf_params.o sf.o -obj-$(CONFIG_SPI_FLASH_DATAFLASH) += sf_dataflash.o -obj-$(CONFIG_SPI_FLASH_MTD) += sf_mtd.o -obj-$(CONFIG_SPI_FLASH_SANDBOX) += sandbox.o diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c deleted file mode 100644 index b915469..0000000 --- a/drivers/mtd/spi/fsl_espi_spl.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright 2013 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <spi_flash.h> -#include <malloc.h> - -#define ESPI_BOOT_IMAGE_SIZE 0x48 -#define ESPI_BOOT_IMAGE_ADDR 0x50 -#define CONFIG_CFG_DATA_SECTOR 0 - -void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst) -{ - struct spi_flash *flash; - - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); - if (flash == NULL) { - puts("\nspi_flash_probe failed"); - hang(); - } - - spi_flash_read(flash, offs, size, vdst); -} - -/* - * The main entry for SPI booting. It's necessary that SDRAM is already - * configured and available since this code loads the main U-Boot image - * from SPI into SDRAM and starts it from there. - */ -void spi_boot(void) -{ - void (*uboot)(void) __noreturn; - u32 offset, code_len, copy_len = 0; -#ifndef CONFIG_FSL_CORENET - unsigned char *buf = NULL; -#endif - struct spi_flash *flash; - - flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, - CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); - if (flash == NULL) { - puts("\nspi_flash_probe failed"); - hang(); - } - -#ifdef CONFIG_FSL_CORENET - offset = CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; - code_len = CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE; -#else - /* - * Load U-Boot image from SPI flash into RAM - */ - buf = malloc(flash->page_size); - if (buf == NULL) { - puts("\nmalloc failed"); - hang(); - } - memset(buf, 0, flash->page_size); - - spi_flash_read(flash, CONFIG_CFG_DATA_SECTOR, - flash->page_size, (void *)buf); - offset = *(u32 *)(buf + ESPI_BOOT_IMAGE_ADDR); - /* Skip spl code */ - offset += CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS; - /* Get the code size from offset 0x48 */ - code_len = *(u32 *)(buf + ESPI_BOOT_IMAGE_SIZE); - /* Skip spl code */ - code_len = code_len - CONFIG_SPL_MAX_SIZE; -#endif - /* copy code to DDR */ - printf("Loading second stage boot loader "); - while (copy_len <= code_len) { - spi_flash_read(flash, offset + copy_len, 0x2000, - (void *)(CONFIG_SYS_SPI_FLASH_U_BOOT_DST - + copy_len)); - copy_len = copy_len + 0x2000; - putc('.'); - } - - /* - * Jump to U-Boot image - */ - flush_cache(CONFIG_SYS_SPI_FLASH_U_BOOT_DST, code_len); - uboot = (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_START; - (*uboot)(); -} diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c deleted file mode 100644 index 895604d..0000000 --- a/drivers/mtd/spi/sandbox.c +++ /dev/null @@ -1,697 +0,0 @@ -/* - * Simulate a SPI flash - * - * Copyright (c) 2011-2013 The Chromium OS Authors. - * See file CREDITS for list of people who contributed to this - * project. - * - * Licensed under the GPL-2 or later. - */ - -#include <common.h> -#include <dm.h> -#include <malloc.h> -#include <spi.h> -#include <os.h> - -#include <spi_flash.h> -#include "sf_internal.h" - -#include <asm/getopt.h> -#include <asm/spi.h> -#include <asm/state.h> -#include <dm/device-internal.h> -#include <dm/lists.h> -#include <dm/uclass-internal.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* - * The different states that our SPI flash transitions between. - * We need to keep track of this across multiple xfer calls since - * the SPI bus could possibly call down into us multiple times. - */ -enum sandbox_sf_state { - SF_CMD, /* default state -- we're awaiting a command */ - SF_ID, /* read the flash's (jedec) ID code */ - SF_ADDR, /* processing the offset in the flash to read/etc... */ - SF_READ, /* reading data from the flash */ - SF_WRITE, /* writing data to the flash, i.e. page programming */ - SF_ERASE, /* erase the flash */ - SF_READ_STATUS, /* read the flash's status register */ - SF_READ_STATUS1, /* read the flash's status register upper 8 bits*/ - SF_WRITE_STATUS, /* write the flash's status register */ -}; - -static const char *sandbox_sf_state_name(enum sandbox_sf_state state) -{ - static const char * const states[] = { - "CMD", "ID", "ADDR", "READ", "WRITE", "ERASE", "READ_STATUS", - "READ_STATUS1", "WRITE_STATUS", - }; - return states[state]; -} - -/* Bits for the status register */ -#define STAT_WIP (1 << 0) -#define STAT_WEL (1 << 1) - -/* Assume all SPI flashes have 3 byte addresses since they do atm */ -#define SF_ADDR_LEN 3 - -#define IDCODE_LEN 3 - -/* Used to quickly bulk erase backing store */ -static u8 sandbox_sf_0xff[0x1000]; - -/* Internal state data for each SPI flash */ -struct sandbox_spi_flash { - unsigned int cs; /* Chip select we are attached to */ - /* - * As we receive data over the SPI bus, our flash transitions - * between states. For example, we start off in the SF_CMD - * state where the first byte tells us what operation to perform - * (such as read or write the flash). But the operation itself - * can go through a few states such as first reading in the - * offset in the flash to perform the requested operation. - * Thus "state" stores the exact state that our machine is in - * while "cmd" stores the overall command we're processing. - */ - enum sandbox_sf_state state; - uint cmd; - /* Erase size of current erase command */ - uint erase_size; - /* Current position in the flash; used when reading/writing/etc... */ - uint off; - /* How many address bytes we've consumed */ - uint addr_bytes, pad_addr_bytes; - /* The current flash status (see STAT_XXX defines above) */ - u16 status; - /* Data describing the flash we're emulating */ - const struct spi_flash_params *data; - /* The file on disk to serv up data from */ - int fd; -}; - -struct sandbox_spi_flash_plat_data { - const char *filename; - const char *device_name; - int bus; - int cs; -}; - -/** - * This is a very strange probe function. If it has platform data (which may - * have come from the device tree) then this function gets the filename and - * device type from there. Failing that it looks at the command line - * parameter. - */ -static int sandbox_sf_probe(struct udevice *dev) -{ - /* spec = idcode:file */ - struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - const char *file; - size_t len, idname_len; - const struct spi_flash_params *data; - struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); - struct sandbox_state *state = state_get_current(); - struct udevice *bus = dev->parent; - const char *spec = NULL; - int ret = 0; - int cs = -1; - int i; - - debug("%s: bus %d, looking for emul=%p: ", __func__, bus->seq, dev); - if (bus->seq >= 0 && bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) { - for (i = 0; i < CONFIG_SANDBOX_SPI_MAX_CS; i++) { - if (state->spi[bus->seq][i].emul == dev) - cs = i; - } - } - if (cs == -1) { - printf("Error: Unknown chip select for device '%s'\n", - dev->name); - return -EINVAL; - } - debug("found at cs %d\n", cs); - - if (!pdata->filename) { - struct sandbox_state *state = state_get_current(); - - assert(bus->seq != -1); - if (bus->seq < CONFIG_SANDBOX_SPI_MAX_BUS) - spec = state->spi[bus->seq][cs].spec; - if (!spec) { - ret = -ENOENT; - goto error; - } - - file = strchr(spec, ':'); - if (!file) { - printf("sandbox_sf: unable to parse file\n"); - ret = -EINVAL; - goto error; - } - idname_len = file - spec; - pdata->filename = file + 1; - pdata->device_name = spec; - ++file; - } else { - spec = strchr(pdata->device_name, ','); - if (spec) - spec++; - else - spec = pdata->device_name; - idname_len = strlen(spec); - } - debug("%s: device='%s'\n", __func__, spec); - - for (data = spi_flash_params_table; data->name; data++) { - len = strlen(data->name); - if (idname_len != len) - continue; - if (!strncasecmp(spec, data->name, len)) - break; - } - if (!data->name) { - printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len, - spec); - ret = -EINVAL; - goto error; - } - - if (sandbox_sf_0xff[0] == 0x00) - memset(sandbox_sf_0xff, 0xff, sizeof(sandbox_sf_0xff)); - - sbsf->fd = os_open(pdata->filename, 02); - if (sbsf->fd == -1) { - free(sbsf); - printf("sandbox_sf: unable to open file '%s'\n", - pdata->filename); - ret = -EIO; - goto error; - } - - sbsf->data = data; - sbsf->cs = cs; - - return 0; - - error: - debug("%s: Got error %d\n", __func__, ret); - return ret; -} - -static int sandbox_sf_remove(struct udevice *dev) -{ - struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - - os_close(sbsf->fd); - - return 0; -} - -static void sandbox_sf_cs_activate(struct udevice *dev) -{ - struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - - debug("sandbox_sf: CS activated; state is fresh!\n"); - - /* CS is asserted, so reset state */ - sbsf->off = 0; - sbsf->addr_bytes = 0; - sbsf->pad_addr_bytes = 0; - sbsf->state = SF_CMD; - sbsf->cmd = SF_CMD; -} - -static void sandbox_sf_cs_deactivate(struct udevice *dev) -{ - debug("sandbox_sf: CS deactivated; cmd done processing!\n"); -} - -/* - * There are times when the data lines are allowed to tristate. What - * is actually sensed on the line depends on the hardware. It could - * always be 0xFF/0x00 (if there are pull ups/downs), or things could - * float and so we'd get garbage back. This func encapsulates that - * scenario so we can worry about the details here. - */ -static void sandbox_spi_tristate(u8 *buf, uint len) -{ - /* XXX: make this into a user config option ? */ - memset(buf, 0xff, len); -} - -/* Figure out what command this stream is telling us to do */ -static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, - u8 *tx) -{ - enum sandbox_sf_state oldstate = sbsf->state; - - /* We need to output a byte for the cmd byte we just ate */ - if (tx) - sandbox_spi_tristate(tx, 1); - - sbsf->cmd = rx[0]; - switch (sbsf->cmd) { - case CMD_READ_ID: - sbsf->state = SF_ID; - sbsf->cmd = SF_ID; - break; - case CMD_READ_ARRAY_FAST: - sbsf->pad_addr_bytes = 1; - case CMD_READ_ARRAY_SLOW: - case CMD_PAGE_PROGRAM: - sbsf->state = SF_ADDR; - break; - case CMD_WRITE_DISABLE: - debug(" write disabled\n"); - sbsf->status &= ~STAT_WEL; - break; - case CMD_READ_STATUS: - sbsf->state = SF_READ_STATUS; - break; - case CMD_READ_STATUS1: - sbsf->state = SF_READ_STATUS1; - break; - case CMD_WRITE_ENABLE: - debug(" write enabled\n"); - sbsf->status |= STAT_WEL; - break; - case CMD_WRITE_STATUS: - sbsf->state = SF_WRITE_STATUS; - break; - default: { - int flags = sbsf->data->flags; - - /* we only support erase here */ - if (sbsf->cmd == CMD_ERASE_CHIP) { - sbsf->erase_size = sbsf->data->sector_size * - sbsf->data->nr_sectors; - } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { - sbsf->erase_size = 4 << 10; - } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) { - sbsf->erase_size = 32 << 10; - } else if (sbsf->cmd == CMD_ERASE_64K && - !(flags & (SECT_4K | SECT_32K))) { - sbsf->erase_size = 64 << 10; - } else { - debug(" cmd unknown: %#x\n", sbsf->cmd); - return -EIO; - } - sbsf->state = SF_ADDR; - break; - } - } - - if (oldstate != sbsf->state) - debug(" cmd: transition to %s state\n", - sandbox_sf_state_name(sbsf->state)); - - return 0; -} - -int sandbox_erase_part(struct sandbox_spi_flash *sbsf, int size) -{ - int todo; - int ret; - - while (size > 0) { - todo = min(size, (int)sizeof(sandbox_sf_0xff)); - ret = os_write(sbsf->fd, sandbox_sf_0xff, todo); - if (ret != todo) - return ret; - size -= todo; - } - - return 0; -} - -static int sandbox_sf_xfer(struct udevice *dev, unsigned int bitlen, - const void *rxp, void *txp, unsigned long flags) -{ - struct sandbox_spi_flash *sbsf = dev_get_priv(dev); - const uint8_t *rx = rxp; - uint8_t *tx = txp; - uint cnt, pos = 0; - int bytes = bitlen / 8; - int ret; - - debug("sandbox_sf: state:%x(%s) bytes:%u\n", sbsf->state, - sandbox_sf_state_name(sbsf->state), bytes); - - if ((flags & SPI_XFER_BEGIN)) - sandbox_sf_cs_activate(dev); - - if (sbsf->state == SF_CMD) { - /* Figure out the initial state */ - ret = sandbox_sf_process_cmd(sbsf, rx, tx); - if (ret) - return ret; - ++pos; - } - - /* Process the remaining data */ - while (pos < bytes) { - switch (sbsf->state) { - case SF_ID: { - u8 id; - - debug(" id: off:%u tx:", sbsf->off); - if (sbsf->off < IDCODE_LEN) { - /* Extract correct byte from ID 0x00aabbcc */ - id = sbsf->data->jedec >> - (8 * (IDCODE_LEN - 1 - sbsf->off)); - } else { - id = 0; - } - debug("%d %02x\n", sbsf->off, id); - tx[pos++] = id; - ++sbsf->off; - break; - } - case SF_ADDR: - debug(" addr: bytes:%u rx:%02x ", sbsf->addr_bytes, - rx[pos]); - - if (sbsf->addr_bytes++ < SF_ADDR_LEN) - sbsf->off = (sbsf->off << 8) | rx[pos]; - debug("addr:%06x\n", sbsf->off); - - if (tx) - sandbox_spi_tristate(&tx[pos], 1); - pos++; - - /* See if we're done processing */ - if (sbsf->addr_bytes < - SF_ADDR_LEN + sbsf->pad_addr_bytes) - break; - - /* Next state! */ - if (os_lseek(sbsf->fd, sbsf->off, OS_SEEK_SET) < 0) { - puts("sandbox_sf: os_lseek() failed"); - return -EIO; - } - switch (sbsf->cmd) { - case CMD_READ_ARRAY_FAST: - case CMD_READ_ARRAY_SLOW: - sbsf->state = SF_READ; - break; - case CMD_PAGE_PROGRAM: - sbsf->state = SF_WRITE; - break; - default: - /* assume erase state ... */ - sbsf->state = SF_ERASE; - goto case_sf_erase; - } - debug(" cmd: transition to %s state\n", - sandbox_sf_state_name(sbsf->state)); - break; - case SF_READ: - /* - * XXX: need to handle exotic behavior: - * - reading past end of device - */ - - cnt = bytes - pos; - debug(" tx: read(%u)\n", cnt); - assert(tx); - ret = os_read(sbsf->fd, tx + pos, cnt); - if (ret < 0) { - puts("sandbox_sf: os_read() failed\n"); - return -EIO; - } - pos += ret; - break; - case SF_READ_STATUS: - debug(" read status: %#x\n", sbsf->status); - cnt = bytes - pos; - memset(tx + pos, sbsf->status, cnt); - pos += cnt; - break; - case SF_READ_STATUS1: - debug(" read status: %#x\n", sbsf->status); - cnt = bytes - pos; - memset(tx + pos, sbsf->status >> 8, cnt); - pos += cnt; - break; - case SF_WRITE_STATUS: - debug(" write status: %#x (ignored)\n", rx[pos]); - pos = bytes; - break; - case SF_WRITE: - /* - * XXX: need to handle exotic behavior: - * - unaligned addresses - * - more than a page (256) worth of data - * - reading past end of device - */ - if (!(sbsf->status & STAT_WEL)) { - puts("sandbox_sf: write enable not set before write\n"); - goto done; - } - - cnt = bytes - pos; - debug(" rx: write(%u)\n", cnt); - if (tx) - sandbox_spi_tristate(&tx[pos], cnt); - ret = os_write(sbsf->fd, rx + pos, cnt); - if (ret < 0) { - puts("sandbox_spi: os_write() failed\n"); - return -EIO; - } - pos += ret; - sbsf->status &= ~STAT_WEL; - break; - case SF_ERASE: - case_sf_erase: { - if (!(sbsf->status & STAT_WEL)) { - puts("sandbox_sf: write enable not set before erase\n"); - goto done; - } - - /* verify address is aligned */ - if (sbsf->off & (sbsf->erase_size - 1)) { - debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", - sbsf->cmd, sbsf->erase_size, - sbsf->off); - sbsf->status &= ~STAT_WEL; - goto done; - } - - debug(" sector erase addr: %u, size: %u\n", sbsf->off, - sbsf->erase_size); - - cnt = bytes - pos; - if (tx) - sandbox_spi_tristate(&tx[pos], cnt); - pos += cnt; - - /* - * TODO(vapier@gentoo.org): latch WIP in status, and - * delay before clearing it ? - */ - ret = sandbox_erase_part(sbsf, sbsf->erase_size); - sbsf->status &= ~STAT_WEL; - if (ret) { - debug("sandbox_sf: Erase failed\n"); - goto done; - } - goto done; - } - default: - debug(" ??? no idea what to do ???\n"); - goto done; - } - } - - done: - if (flags & SPI_XFER_END) - sandbox_sf_cs_deactivate(dev); - return pos == bytes ? 0 : -EIO; -} - -int sandbox_sf_ofdata_to_platdata(struct udevice *dev) -{ - struct sandbox_spi_flash_plat_data *pdata = dev_get_platdata(dev); - const void *blob = gd->fdt_blob; - int node = dev->of_offset; - - pdata->filename = fdt_getprop(blob, node, "sandbox,filename", NULL); - pdata->device_name = fdt_getprop(blob, node, "compatible", NULL); - if (!pdata->filename || !pdata->device_name) { - debug("%s: Missing properties, filename=%s, device_name=%s\n", - __func__, pdata->filename, pdata->device_name); - return -EINVAL; - } - - return 0; -} - -static const struct dm_spi_emul_ops sandbox_sf_emul_ops = { - .xfer = sandbox_sf_xfer, -}; - -#ifdef CONFIG_SPI_FLASH -static int sandbox_cmdline_cb_spi_sf(struct sandbox_state *state, - const char *arg) -{ - unsigned long bus, cs; - const char *spec = sandbox_spi_parse_spec(arg, &bus, &cs); - - if (!spec) - return 1; - - /* - * It is safe to not make a copy of 'spec' because it comes from the - * command line. - * - * TODO(sjg@chromium.org): It would be nice if we could parse the - * spec here, but the problem is that no U-Boot init has been done - * yet. Perhaps we can figure something out. - */ - state->spi[bus][cs].spec = spec; - return 0; -} -SANDBOX_CMDLINE_OPT(spi_sf, 1, "connect a SPI flash: <bus>:<cs>:<id>:<file>"); - -int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs, - struct udevice *bus, int of_offset, const char *spec) -{ - struct udevice *emul; - char name[20], *str; - struct driver *drv; - int ret; - - /* now the emulator */ - strncpy(name, spec, sizeof(name) - 6); - name[sizeof(name) - 6] = '\0'; - strcat(name, "-emul"); - str = strdup(name); - if (!str) - return -ENOMEM; - drv = lists_driver_lookup_name("sandbox_sf_emul"); - if (!drv) { - puts("Cannot find sandbox_sf_emul driver\n"); - return -ENOENT; - } - ret = device_bind(bus, drv, str, NULL, of_offset, &emul); - if (ret) { - printf("Cannot create emul device for spec '%s' (err=%d)\n", - spec, ret); - return ret; - } - state->spi[busnum][cs].emul = emul; - - return 0; -} - -void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs) -{ - struct udevice *dev; - - dev = state->spi[busnum][cs].emul; - device_remove(dev); - device_unbind(dev); - state->spi[busnum][cs].emul = NULL; -} - -static int sandbox_sf_bind_bus_cs(struct sandbox_state *state, int busnum, - int cs, const char *spec) -{ - struct udevice *bus, *slave; - int ret; - - ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, true, &bus); - if (ret) { - printf("Invalid bus %d for spec '%s' (err=%d)\n", busnum, - spec, ret); - return ret; - } - ret = spi_find_chip_select(bus, cs, &slave); - if (!ret) { - printf("Chip select %d already exists for spec '%s'\n", cs, - spec); - return -EEXIST; - } - - ret = device_bind_driver(bus, "spi_flash_std", spec, &slave); - if (ret) - return ret; - - return sandbox_sf_bind_emul(state, busnum, cs, bus, -1, spec); -} - -int sandbox_spi_get_emul(struct sandbox_state *state, - struct udevice *bus, struct udevice *slave, - struct udevice **emulp) -{ - struct sandbox_spi_info *info; - int busnum = bus->seq; - int cs = spi_chip_select(slave); - int ret; - - info = &state->spi[busnum][cs]; - if (!info->emul) { - /* Use the same device tree node as the SPI flash device */ - debug("%s: busnum=%u, cs=%u: binding SPI flash emulation: ", - __func__, busnum, cs); - ret = sandbox_sf_bind_emul(state, busnum, cs, bus, - slave->of_offset, slave->name); - if (ret) { - debug("failed (err=%d)\n", ret); - return ret; - } - debug("OK\n"); - } - *emulp = info->emul; - - return 0; -} - -int dm_scan_other(bool pre_reloc_only) -{ - struct sandbox_state *state = state_get_current(); - int busnum, cs; - - if (pre_reloc_only) - return 0; - for (busnum = 0; busnum < CONFIG_SANDBOX_SPI_MAX_BUS; busnum++) { - for (cs = 0; cs < CONFIG_SANDBOX_SPI_MAX_CS; cs++) { - const char *spec = state->spi[busnum][cs].spec; - int ret; - - if (spec) { - ret = sandbox_sf_bind_bus_cs(state, busnum, - cs, spec); - if (ret) { - debug("%s: Bind failed for bus %d, cs %d\n", - __func__, busnum, cs); - return ret; - } - } - } - } - - return 0; -} -#endif - -static const struct udevice_id sandbox_sf_ids[] = { - { .compatible = "sandbox,spi-flash" }, - { } -}; - -U_BOOT_DRIVER(sandbox_sf_emul) = { - .name = "sandbox_sf_emul", - .id = UCLASS_SPI_EMUL, - .of_match = sandbox_sf_ids, - .ofdata_to_platdata = sandbox_sf_ofdata_to_platdata, - .probe = sandbox_sf_probe, - .remove = sandbox_sf_remove, - .priv_auto_alloc_size = sizeof(struct sandbox_spi_flash), - .platdata_auto_alloc_size = sizeof(struct sandbox_spi_flash_plat_data), - .ops = &sandbox_sf_emul_ops, -}; diff --git a/drivers/mtd/spi/sf-uclass.c b/drivers/mtd/spi/sf-uclass.c deleted file mode 100644 index 19de964..0000000 --- a/drivers/mtd/spi/sf-uclass.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (c) 2014 Google, Inc - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <dm.h> -#include <spi.h> -#include <spi_flash.h> -#include <dm/device-internal.h> -#include "sf_internal.h" - -DECLARE_GLOBAL_DATA_PTR; - -int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf) -{ - return sf_get_ops(dev)->read(dev, offset, len, buf); -} - -int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, - const void *buf) -{ - return sf_get_ops(dev)->write(dev, offset, len, buf); -} - -int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len) -{ - return sf_get_ops(dev)->erase(dev, offset, len); -} - -/* - * TODO(sjg@chromium.org): This is an old-style function. We should remove - * it when all SPI flash drivers use dm - */ -struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode) -{ - struct udevice *dev; - - if (spi_flash_probe_bus_cs(bus, cs, max_hz, spi_mode, &dev)) - return NULL; - - return dev_get_uclass_priv(dev); -} - -void spi_flash_free(struct spi_flash *flash) -{ - device_remove(flash->spi->dev); -} - -int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode, - struct udevice **devp) -{ - struct spi_slave *slave; - struct udevice *bus; - char *str; - int ret; - -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_USE_TINY_PRINTF) - str = "spi_flash"; -#else - char name[30]; - - snprintf(name, sizeof(name), "spi_flash@%d:%d", busnum, cs); - str = strdup(name); -#endif - ret = spi_get_bus_and_cs(busnum, cs, max_hz, spi_mode, - "spi_flash_std", str, &bus, &slave); - if (ret) - return ret; - - *devp = slave->dev; - return 0; -} - -static int spi_flash_post_bind(struct udevice *dev) -{ -#if defined(CONFIG_NEEDS_MANUAL_RELOC) - struct dm_spi_flash_ops *ops = sf_get_ops(dev); - static int reloc_done; - - if (!reloc_done) { - if (ops->read) - ops->read += gd->reloc_off; - if (ops->write) - ops->write += gd->reloc_off; - if (ops->erase) - ops->erase += gd->reloc_off; - - reloc_done++; - } -#endif - return 0; -} - -UCLASS_DRIVER(spi_flash) = { - .id = UCLASS_SPI_FLASH, - .name = "spi_flash", - .post_bind = spi_flash_post_bind, - .per_device_auto_alloc_size = sizeof(struct spi_flash), -}; diff --git a/drivers/mtd/spi/sf.c b/drivers/mtd/spi/sf.c deleted file mode 100644 index 664e860..0000000 --- a/drivers/mtd/spi/sf.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * SPI flash interface - * - * Copyright (C) 2008 Atmel Corporation - * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <spi.h> - -static int spi_flash_read_write(struct spi_slave *spi, - const u8 *cmd, size_t cmd_len, - const u8 *data_out, u8 *data_in, - size_t data_len) -{ - unsigned long flags = SPI_XFER_BEGIN; - int ret; - -#ifdef CONFIG_SF_DUAL_FLASH - if (spi->flags & SPI_XFER_U_PAGE) - flags |= SPI_XFER_U_PAGE; -#endif - if (data_len == 0) - flags |= SPI_XFER_END; - - ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags); - if (ret) { - debug("SF: Failed to send command (%zu bytes): %d\n", - cmd_len, ret); - } else if (data_len != 0) { - ret = spi_xfer(spi, data_len * 8, data_out, data_in, - SPI_XFER_END); - if (ret) - debug("SF: Failed to transfer %zu bytes of data: %d\n", - data_len, ret); - } - - return ret; -} - -int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, void *data, size_t data_len) -{ - return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len); -} - -int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len) -{ - return spi_flash_cmd_read(spi, &cmd, 1, response, len); -} - -int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, - const void *data, size_t data_len) -{ - return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len); -} diff --git a/drivers/mtd/spi/sf_dataflash.c b/drivers/mtd/spi/sf_dataflash.c deleted file mode 100644 index 0f66b99..0000000 --- a/drivers/mtd/spi/sf_dataflash.c +++ /dev/null @@ -1,701 +0,0 @@ -/* - * - * Atmel DataFlash probing - * - * Copyright (C) 2004-2009, 2015 Freescale Semiconductor, Inc. - * Haikun Wang (haikun.wang@freescale.com) - * - * SPDX-License-Identifier: GPL-2.0+ -*/ -#include <common.h> -#include <dm.h> -#include <errno.h> -#include <fdtdec.h> -#include <spi.h> -#include <spi_flash.h> -#include <div64.h> -#include <linux/err.h> -#include <linux/math64.h> - -#include "sf_internal.h" - -/* reads can bypass the buffers */ -#define OP_READ_CONTINUOUS 0xE8 -#define OP_READ_PAGE 0xD2 - -/* group B requests can run even while status reports "busy" */ -#define OP_READ_STATUS 0xD7 /* group B */ - -/* move data between host and buffer */ -#define OP_READ_BUFFER1 0xD4 /* group B */ -#define OP_READ_BUFFER2 0xD6 /* group B */ -#define OP_WRITE_BUFFER1 0x84 /* group B */ -#define OP_WRITE_BUFFER2 0x87 /* group B */ - -/* erasing flash */ -#define OP_ERASE_PAGE 0x81 -#define OP_ERASE_BLOCK 0x50 - -/* move data between buffer and flash */ -#define OP_TRANSFER_BUF1 0x53 -#define OP_TRANSFER_BUF2 0x55 -#define OP_MREAD_BUFFER1 0xD4 -#define OP_MREAD_BUFFER2 0xD6 -#define OP_MWERASE_BUFFER1 0x83 -#define OP_MWERASE_BUFFER2 0x86 -#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */ -#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */ - -/* write to buffer, then write-erase to flash */ -#define OP_PROGRAM_VIA_BUF1 0x82 -#define OP_PROGRAM_VIA_BUF2 0x85 - -/* compare buffer to flash */ -#define OP_COMPARE_BUF1 0x60 -#define OP_COMPARE_BUF2 0x61 - -/* read flash to buffer, then write-erase to flash */ -#define OP_REWRITE_VIA_BUF1 0x58 -#define OP_REWRITE_VIA_BUF2 0x59 - -/* - * newer chips report JEDEC manufacturer and device IDs; chip - * serial number and OTP bits; and per-sector writeprotect. - */ -#define OP_READ_ID 0x9F -#define OP_READ_SECURITY 0x77 -#define OP_WRITE_SECURITY_REVC 0x9A -#define OP_WRITE_SECURITY 0x9B /* revision D */ - - -struct dataflash { - uint8_t command[16]; - unsigned short page_offset; /* offset in flash address */ -}; - -/* - * Return the status of the DataFlash device. - */ -static inline int dataflash_status(struct spi_slave *spi) -{ - int ret; - u8 status; - /* - * NOTE: at45db321c over 25 MHz wants to write - * a dummy byte after the opcode... - */ - ret = spi_flash_cmd(spi, OP_READ_STATUS, &status, 1); - return ret ? -EIO : status; -} - -/* - * Poll the DataFlash device until it is READY. - * This usually takes 5-20 msec or so; more for sector erase. - * ready: return > 0 - */ -static int dataflash_waitready(struct spi_slave *spi) -{ - int status; - int timeout = 2 * CONFIG_SYS_HZ; - int timebase; - - timebase = get_timer(0); - do { - status = dataflash_status(spi); - if (status < 0) - status = 0; - - if (status & (1 << 7)) /* RDY/nBSY */ - return status; - - mdelay(3); - } while (get_timer(timebase) < timeout); - - return -ETIME; -} - -/* - * Erase pages of flash. - */ -static int spi_dataflash_erase(struct udevice *dev, u32 offset, size_t len) -{ - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; - unsigned blocksize; - uint8_t *command; - uint32_t rem; - int status; - - dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; - - blocksize = spi_flash->page_size << 3; - - memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; - - debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); - - div_u64_rem(len, spi_flash->page_size, &rem); - if (rem) - return -EINVAL; - div_u64_rem(offset, spi_flash->page_size, &rem); - if (rem) - return -EINVAL; - - status = spi_claim_bus(spi); - if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); - return status; - } - - while (len > 0) { - unsigned int pageaddr; - int do_block; - /* - * Calculate flash page address; use block erase (for speed) if - * we're at a block boundary and need to erase the whole block. - */ - pageaddr = div_u64(offset, spi_flash->page_size); - do_block = (pageaddr & 0x7) == 0 && len >= blocksize; - pageaddr = pageaddr << dataflash->page_offset; - - command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE; - command[1] = (uint8_t)(pageaddr >> 16); - command[2] = (uint8_t)(pageaddr >> 8); - command[3] = 0; - - debug("%s ERASE %s: (%x) %x %x %x [%d]\n", - dev->name, do_block ? "block" : "page", - command[0], command[1], command[2], command[3], - pageaddr); - - status = spi_flash_cmd_write(spi, command, 4, NULL, 0); - if (status < 0) { - debug("%s: erase send command error!\n", dev->name); - return -EIO; - } - - status = dataflash_waitready(spi); - if (status < 0) { - debug("%s: erase waitready error!\n", dev->name); - return status; - } - - if (do_block) { - offset += blocksize; - len -= blocksize; - } else { - offset += spi_flash->page_size; - len -= spi_flash->page_size; - } - } - - spi_release_bus(spi); - - return 0; -} - -/* - * Read from the DataFlash device. - * offset : Start offset in flash device - * len : Amount to read - * buf : Buffer containing the data - */ -static int spi_dataflash_read(struct udevice *dev, u32 offset, size_t len, - void *buf) -{ - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; - unsigned int addr; - uint8_t *command; - int status; - - dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; - - memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; - - debug("%s: erase addr=0x%x len 0x%x\n", dev->name, offset, len); - debug("READ: (%x) %x %x %x\n", - command[0], command[1], command[2], command[3]); - - /* Calculate flash page/byte address */ - addr = (((unsigned)offset / spi_flash->page_size) - << dataflash->page_offset) - + ((unsigned)offset % spi_flash->page_size); - - status = spi_claim_bus(spi); - if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); - return status; - } - - /* - * Continuous read, max clock = f(car) which may be less than - * the peak rate available. Some chips support commands with - * fewer "don't care" bytes. Both buffers stay unchanged. - */ - command[0] = OP_READ_CONTINUOUS; - command[1] = (uint8_t)(addr >> 16); - command[2] = (uint8_t)(addr >> 8); - command[3] = (uint8_t)(addr >> 0); - - /* plus 4 "don't care" bytes, command len: 4 + 4 "don't care" bytes */ - status = spi_flash_cmd_read(spi, command, 8, buf, len); - - spi_release_bus(spi); - - return status; -} - -/* - * Write to the DataFlash device. - * offset : Start offset in flash device - * len : Amount to write - * buf : Buffer containing the data - */ -int spi_dataflash_write(struct udevice *dev, u32 offset, size_t len, - const void *buf) -{ - struct dataflash *dataflash; - struct spi_flash *spi_flash; - struct spi_slave *spi; - uint8_t *command; - unsigned int pageaddr, addr, to, writelen; - size_t remaining = len; - u_char *writebuf = (u_char *)buf; - int status = -EINVAL; - - dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - spi = spi_flash->spi; - - memset(dataflash->command, 0 , sizeof(dataflash->command)); - command = dataflash->command; - - debug("%s: write 0x%x..0x%x\n", dev->name, offset, (offset + len)); - - pageaddr = ((unsigned)offset / spi_flash->page_size); - to = ((unsigned)offset % spi_flash->page_size); - if (to + len > spi_flash->page_size) - writelen = spi_flash->page_size - to; - else - writelen = len; - - status = spi_claim_bus(spi); - if (status) { - debug("SPI DATAFLASH: unable to claim SPI bus\n"); - return status; - } - - while (remaining > 0) { - debug("write @ %d:%d len=%d\n", pageaddr, to, writelen); - - /* - * REVISIT: - * (a) each page in a sector must be rewritten at least - * once every 10K sibling erase/program operations. - * (b) for pages that are already erased, we could - * use WRITE+MWRITE not PROGRAM for ~30% speedup. - * (c) WRITE to buffer could be done while waiting for - * a previous MWRITE/MWERASE to complete ... - * (d) error handling here seems to be mostly missing. - * - * Two persistent bits per page, plus a per-sector counter, - * could support (a) and (b) ... we might consider using - * the second half of sector zero, which is just one block, - * to track that state. (On AT91, that sector should also - * support boot-from-DataFlash.) - */ - - addr = pageaddr << dataflash->page_offset; - - /* (1) Maybe transfer partial page to Buffer1 */ - if (writelen != spi_flash->page_size) { - command[0] = OP_TRANSFER_BUF1; - command[1] = (addr & 0x00FF0000) >> 16; - command[2] = (addr & 0x0000FF00) >> 8; - command[3] = 0; - - debug("TRANSFER: (%x) %x %x %x\n", - command[0], command[1], command[2], command[3]); - - status = spi_flash_cmd_write(spi, command, 4, NULL, 0); - if (status < 0) { - debug("%s: write(<pagesize) command error!\n", - dev->name); - return -EIO; - } - - status = dataflash_waitready(spi); - if (status < 0) { - debug("%s: write(<pagesize) waitready error!\n", - dev->name); - return status; - } - } - - /* (2) Program full page via Buffer1 */ - addr += to; - command[0] = OP_PROGRAM_VIA_BUF1; - command[1] = (addr & 0x00FF0000) >> 16; - command[2] = (addr & 0x0000FF00) >> 8; - command[3] = (addr & 0x000000FF); - - debug("PROGRAM: (%x) %x %x %x\n", - command[0], command[1], command[2], command[3]); - - status = spi_flash_cmd_write(spi, command, - 4, writebuf, writelen); - if (status < 0) { - debug("%s: write send command error!\n", dev->name); - return -EIO; - } - - status = dataflash_waitready(spi); - if (status < 0) { - debug("%s: write waitready error!\n", dev->name); - return status; - } - -#ifdef CONFIG_SPI_DATAFLASH_WRITE_VERIFY - /* (3) Compare to Buffer1 */ - addr = pageaddr << dataflash->page_offset; - command[0] = OP_COMPARE_BUF1; - command[1] = (addr & 0x00FF0000) >> 16; - command[2] = (addr & 0x0000FF00) >> 8; - command[3] = 0; - - debug("COMPARE: (%x) %x %x %x\n", - command[0], command[1], command[2], command[3]); - - status = spi_flash_cmd_write(spi, command, - 4, writebuf, writelen); - if (status < 0) { - debug("%s: write(compare) send command error!\n", - dev->name); - return -EIO; - } - - status = dataflash_waitready(spi); - - /* Check result of the compare operation */ - if (status & (1 << 6)) { - printf("SPI DataFlash: write compare page %u, err %d\n", - pageaddr, status); - remaining = 0; - status = -EIO; - break; - } else { - status = 0; - } - -#endif /* CONFIG_SPI_DATAFLASH_WRITE_VERIFY */ - remaining = remaining - writelen; - pageaddr++; - to = 0; - writebuf += writelen; - - if (remaining > spi_flash->page_size) - writelen = spi_flash->page_size; - else - writelen = remaining; - } - - spi_release_bus(spi); - - return 0; -} - -static int add_dataflash(struct udevice *dev, char *name, int nr_pages, - int pagesize, int pageoffset, char revision) -{ - struct spi_flash *spi_flash; - struct dataflash *dataflash; - - dataflash = dev_get_priv(dev); - spi_flash = dev_get_uclass_priv(dev); - - dataflash->page_offset = pageoffset; - - spi_flash->name = name; - spi_flash->page_size = pagesize; - spi_flash->size = nr_pages * pagesize; - spi_flash->erasesize = pagesize; - -#ifndef CONFIG_SPL_BUILD - printf("SPI DataFlash: Detected %s with page size ", spi_flash->name); - print_size(spi_flash->page_size, ", erase size "); - print_size(spi_flash->erasesize, ", total "); - print_size(spi_flash->size, ""); - printf(", revision %c", revision); - puts("\n"); -#endif - - return 0; -} - -struct flash_info { - char *name; - - /* - * JEDEC id has a high byte of zero plus three data bytes: - * the manufacturer id, then a two byte device id. - */ - uint32_t jedec_id; - - /* The size listed here is what works with OP_ERASE_PAGE. */ - unsigned nr_pages; - uint16_t pagesize; - uint16_t pageoffset; - - uint16_t flags; -#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */ -#define IS_POW2PS 0x0001 /* uses 2^N byte pages */ -}; - -static struct flash_info dataflash_data[] = { - /* - * NOTE: chips with SUP_POW2PS (rev D and up) need two entries, - * one with IS_POW2PS and the other without. The entry with the - * non-2^N byte page size can't name exact chip revisions without - * losing backwards compatibility for cmdlinepart. - * - * Those two entries have different name spelling format in order to - * show their difference obviously. - * The upper case refer to the chip isn't in normal 2^N bytes page-size - * mode. - * The lower case refer to the chip is in normal 2^N bytes page-size - * mode. - * - * These newer chips also support 128-byte security registers (with - * 64 bytes one-time-programmable) and software write-protection. - */ - { "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS}, - { "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS}, - { "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS}, - { "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS}, - { "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS}, - { "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */ - - { "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS}, - { "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS}, - - { "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS}, - { "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS}, -}; - -static struct flash_info *jedec_probe(struct spi_slave *spi, u8 *id) -{ - int tmp; - uint32_t jedec; - struct flash_info *info; - int status; - - /* - * JEDEC also defines an optional "extended device information" - * string for after vendor-specific data, after the three bytes - * we use here. Supporting some chips might require using it. - * - * If the vendor ID isn't Atmel's (0x1f), assume this call failed. - * That's not an error; only rev C and newer chips handle it, and - * only Atmel sells these chips. - */ - if (id[0] != 0x1f) - return NULL; - - jedec = id[0]; - jedec = jedec << 8; - jedec |= id[1]; - jedec = jedec << 8; - jedec |= id[2]; - - for (tmp = 0, info = dataflash_data; - tmp < ARRAY_SIZE(dataflash_data); - tmp++, info++) { - if (info->jedec_id == jedec) { - if (info->flags & SUP_POW2PS) { - status = dataflash_status(spi); - if (status < 0) { - debug("SPI DataFlash: status error %d\n", - status); - return NULL; - } - if (status & 0x1) { - if (info->flags & IS_POW2PS) - return info; - } else { - if (!(info->flags & IS_POW2PS)) - return info; - } - } else { - return info; - } - } - } - - /* - * Treat other chips as errors ... we won't know the right page - * size (it might be binary) even when we can tell which density - * class is involved (legacy chip id scheme). - */ - printf("SPI DataFlash: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - id[0], jedec, id[3] << 8 | id[4]); - return NULL; -} - -/* - * Detect and initialize DataFlash device, using JEDEC IDs on newer chips - * or else the ID code embedded in the status bits: - * - * Device Density ID code #Pages PageSize Offset - * AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9 - * AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9 - * AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9 - * AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9 - * AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10 - * AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10 - * AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11 - * AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11 - */ -static int spi_dataflash_probe(struct udevice *dev) -{ - struct spi_slave *spi = dev_get_parent_priv(dev); - struct spi_flash *spi_flash; - struct flash_info *info; - u8 idcode[5]; - int ret, status = 0; - - spi_flash = dev_get_uclass_priv(dev); - spi_flash->dev = dev; - - ret = spi_claim_bus(spi); - if (ret) - return ret; - - ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SPI DataFlash: Failed to get idcodes\n"); - goto err_read_cmd; - } - - /* - * Try to detect dataflash by JEDEC ID. - * If it succeeds we know we have either a C or D part. - * D will support power of 2 pagesize option. - * Both support the security register, though with different - * write procedures. - */ - info = jedec_probe(spi, idcode); - if (info != NULL) - add_dataflash(dev, info->name, info->nr_pages, - info->pagesize, info->pageoffset, - (info->flags & SUP_POW2PS) ? 'd' : 'c'); - else { - /* - * Older chips support only legacy commands, identifing - * capacity using bits in the status byte. - */ - status = dataflash_status(spi); - if (status <= 0 || status == 0xff) { - printf("SPI DataFlash: read status error %d\n", status); - if (status == 0 || status == 0xff) - status = -ENODEV; - goto err_read_cmd; - } - /* - * if there's a device there, assume it's dataflash. - * board setup should have set spi->max_speed_max to - * match f(car) for continuous reads, mode 0 or 3. - */ - switch (status & 0x3c) { - case 0x0c: /* 0 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB011B", - 512, 264, 9, 0); - break; - case 0x14: /* 0 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB021B", - 1024, 264, 9, 0); - break; - case 0x1c: /* 0 1 1 1 x x */ - status = add_dataflash(dev, "AT45DB041x", - 2048, 264, 9, 0); - break; - case 0x24: /* 1 0 0 1 x x */ - status = add_dataflash(dev, "AT45DB081B", - 4096, 264, 9, 0); - break; - case 0x2c: /* 1 0 1 1 x x */ - status = add_dataflash(dev, "AT45DB161x", - 4096, 528, 10, 0); - break; - case 0x34: /* 1 1 0 1 x x */ - status = add_dataflash(dev, "AT45DB321x", - 8192, 528, 10, 0); - break; - case 0x38: /* 1 1 1 x x x */ - case 0x3c: - status = add_dataflash(dev, "AT45DB642x", - 8192, 1056, 11, 0); - break; - /* obsolete AT45DB1282 not (yet?) supported */ - default: - dev_info(&spi->dev, "unsupported device (%x)\n", - status & 0x3c); - status = -ENODEV; - goto err_read_cmd; - } - } - - /* Assign spi data */ - spi_flash->spi = spi; - spi_flash->memory_map = spi->memory_map; - spi_flash->dual_flash = spi->option; - - spi_release_bus(spi); - - return 0; - -err_read_cmd: - spi_release_bus(spi); - - return status; -} - -static const struct dm_spi_flash_ops spi_dataflash_ops = { - .read = spi_dataflash_read, - .write = spi_dataflash_write, - .erase = spi_dataflash_erase, -}; - -static const struct udevice_id spi_dataflash_ids[] = { - { .compatible = "atmel,at45", }, - { .compatible = "atmel,dataflash", }, - { } -}; - -U_BOOT_DRIVER(spi_dataflash) = { - .name = "spi_dataflash", - .id = UCLASS_SPI_FLASH, - .of_match = spi_dataflash_ids, - .probe = spi_dataflash_probe, - .priv_auto_alloc_size = sizeof(struct dataflash), - .ops = &spi_dataflash_ops, -}; diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h deleted file mode 100644 index 007a5a0..0000000 --- a/drivers/mtd/spi/sf_internal.h +++ /dev/null @@ -1,243 +0,0 @@ -/* - * SPI flash internal definitions - * - * Copyright (C) 2008 Atmel Corporation - * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef _SF_INTERNAL_H_ -#define _SF_INTERNAL_H_ - -#include <linux/types.h> -#include <linux/compiler.h> - -/* Dual SPI flash memories - see SPI_COMM_DUAL_... */ -enum spi_dual_flash { - SF_SINGLE_FLASH = 0, - SF_DUAL_STACKED_FLASH = BIT(0), - SF_DUAL_PARALLEL_FLASH = BIT(1), -}; - -/* Enum list - Full read commands */ -enum spi_read_cmds { - ARRAY_SLOW = BIT(0), - ARRAY_FAST = BIT(1), - DUAL_OUTPUT_FAST = BIT(2), - QUAD_OUTPUT_FAST = BIT(3), - DUAL_IO_FAST = BIT(4), - QUAD_IO_FAST = BIT(5), -}; - -/* Normal - Extended - Full command set */ -#define RD_NORM (ARRAY_SLOW | ARRAY_FAST) -#define RD_EXTN (RD_NORM | DUAL_OUTPUT_FAST | DUAL_IO_FAST) -#define RD_FULL (RD_EXTN | QUAD_OUTPUT_FAST | QUAD_IO_FAST) - -/* sf param flags */ -enum { -#ifndef CONFIG_SPI_FLASH_USE_4K_SECTORS - SECT_4K = 0, -#else - SECT_4K = BIT(0), -#endif - SECT_32K = BIT(1), - E_FSR = BIT(2), - SST_WR = BIT(3), - WR_QPP = BIT(4), -}; - -enum spi_nor_option_flags { - SNOR_F_SST_WR = BIT(0), - SNOR_F_USE_FSR = BIT(1), -}; - -#define SPI_FLASH_3B_ADDR_LEN 3 -#define SPI_FLASH_CMD_LEN (1 + SPI_FLASH_3B_ADDR_LEN) -#define SPI_FLASH_16MB_BOUN 0x1000000 - -/* CFI Manufacture ID's */ -#define SPI_FLASH_CFI_MFR_SPANSION 0x01 -#define SPI_FLASH_CFI_MFR_STMICRO 0x20 -#define SPI_FLASH_CFI_MFR_MACRONIX 0xc2 -#define SPI_FLASH_CFI_MFR_SST 0xbf -#define SPI_FLASH_CFI_MFR_WINBOND 0xef -#define SPI_FLASH_CFI_MFR_ATMEL 0x1f - -/* Erase commands */ -#define CMD_ERASE_4K 0x20 -#define CMD_ERASE_32K 0x52 -#define CMD_ERASE_CHIP 0xc7 -#define CMD_ERASE_64K 0xd8 - -/* Write commands */ -#define CMD_WRITE_STATUS 0x01 -#define CMD_PAGE_PROGRAM 0x02 -#define CMD_WRITE_DISABLE 0x04 -#define CMD_WRITE_ENABLE 0x06 -#define CMD_QUAD_PAGE_PROGRAM 0x32 -#define CMD_WRITE_EVCR 0x61 - -/* Read commands */ -#define CMD_READ_ARRAY_SLOW 0x03 -#define CMD_READ_ARRAY_FAST 0x0b -#define CMD_READ_DUAL_OUTPUT_FAST 0x3b -#define CMD_READ_DUAL_IO_FAST 0xbb -#define CMD_READ_QUAD_OUTPUT_FAST 0x6b -#define CMD_READ_QUAD_IO_FAST 0xeb -#define CMD_READ_ID 0x9f -#define CMD_READ_STATUS 0x05 -#define CMD_READ_STATUS1 0x35 -#define CMD_READ_CONFIG 0x35 -#define CMD_FLAG_STATUS 0x70 -#define CMD_READ_EVCR 0x65 - -/* Bank addr access commands */ -#ifdef CONFIG_SPI_FLASH_BAR -# define CMD_BANKADDR_BRWR 0x17 -# define CMD_BANKADDR_BRRD 0x16 -# define CMD_EXTNADDR_WREAR 0xC5 -# define CMD_EXTNADDR_RDEAR 0xC8 -#endif - -/* Common status */ -#define STATUS_WIP BIT(0) -#define STATUS_QEB_WINSPAN BIT(1) -#define STATUS_QEB_MXIC BIT(6) -#define STATUS_PEC BIT(7) -#define STATUS_QEB_MICRON BIT(7) -#define SR_BP0 BIT(2) /* Block protect 0 */ -#define SR_BP1 BIT(3) /* Block protect 1 */ -#define SR_BP2 BIT(4) /* Block protect 2 */ - -/* Flash timeout values */ -#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) -#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) -#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) - -/* SST specific */ -#ifdef CONFIG_SPI_FLASH_SST -# define CMD_SST_BP 0x02 /* Byte Program */ -# define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */ - -int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, - const void *buf); -int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, - const void *buf); -#endif - -/** - * struct spi_flash_params - SPI/QSPI flash device params structure - * - * @name: Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO]) - * @jedec: Device jedec ID (0x[1byte_manuf_id][2byte_dev_id]) - * @ext_jedec: Device ext_jedec ID - * @sector_size: Isn't necessarily a sector size from vendor, - * the size listed here is what works with CMD_ERASE_64K - * @nr_sectors: No.of sectors on this device - * @e_rd_cmd: Enum list for read commands - * @flags: Important param, for flash specific behaviour - */ -struct spi_flash_params { - const char *name; - u32 jedec; - u16 ext_jedec; - u32 sector_size; - u32 nr_sectors; - u8 e_rd_cmd; - u16 flags; -}; - -extern const struct spi_flash_params spi_flash_params_table[]; - -/* Send a single-byte command to the device and read the response */ -int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); - -/* - * Send a multi-byte command to the device and read the response. Used - * for flash array reads, etc. - */ -int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd, - size_t cmd_len, void *data, size_t data_len); - -/* - * Send a multi-byte command to the device followed by (optional) - * data. Used for programming the flash array, etc. - */ -int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, - const void *data, size_t data_len); - - -/* Flash erase(sectors) operation, support all possible erase commands */ -int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); - -/* Lock stmicro spi flash region */ -int stm_lock(struct spi_flash *flash, u32 ofs, size_t len); - -/* Unlock stmicro spi flash region */ -int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len); - -/* Check if a stmicro spi flash region is completely locked */ -int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len); - -/* Enable writing on the SPI flash */ -static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) -{ - return spi_flash_cmd(flash->spi, CMD_WRITE_ENABLE, NULL, 0); -} - -/* Disable writing on the SPI flash */ -static inline int spi_flash_cmd_write_disable(struct spi_flash *flash) -{ - return spi_flash_cmd(flash->spi, CMD_WRITE_DISABLE, NULL, 0); -} - -/* - * Used for spi_flash write operation - * - SPI claim - * - spi_flash_cmd_write_enable - * - spi_flash_cmd_write - * - spi_flash_cmd_wait_ready - * - SPI release - */ -int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, - size_t cmd_len, const void *buf, size_t buf_len); - -/* - * Flash write operation, support all possible write commands. - * Write the requested data out breaking it up into multiple write - * commands as needed per the write size. - */ -int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, - size_t len, const void *buf); - -/* - * Same as spi_flash_cmd_read() except it also claims/releases the SPI - * bus. Used as common part of the ->read() operation. - */ -int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, - size_t cmd_len, void *data, size_t data_len); - -/* Flash read operation, support all possible read commands */ -int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, - size_t len, void *data); - -#ifdef CONFIG_SPI_FLASH_MTD -int spi_flash_mtd_register(struct spi_flash *flash); -void spi_flash_mtd_unregister(void); -#endif - -/** - * spi_flash_scan - scan the SPI FLASH - * @flash: the spi flash structure - * - * The drivers can use this fuction to scan the SPI FLASH. - * In the scanning, it will try to get all the necessary information to - * fill the spi_flash{}. - * - * Return: 0 for success, others for failure. - */ -int spi_flash_scan(struct spi_flash *flash); - -#endif /* _SF_INTERNAL_H_ */ diff --git a/drivers/mtd/spi/sf_mtd.c b/drivers/mtd/spi/sf_mtd.c deleted file mode 100644 index 9a8302d..0000000 --- a/drivers/mtd/spi/sf_mtd.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright (C) 2012-2014 Daniel Schwierzeck, daniel.schwierzeck@gmail.com - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <malloc.h> -#include <asm/errno.h> -#include <linux/mtd/mtd.h> -#include <spi_flash.h> - -static struct mtd_info sf_mtd_info; -static char sf_mtd_name[8]; - -static int spi_flash_mtd_erase(struct mtd_info *mtd, struct erase_info *instr) -{ - struct spi_flash *flash = mtd->priv; - int err; - - instr->state = MTD_ERASING; - - err = spi_flash_erase(flash, instr->addr, instr->len); - if (err) { - instr->state = MTD_ERASE_FAILED; - instr->fail_addr = MTD_FAIL_ADDR_UNKNOWN; - return -EIO; - } - - instr->state = MTD_ERASE_DONE; - mtd_erase_callback(instr); - - return 0; -} - -static int spi_flash_mtd_read(struct mtd_info *mtd, loff_t from, size_t len, - size_t *retlen, u_char *buf) -{ - struct spi_flash *flash = mtd->priv; - int err; - - err = spi_flash_read(flash, from, len, buf); - if (!err) - *retlen = len; - - return err; -} - -static int spi_flash_mtd_write(struct mtd_info *mtd, loff_t to, size_t len, - size_t *retlen, const u_char *buf) -{ - struct spi_flash *flash = mtd->priv; - int err; - - err = spi_flash_write(flash, to, len, buf); - if (!err) - *retlen = len; - - return err; -} - -static void spi_flash_mtd_sync(struct mtd_info *mtd) -{ -} - -static int spi_flash_mtd_number(void) -{ -#ifdef CONFIG_SYS_MAX_FLASH_BANKS - return CONFIG_SYS_MAX_FLASH_BANKS; -#else - return 0; -#endif -} - -int spi_flash_mtd_register(struct spi_flash *flash) -{ - memset(&sf_mtd_info, 0, sizeof(sf_mtd_info)); - sprintf(sf_mtd_name, "nor%d", spi_flash_mtd_number()); - - sf_mtd_info.name = sf_mtd_name; - sf_mtd_info.type = MTD_NORFLASH; - sf_mtd_info.flags = MTD_CAP_NORFLASH; - sf_mtd_info.writesize = 1; - sf_mtd_info.writebufsize = flash->page_size; - - sf_mtd_info._erase = spi_flash_mtd_erase; - sf_mtd_info._read = spi_flash_mtd_read; - sf_mtd_info._write = spi_flash_mtd_write; - sf_mtd_info._sync = spi_flash_mtd_sync; - - sf_mtd_info.size = flash->size; - sf_mtd_info.priv = flash; - - /* Only uniform flash devices for now */ - sf_mtd_info.numeraseregions = 0; - sf_mtd_info.erasesize = flash->erasesize; - - return add_mtd_device(&sf_mtd_info); -} - -void spi_flash_mtd_unregister(void) -{ - del_mtd_device(&sf_mtd_info); -} diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c deleted file mode 100644 index 4f37e33..0000000 --- a/drivers/mtd/spi/sf_params.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * SPI flash Params table - * - * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <spi.h> -#include <spi_flash.h> - -#include "sf_internal.h" - -/* SPI/QSPI flash device params structure */ -const struct spi_flash_params spi_flash_params_table[] = { -#ifdef CONFIG_SPI_FLASH_ATMEL /* ATMEL */ - {"AT45DB011D", 0x1f2200, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K}, - {"AT45DB021D", 0x1f2300, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"AT45DB041D", 0x1f2400, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"AT45DB081D", 0x1f2500, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K}, - {"AT45DB161D", 0x1f2600, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K}, - {"AT45DB321D", 0x1f2700, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"AT45DB641D", 0x1f2800, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"AT25DF321", 0x1f4701, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"AT26DF081A", 0x1f4501, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K}, -#endif -#ifdef CONFIG_SPI_FLASH_EON /* EON */ - {"EN25Q32B", 0x1c3016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"EN25Q64", 0x1c3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"EN25Q128B", 0x1c3018, 0x0, 64 * 1024, 256, RD_NORM, 0}, - {"EN25S64", 0x1c3817, 0x0, 64 * 1024, 128, RD_NORM, 0}, -#endif -#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */ - {"GD25Q64B", 0xc84017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"GD25LQ32", 0xc86016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, -#endif -#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */ - {"IS25LP032", 0x9d6016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"IS25LP064", 0x9d6017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"IS25LP128", 0x9d6018, 0x0, 64 * 1024, 256, RD_NORM, 0}, -#endif -#ifdef CONFIG_SPI_FLASH_MACRONIX /* MACRONIX */ - {"MX25L2006E", 0xc22012, 0x0, 64 * 1024, 4, RD_NORM, 0}, - {"MX25L4005", 0xc22013, 0x0, 64 * 1024, 8, RD_NORM, 0}, - {"MX25L8005", 0xc22014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"MX25L1605D", 0xc22015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"MX25L3205D", 0xc22016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"MX25L6405D", 0xc22017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"MX25L12805", 0xc22018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"MX25L25635F", 0xc22019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP}, - {"MX25L51235F", 0xc2201a, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP}, - {"MX25L12855E", 0xc22618, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, -#endif -#ifdef CONFIG_SPI_FLASH_SPANSION /* SPANSION */ - {"S25FL008A", 0x010213, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"S25FL016A", 0x010214, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"S25FL032A", 0x010215, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"S25FL064A", 0x010216, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL116K", 0x014015, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL164K", 0x014017, 0x0140, 64 * 1024, 128, RD_NORM, 0}, - {"S25FL128P_256K", 0x012018, 0x0300, 256 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL128P_64K", 0x012018, 0x0301, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL032P", 0x010215, 0x4d00, 64 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL064P", 0x010216, 0x4d00, 64 * 1024, 128, RD_FULL, WR_QPP}, - {"S25FL128S_256K", 0x012018, 0x4d00, 256 * 1024, 64, RD_FULL, WR_QPP}, - {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP}, - {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP}, - {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP}, - {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP}, - {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP}, -#endif -#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */ - {"M25P10", 0x202011, 0x0, 32 * 1024, 4, RD_NORM, 0}, - {"M25P20", 0x202012, 0x0, 64 * 1024, 4, RD_NORM, 0}, - {"M25P40", 0x202013, 0x0, 64 * 1024, 8, RD_NORM, 0}, - {"M25P80", 0x202014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"M25P16", 0x202015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, RD_NORM, 0}, - {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0}, - {"M25P32", 0x202016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"M25P64", 0x202017, 0x0, 64 * 1024, 128, RD_NORM, 0}, - {"M25P128", 0x202018, 0x0, 256 * 1024, 64, RD_NORM, 0}, - {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP}, - {"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, - {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, -#endif -#ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K | SST_WR}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K | SST_WR}, - {"SST25WF040B", 0x621613, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_NORM, SECT_4K | SST_WR}, -#endif -#ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ - {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, RD_NORM, 0}, - {"W25P16", 0xef2015, 0x0, 64 * 1024, 32, RD_NORM, 0}, - {"W25P32", 0xef2016, 0x0, 64 * 1024, 64, RD_NORM, 0}, - {"W25X40", 0xef3013, 0x0, 64 * 1024, 8, RD_NORM, SECT_4K}, - {"W25X16", 0xef3015, 0x0, 64 * 1024, 32, RD_NORM, SECT_4K}, - {"W25X32", 0xef3016, 0x0, 64 * 1024, 64, RD_NORM, SECT_4K}, - {"W25X64", 0xef3017, 0x0, 64 * 1024, 128, RD_NORM, SECT_4K}, - {"W25Q80BL", 0xef4014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q16CL", 0xef4015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q32BV", 0xef4016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q64CV", 0xef4017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q128BV", 0xef4018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q256", 0xef4019, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q80BW", 0xef5014, 0x0, 64 * 1024, 16, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q16DW", 0xef6015, 0x0, 64 * 1024, 32, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q32DW", 0xef6016, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, - {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K}, -#endif - {}, /* Empty entry to terminate the list */ - /* - * Note: - * Below paired flash devices has similar spi_flash params. - * (S25FL129P_64K, S25FL128S_64K) - * (W25Q80BL, W25Q80BV) - * (W25Q16CL, W25Q16DV) - * (W25Q32BV, W25Q32FV_SPI) - * (W25Q64CV, W25Q64FV_SPI) - * (W25Q128BV, W25Q128FV_SPI) - * (W25Q32DW, W25Q32FV_QPI) - * (W25Q64DW, W25Q64FV_QPI) - * (W25Q128FW, W25Q128FV_QPI) - */ -}; diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c deleted file mode 100644 index daa1d5b..0000000 --- a/drivers/mtd/spi/sf_probe.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * SPI flash probing - * - * Copyright (C) 2008 Atmel Corporation - * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik - * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <dm.h> -#include <errno.h> -#include <malloc.h> -#include <spi.h> -#include <spi_flash.h> - -#include "sf_internal.h" - -/** - * spi_flash_probe_slave() - Probe for a SPI flash device on a bus - * - * @flashp: Pointer to place to put flash info, which may be NULL if the - * space should be allocated - */ -static int spi_flash_probe_slave(struct spi_flash *flash) -{ - struct spi_slave *spi = flash->spi; - int ret; - - /* Setup spi_slave */ - if (!spi) { - printf("SF: Failed to set up slave\n"); - return -ENODEV; - } - - /* Claim spi bus */ - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: Failed to claim SPI bus: %d\n", ret); - return ret; - } - - ret = spi_flash_scan(flash); - if (ret) { - ret = -EINVAL; - goto err_read_id; - } - -#ifdef CONFIG_SPI_FLASH_MTD - ret = spi_flash_mtd_register(flash); -#endif - -err_read_id: - spi_release_bus(spi); - return ret; -} - -#ifndef CONFIG_DM_SPI_FLASH -static struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus) -{ - struct spi_flash *flash; - - /* Allocate space if needed (not used by sf-uclass */ - flash = calloc(1, sizeof(*flash)); - if (!flash) { - debug("SF: Failed to allocate spi_flash\n"); - return NULL; - } - - flash->spi = bus; - if (spi_flash_probe_slave(flash)) { - spi_free_slave(bus); - free(flash); - return NULL; - } - - return flash; -} - -struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode) -{ - struct spi_slave *bus; - - bus = spi_setup_slave(busnum, cs, max_hz, spi_mode); - if (!bus) - return NULL; - return spi_flash_probe_tail(bus); -} - -#ifdef CONFIG_OF_SPI_FLASH -struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, - int spi_node) -{ - struct spi_slave *bus; - - bus = spi_setup_slave_fdt(blob, slave_node, spi_node); - if (!bus) - return NULL; - return spi_flash_probe_tail(bus); -} -#endif - -void spi_flash_free(struct spi_flash *flash) -{ -#ifdef CONFIG_SPI_FLASH_MTD - spi_flash_mtd_unregister(); -#endif - spi_free_slave(flash->spi); - free(flash); -} - -#else /* defined CONFIG_DM_SPI_FLASH */ - -static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len, - void *buf) -{ - struct spi_flash *flash = dev_get_uclass_priv(dev); - - return spi_flash_cmd_read_ops(flash, offset, len, buf); -} - -static int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len, - const void *buf) -{ - struct spi_flash *flash = dev_get_uclass_priv(dev); - -#if defined(CONFIG_SPI_FLASH_SST) - if (flash->flags & SNOR_F_SST_WR) { - if (flash->spi->mode & SPI_TX_BYTE) - return sst_write_bp(flash, offset, len, buf); - else - return sst_write_wp(flash, offset, len, buf); - } -#endif - - return spi_flash_cmd_write_ops(flash, offset, len, buf); -} - -static int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len) -{ - struct spi_flash *flash = dev_get_uclass_priv(dev); - - return spi_flash_cmd_erase_ops(flash, offset, len); -} - -static int spi_flash_std_probe(struct udevice *dev) -{ - struct spi_slave *slave = dev_get_parent_priv(dev); - struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev); - struct spi_flash *flash; - - flash = dev_get_uclass_priv(dev); - flash->dev = dev; - flash->spi = slave; - debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs); - return spi_flash_probe_slave(flash); -} - -static const struct dm_spi_flash_ops spi_flash_std_ops = { - .read = spi_flash_std_read, - .write = spi_flash_std_write, - .erase = spi_flash_std_erase, -}; - -static const struct udevice_id spi_flash_std_ids[] = { - { .compatible = "spi-flash" }, - { } -}; - -U_BOOT_DRIVER(spi_flash_std) = { - .name = "spi_flash_std", - .id = UCLASS_SPI_FLASH, - .of_match = spi_flash_std_ids, - .probe = spi_flash_std_probe, - .priv_auto_alloc_size = sizeof(struct spi_flash), - .ops = &spi_flash_std_ops, -}; - -#endif /* CONFIG_DM_SPI_FLASH */ diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c deleted file mode 100644 index 891e1ec..0000000 --- a/drivers/mtd/spi/spi_flash.c +++ /dev/null @@ -1,1182 +0,0 @@ -/* - * SPI Flash Core - * - * Copyright (C) 2015 Jagan Teki jteki@openedev.com - * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. - * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik - * Copyright (C) 2008 Atmel Corporation - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <errno.h> -#include <malloc.h> -#include <mapmem.h> -#include <spi.h> -#include <spi_flash.h> -#include <linux/log2.h> - -#include "sf_internal.h" - -DECLARE_GLOBAL_DATA_PTR; - -static void spi_flash_addr(u32 addr, u8 *cmd) -{ - /* cmd[0] is actual command */ - cmd[1] = addr >> 16; - cmd[2] = addr >> 8; - cmd[3] = addr >> 0; -} - -static int read_sr(struct spi_flash *flash, u8 *rs) -{ - int ret; - u8 cmd; - - cmd = CMD_READ_STATUS; - ret = spi_flash_read_common(flash, &cmd, 1, rs, 1); - if (ret < 0) { - debug("SF: fail to read status register\n"); - return ret; - } - - return 0; -} - -static int read_fsr(struct spi_flash *flash, u8 *fsr) -{ - int ret; - const u8 cmd = CMD_FLAG_STATUS; - - ret = spi_flash_read_common(flash, &cmd, 1, fsr, 1); - if (ret < 0) { - debug("SF: fail to read flag status register\n"); - return ret; - } - - return 0; -} - -static int write_sr(struct spi_flash *flash, u8 ws) -{ - u8 cmd; - int ret; - - cmd = CMD_WRITE_STATUS; - ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1); - if (ret < 0) { - debug("SF: fail to write status register\n"); - return ret; - } - - return 0; -} - -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) -static int read_cr(struct spi_flash *flash, u8 *rc) -{ - int ret; - u8 cmd; - - cmd = CMD_READ_CONFIG; - ret = spi_flash_read_common(flash, &cmd, 1, rc, 1); - if (ret < 0) { - debug("SF: fail to read config register\n"); - return ret; - } - - return 0; -} - -static int write_cr(struct spi_flash *flash, u8 wc) -{ - u8 data[2]; - u8 cmd; - int ret; - - ret = read_sr(flash, &data[0]); - if (ret < 0) - return ret; - - cmd = CMD_WRITE_STATUS; - data[1] = wc; - ret = spi_flash_write_common(flash, &cmd, 1, &data, 2); - if (ret) { - debug("SF: fail to write config register\n"); - return ret; - } - - return 0; -} -#endif - -#ifdef CONFIG_SPI_FLASH_STMICRO -static int read_evcr(struct spi_flash *flash, u8 *evcr) -{ - int ret; - const u8 cmd = CMD_READ_EVCR; - - ret = spi_flash_read_common(flash, &cmd, 1, evcr, 1); - if (ret < 0) { - debug("SF: error reading EVCR\n"); - return ret; - } - - return 0; -} - -static int write_evcr(struct spi_flash *flash, u8 evcr) -{ - u8 cmd; - int ret; - - cmd = CMD_WRITE_EVCR; - ret = spi_flash_write_common(flash, &cmd, 1, &evcr, 1); - if (ret < 0) { - debug("SF: error while writing EVCR register\n"); - return ret; - } - - return 0; -} -#endif - -#ifdef CONFIG_SPI_FLASH_BAR -static int spi_flash_write_bar(struct spi_flash *flash, u32 offset) -{ - u8 cmd, bank_sel; - int ret; - - bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift); - if (bank_sel == flash->bank_curr) - goto bar_end; - - cmd = flash->bank_write_cmd; - ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); - if (ret < 0) { - debug("SF: fail to write bank register\n"); - return ret; - } - -bar_end: - flash->bank_curr = bank_sel; - return flash->bank_curr; -} - -static int spi_flash_read_bar(struct spi_flash *flash, u8 idcode0) -{ - u8 curr_bank = 0; - int ret; - - if (flash->size <= SPI_FLASH_16MB_BOUN) - goto bar_end; - - switch (idcode0) { - case SPI_FLASH_CFI_MFR_SPANSION: - flash->bank_read_cmd = CMD_BANKADDR_BRRD; - flash->bank_write_cmd = CMD_BANKADDR_BRWR; - break; - default: - flash->bank_read_cmd = CMD_EXTNADDR_RDEAR; - flash->bank_write_cmd = CMD_EXTNADDR_WREAR; - } - - ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1, - &curr_bank, 1); - if (ret) { - debug("SF: fail to read bank addr register\n"); - return ret; - } - -bar_end: - flash->bank_curr = curr_bank; - return 0; -} -#endif - -#ifdef CONFIG_SF_DUAL_FLASH -static void spi_flash_dual(struct spi_flash *flash, u32 *addr) -{ - struct spi_slave *spi = flash->spi; - - switch (flash->dual_flash) { - case SF_DUAL_STACKED_FLASH: - if (*addr >= (flash->size >> 1)) { - *addr -= flash->size >> 1; - spi->flags |= SPI_XFER_U_PAGE; - } else { - spi->flags &= ~SPI_XFER_U_PAGE; - } - break; - case SF_DUAL_PARALLEL_FLASH: - *addr >>= flash->shift; - break; - default: - debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash); - break; - } -} -#endif - -static int spi_flash_sr_ready(struct spi_flash *flash) -{ - u8 sr; - int ret; - - ret = read_sr(flash, &sr); - if (ret < 0) - return ret; - - return !(sr & STATUS_WIP); -} - -static int spi_flash_fsr_ready(struct spi_flash *flash) -{ - u8 fsr; - int ret; - - ret = read_fsr(flash, &fsr); - if (ret < 0) - return ret; - - return fsr & STATUS_PEC; -} - -static int spi_flash_ready(struct spi_flash *flash) -{ - int sr, fsr; - - sr = spi_flash_sr_ready(flash); - if (sr < 0) - return sr; - - fsr = 1; - if (flash->flags & SNOR_F_USE_FSR) { - fsr = spi_flash_fsr_ready(flash); - if (fsr < 0) - return fsr; - } - - return sr && fsr; -} - -static int spi_flash_cmd_wait_ready(struct spi_flash *flash, - unsigned long timeout) -{ - int timebase, ret; - - timebase = get_timer(0); - - while (get_timer(timebase) < timeout) { - ret = spi_flash_ready(flash); - if (ret < 0) - return ret; - if (ret) - return 0; - } - - printf("SF: Timeout!\n"); - - return -ETIMEDOUT; -} - -int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, - size_t cmd_len, const void *buf, size_t buf_len) -{ - struct spi_slave *spi = flash->spi; - unsigned long timeout = SPI_FLASH_PROG_TIMEOUT; - int ret; - - if (buf == NULL) - timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT; - - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: unable to claim SPI bus\n"); - return ret; - } - - ret = spi_flash_cmd_write_enable(flash); - if (ret < 0) { - debug("SF: enabling write failed\n"); - return ret; - } - - ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len); - if (ret < 0) { - debug("SF: write cmd failed\n"); - return ret; - } - - ret = spi_flash_cmd_wait_ready(flash, timeout); - if (ret < 0) { - debug("SF: write %s timed out\n", - timeout == SPI_FLASH_PROG_TIMEOUT ? - "program" : "page erase"); - return ret; - } - - spi_release_bus(spi); - - return ret; -} - -int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) -{ - u32 erase_size, erase_addr; - u8 cmd[SPI_FLASH_CMD_LEN]; - int ret = -1; - - erase_size = flash->erasesize; - if (offset % erase_size || len % erase_size) { - debug("SF: Erase offset/length not multiple of erase size\n"); - return -1; - } - - if (flash->flash_is_locked) { - if (flash->flash_is_locked(flash, offset, len) > 0) { - printf("offset 0x%x is protected and cannot be erased\n", - offset); - return -EINVAL; - } - } - - cmd[0] = flash->erase_cmd; - while (len) { - erase_addr = offset; - -#ifdef CONFIG_SF_DUAL_FLASH - if (flash->dual_flash > SF_SINGLE_FLASH) - spi_flash_dual(flash, &erase_addr); -#endif -#ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, erase_addr); - if (ret < 0) - return ret; -#endif - spi_flash_addr(erase_addr, cmd); - - debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], - cmd[2], cmd[3], erase_addr); - - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0); - if (ret < 0) { - debug("SF: erase failed\n"); - break; - } - - offset += erase_size; - len -= erase_size; - } - - return ret; -} - -int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, - size_t len, const void *buf) -{ - struct spi_slave *spi = flash->spi; - unsigned long byte_addr, page_size; - u32 write_addr; - size_t chunk_len, actual; - u8 cmd[SPI_FLASH_CMD_LEN]; - int ret = -1; - - page_size = flash->page_size; - - if (flash->flash_is_locked) { - if (flash->flash_is_locked(flash, offset, len) > 0) { - printf("offset 0x%x is protected and cannot be written\n", - offset); - return -EINVAL; - } - } - - cmd[0] = flash->write_cmd; - for (actual = 0; actual < len; actual += chunk_len) { - write_addr = offset; - -#ifdef CONFIG_SF_DUAL_FLASH - if (flash->dual_flash > SF_SINGLE_FLASH) - spi_flash_dual(flash, &write_addr); -#endif -#ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, write_addr); - if (ret < 0) - return ret; -#endif - byte_addr = offset % page_size; - chunk_len = min(len - actual, (size_t)(page_size - byte_addr)); - - if (spi->max_write_size) - chunk_len = min(chunk_len, - (size_t)spi->max_write_size); - - spi_flash_addr(write_addr, cmd); - - debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", - buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); - - ret = spi_flash_write_common(flash, cmd, sizeof(cmd), - buf + actual, chunk_len); - if (ret < 0) { - debug("SF: write failed\n"); - break; - } - - offset += chunk_len; - } - - return ret; -} - -int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, - size_t cmd_len, void *data, size_t data_len) -{ - struct spi_slave *spi = flash->spi; - int ret; - - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: unable to claim SPI bus\n"); - return ret; - } - - ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); - if (ret < 0) { - debug("SF: read cmd failed\n"); - return ret; - } - - spi_release_bus(spi); - - return ret; -} - -void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len) -{ - memcpy(data, offset, len); -} - -int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, - size_t len, void *data) -{ - struct spi_slave *spi = flash->spi; - u8 *cmd, cmdsz; - u32 remain_len, read_len, read_addr; - int bank_sel = 0; - int ret = -1; - - /* Handle memory-mapped SPI */ - if (flash->memory_map) { - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: unable to claim SPI bus\n"); - return ret; - } - spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP); - spi_flash_copy_mmap(data, flash->memory_map + offset, len); - spi_xfer(spi, 0, NULL, NULL, SPI_XFER_MMAP_END); - spi_release_bus(spi); - return 0; - } - - cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte; - cmd = calloc(1, cmdsz); - if (!cmd) { - debug("SF: Failed to allocate cmd\n"); - return -ENOMEM; - } - - cmd[0] = flash->read_cmd; - while (len) { - read_addr = offset; - -#ifdef CONFIG_SF_DUAL_FLASH - if (flash->dual_flash > SF_SINGLE_FLASH) - spi_flash_dual(flash, &read_addr); -#endif -#ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_write_bar(flash, read_addr); - if (ret < 0) - return ret; - bank_sel = flash->bank_curr; -#endif - remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) * - (bank_sel + 1)) - offset; - if (len < remain_len) - read_len = len; - else - read_len = remain_len; - - spi_flash_addr(read_addr, cmd); - - ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len); - if (ret < 0) { - debug("SF: read failed\n"); - break; - } - - offset += read_len; - len -= read_len; - data += read_len; - } - - free(cmd); - return ret; -} - -#ifdef CONFIG_SPI_FLASH_SST -static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) -{ - struct spi_slave *spi = flash->spi; - int ret; - u8 cmd[4] = { - CMD_SST_BP, - offset >> 16, - offset >> 8, - offset, - }; - - debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", - spi_w8r8(spi, CMD_READ_STATUS), buf, cmd[0], offset); - - ret = spi_flash_cmd_write_enable(flash); - if (ret) - return ret; - - ret = spi_flash_cmd_write(spi, cmd, sizeof(cmd), buf, 1); - if (ret) - return ret; - - return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); -} - -int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, - const void *buf) -{ - struct spi_slave *spi = flash->spi; - size_t actual, cmd_len; - int ret; - u8 cmd[4]; - - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: Unable to claim SPI bus\n"); - return ret; - } - - /* If the data is not word aligned, write out leading single byte */ - actual = offset % 2; - if (actual) { - ret = sst_byte_write(flash, offset, buf); - if (ret) - goto done; - } - offset += actual; - - ret = spi_flash_cmd_write_enable(flash); - if (ret) - goto done; - - cmd_len = 4; - cmd[0] = CMD_SST_AAI_WP; - cmd[1] = offset >> 16; - cmd[2] = offset >> 8; - cmd[3] = offset; - - for (; actual < len - 1; actual += 2) { - debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", - spi_w8r8(spi, CMD_READ_STATUS), buf + actual, - cmd[0], offset); - - ret = spi_flash_cmd_write(spi, cmd, cmd_len, - buf + actual, 2); - if (ret) { - debug("SF: sst word program failed\n"); - break; - } - - ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); - if (ret) - break; - - cmd_len = 1; - offset += 2; - } - - if (!ret) - ret = spi_flash_cmd_write_disable(flash); - - /* If there is a single trailing byte, write it out */ - if (!ret && actual != len) - ret = sst_byte_write(flash, offset, buf + actual); - - done: - debug("SF: sst: program %s %zu bytes @ 0x%zx\n", - ret ? "failure" : "success", len, offset - actual); - - spi_release_bus(spi); - return ret; -} - -int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len, - const void *buf) -{ - struct spi_slave *spi = flash->spi; - size_t actual; - int ret; - - ret = spi_claim_bus(spi); - if (ret) { - debug("SF: Unable to claim SPI bus\n"); - return ret; - } - - for (actual = 0; actual < len; actual++) { - ret = sst_byte_write(flash, offset, buf + actual); - if (ret) { - debug("SF: sst byte program failed\n"); - break; - } - offset++; - } - - if (!ret) - ret = spi_flash_cmd_write_disable(flash); - - debug("SF: sst: program %s %zu bytes @ 0x%zx\n", - ret ? "failure" : "success", len, offset - actual); - - spi_release_bus(spi); - return ret; -} -#endif - -#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) -static void stm_get_locked_range(struct spi_flash *flash, u8 sr, loff_t *ofs, - u32 *len) -{ - u8 mask = SR_BP2 | SR_BP1 | SR_BP0; - int shift = ffs(mask) - 1; - int pow; - - if (!(sr & mask)) { - /* No protection */ - *ofs = 0; - *len = 0; - } else { - pow = ((sr & mask) ^ mask) >> shift; - *len = flash->size >> pow; - *ofs = flash->size - *len; - } -} - -/* - * Return 1 if the entire region is locked, 0 otherwise - */ -static int stm_is_locked_sr(struct spi_flash *flash, u32 ofs, u32 len, - u8 sr) -{ - loff_t lock_offs; - u32 lock_len; - - stm_get_locked_range(flash, sr, &lock_offs, &lock_len); - - return (ofs + len <= lock_offs + lock_len) && (ofs >= lock_offs); -} - -/* - * Check if a region of the flash is (completely) locked. See stm_lock() for - * more info. - * - * Returns 1 if entire region is locked, 0 if any portion is unlocked, and - * negative on errors. - */ -int stm_is_locked(struct spi_flash *flash, u32 ofs, size_t len) -{ - int status; - u8 sr; - - status = read_sr(flash, &sr); - if (status < 0) - return status; - - return stm_is_locked_sr(flash, ofs, len, sr); -} - -/* - * Lock a region of the flash. Compatible with ST Micro and similar flash. - * Supports only the block protection bits BP{0,1,2} in the status register - * (SR). Does not support these features found in newer SR bitfields: - * - TB: top/bottom protect - only handle TB=0 (top protect) - * - SEC: sector/block protect - only handle SEC=0 (block protect) - * - CMP: complement protect - only support CMP=0 (range is not complemented) - * - * Sample table portion for 8MB flash (Winbond w25q64fw): - * - * SEC | TB | BP2 | BP1 | BP0 | Prot Length | Protected Portion - * -------------------------------------------------------------------------- - * X | X | 0 | 0 | 0 | NONE | NONE - * 0 | 0 | 0 | 0 | 1 | 128 KB | Upper 1/64 - * 0 | 0 | 0 | 1 | 0 | 256 KB | Upper 1/32 - * 0 | 0 | 0 | 1 | 1 | 512 KB | Upper 1/16 - * 0 | 0 | 1 | 0 | 0 | 1 MB | Upper 1/8 - * 0 | 0 | 1 | 0 | 1 | 2 MB | Upper 1/4 - * 0 | 0 | 1 | 1 | 0 | 4 MB | Upper 1/2 - * X | X | 1 | 1 | 1 | 8 MB | ALL - * - * Returns negative on errors, 0 on success. - */ -int stm_lock(struct spi_flash *flash, u32 ofs, size_t len) -{ - u8 status_old, status_new; - u8 mask = SR_BP2 | SR_BP1 | SR_BP0; - u8 shift = ffs(mask) - 1, pow, val; - int ret; - - ret = read_sr(flash, &status_old); - if (ret < 0) - return ret; - - /* SPI NOR always locks to the end */ - if (ofs + len != flash->size) { - /* Does combined region extend to end? */ - if (!stm_is_locked_sr(flash, ofs + len, flash->size - ofs - len, - status_old)) - return -EINVAL; - len = flash->size - ofs; - } - - /* - * Need smallest pow such that: - * - * 1 / (2^pow) <= (len / size) - * - * so (assuming power-of-2 size) we do: - * - * pow = ceil(log2(size / len)) = log2(size) - floor(log2(len)) - */ - pow = ilog2(flash->size) - ilog2(len); - val = mask - (pow << shift); - if (val & ~mask) - return -EINVAL; - - /* Don't "lock" with no region! */ - if (!(val & mask)) - return -EINVAL; - - status_new = (status_old & ~mask) | val; - - /* Only modify protection if it will not unlock other areas */ - if ((status_new & mask) <= (status_old & mask)) - return -EINVAL; - - write_sr(flash, status_new); - - return 0; -} - -/* - * Unlock a region of the flash. See stm_lock() for more info - * - * Returns negative on errors, 0 on success. - */ -int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len) -{ - uint8_t status_old, status_new; - u8 mask = SR_BP2 | SR_BP1 | SR_BP0; - u8 shift = ffs(mask) - 1, pow, val; - int ret; - - ret = read_sr(flash, &status_old); - if (ret < 0) - return ret; - - /* Cannot unlock; would unlock larger region than requested */ - if (stm_is_locked_sr(flash, ofs - flash->erasesize, flash->erasesize, - status_old)) - return -EINVAL; - /* - * Need largest pow such that: - * - * 1 / (2^pow) >= (len / size) - * - * so (assuming power-of-2 size) we do: - * - * pow = floor(log2(size / len)) = log2(size) - ceil(log2(len)) - */ - pow = ilog2(flash->size) - order_base_2(flash->size - (ofs + len)); - if (ofs + len == flash->size) { - val = 0; /* fully unlocked */ - } else { - val = mask - (pow << shift); - /* Some power-of-two sizes are not supported */ - if (val & ~mask) - return -EINVAL; - } - - status_new = (status_old & ~mask) | val; - - /* Only modify protection if it will not lock other areas */ - if ((status_new & mask) >= (status_old & mask)) - return -EINVAL; - - write_sr(flash, status_new); - - return 0; -} -#endif - - -#ifdef CONFIG_SPI_FLASH_MACRONIX -static int macronix_quad_enable(struct spi_flash *flash) -{ - u8 qeb_status; - int ret; - - ret = read_sr(flash, &qeb_status); - if (ret < 0) - return ret; - - if (qeb_status & STATUS_QEB_MXIC) - return 0; - - ret = write_sr(flash, qeb_status | STATUS_QEB_MXIC); - if (ret < 0) - return ret; - - /* read SR and check it */ - ret = read_sr(flash, &qeb_status); - if (!(ret >= 0 && (qeb_status & STATUS_QEB_MXIC))) { - printf("SF: Macronix SR Quad bit not clear\n"); - return -EINVAL; - } - - return ret; -} -#endif - -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) -static int spansion_quad_enable(struct spi_flash *flash) -{ - u8 qeb_status; - int ret; - - ret = read_cr(flash, &qeb_status); - if (ret < 0) - return ret; - - if (qeb_status & STATUS_QEB_WINSPAN) - return 0; - - ret = write_cr(flash, qeb_status | STATUS_QEB_WINSPAN); - if (ret < 0) - return ret; - - /* read CR and check it */ - ret = read_cr(flash, &qeb_status); - if (!(ret >= 0 && (qeb_status & STATUS_QEB_WINSPAN))) { - printf("SF: Spansion CR Quad bit not clear\n"); - return -EINVAL; - } - - return ret; -} -#endif - -#ifdef CONFIG_SPI_FLASH_STMICRO -static int micron_quad_enable(struct spi_flash *flash) -{ - u8 qeb_status; - int ret; - - ret = read_evcr(flash, &qeb_status); - if (ret < 0) - return ret; - - if (!(qeb_status & STATUS_QEB_MICRON)) - return 0; - - ret = write_evcr(flash, qeb_status & ~STATUS_QEB_MICRON); - if (ret < 0) - return ret; - - /* read EVCR and check it */ - ret = read_evcr(flash, &qeb_status); - if (!(ret >= 0 && !(qeb_status & STATUS_QEB_MICRON))) { - printf("SF: Micron EVCR Quad bit not clear\n"); - return -EINVAL; - } - - return ret; -} -#endif - -static int set_quad_mode(struct spi_flash *flash, u8 idcode0) -{ - switch (idcode0) { -#ifdef CONFIG_SPI_FLASH_MACRONIX - case SPI_FLASH_CFI_MFR_MACRONIX: - return macronix_quad_enable(flash); -#endif -#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND) - case SPI_FLASH_CFI_MFR_SPANSION: - case SPI_FLASH_CFI_MFR_WINBOND: - return spansion_quad_enable(flash); -#endif -#ifdef CONFIG_SPI_FLASH_STMICRO - case SPI_FLASH_CFI_MFR_STMICRO: - return micron_quad_enable(flash); -#endif - default: - printf("SF: Need set QEB func for %02x flash\n", idcode0); - return -1; - } -} - -#if CONFIG_IS_ENABLED(OF_CONTROL) -int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash) -{ -#ifdef CONFIG_DM_SPI_FLASH - fdt_addr_t addr; - fdt_size_t size; - int node = flash->dev->of_offset; - - addr = fdtdec_get_addr_size(blob, node, "memory-map", &size); - if (addr == FDT_ADDR_T_NONE) { - debug("%s: Cannot decode address\n", __func__); - return 0; - } - - if (flash->size != size) { - debug("%s: Memory map must cover entire device\n", __func__); - return -1; - } - flash->memory_map = map_sysmem(addr, size); -#endif - - return 0; -} -#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ - -int spi_flash_scan(struct spi_flash *flash) -{ - struct spi_slave *spi = flash->spi; - const struct spi_flash_params *params; - u16 jedec, ext_jedec; - u8 cmd, idcode[5]; - int ret; - static u8 spi_read_cmds_array[] = { - CMD_READ_ARRAY_SLOW, - CMD_READ_ARRAY_FAST, - CMD_READ_DUAL_OUTPUT_FAST, - CMD_READ_QUAD_OUTPUT_FAST, - CMD_READ_DUAL_IO_FAST, - CMD_READ_QUAD_IO_FAST }; - - /* Read the ID codes */ - ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode)); - if (ret) { - printf("SF: Failed to get idcodes\n"); - return -EINVAL; - } - -#ifdef DEBUG - printf("SF: Got idcodes\n"); - print_buffer(0, idcode, 1, sizeof(idcode), 0); -#endif - - jedec = idcode[1] << 8 | idcode[2]; - ext_jedec = idcode[3] << 8 | idcode[4]; - - /* Validate params from spi_flash_params table */ - params = spi_flash_params_table; - for (; params->name != NULL; params++) { - if ((params->jedec >> 16) == idcode[0]) { - if ((params->jedec & 0xFFFF) == jedec) { - if (params->ext_jedec == 0) - break; - else if (params->ext_jedec == ext_jedec) - break; - } - } - } - - if (!params->name) { - printf("SF: Unsupported flash IDs: "); - printf("manuf %02x, jedec %04x, ext_jedec %04x\n", - idcode[0], jedec, ext_jedec); - return -EPROTONOSUPPORT; - } - - /* Flash powers up read-only, so clear BP# bits */ - if (idcode[0] == SPI_FLASH_CFI_MFR_ATMEL || - idcode[0] == SPI_FLASH_CFI_MFR_MACRONIX || - idcode[0] == SPI_FLASH_CFI_MFR_SST) - write_sr(flash, 0); - - /* Assign spi data */ - flash->name = params->name; - flash->memory_map = spi->memory_map; - flash->dual_flash = spi->option; - - /* Assign spi flash flags */ - if (params->flags & SST_WR) - flash->flags |= SNOR_F_SST_WR; - - /* Assign spi_flash ops */ -#ifndef CONFIG_DM_SPI_FLASH - flash->write = spi_flash_cmd_write_ops; -#if defined(CONFIG_SPI_FLASH_SST) - if (flash->flags & SNOR_F_SST_WR) { - if (spi->mode & SPI_TX_BYTE) - flash->write = sst_write_bp; - else - flash->write = sst_write_wp; - } -#endif - flash->erase = spi_flash_cmd_erase_ops; - flash->read = spi_flash_cmd_read_ops; -#endif - - /* lock hooks are flash specific - assign them based on idcode0 */ - switch (idcode[0]) { -#if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST) - case SPI_FLASH_CFI_MFR_STMICRO: - case SPI_FLASH_CFI_MFR_SST: - flash->flash_lock = stm_lock; - flash->flash_unlock = stm_unlock; - flash->flash_is_locked = stm_is_locked; -#endif - break; - default: - debug("SF: Lock ops not supported for %02x flash\n", idcode[0]); - } - - /* Compute the flash size */ - flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0; - /* - * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the - * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with - * the 0x4d00 Extended JEDEC code have 512b pages. All of the others - * have 256b pages. - */ - if (ext_jedec == 0x4d00) { - if ((jedec == 0x0215) || (jedec == 0x216)) - flash->page_size = 256; - else - flash->page_size = 512; - } else { - flash->page_size = 256; - } - flash->page_size <<= flash->shift; - flash->sector_size = params->sector_size << flash->shift; - flash->size = flash->sector_size * params->nr_sectors << flash->shift; -#ifdef CONFIG_SF_DUAL_FLASH - if (flash->dual_flash & SF_DUAL_STACKED_FLASH) - flash->size <<= 1; -#endif - - /* Compute erase sector and command */ - if (params->flags & SECT_4K) { - flash->erase_cmd = CMD_ERASE_4K; - flash->erasesize = 4096 << flash->shift; - } else if (params->flags & SECT_32K) { - flash->erase_cmd = CMD_ERASE_32K; - flash->erasesize = 32768 << flash->shift; - } else { - flash->erase_cmd = CMD_ERASE_64K; - flash->erasesize = flash->sector_size; - } - - /* Look for the fastest read cmd */ - cmd = fls(params->e_rd_cmd & spi->mode_rx); - if (cmd) { - cmd = spi_read_cmds_array[cmd - 1]; - flash->read_cmd = cmd; - } else { - /* Go for default supported read cmd */ - flash->read_cmd = CMD_READ_ARRAY_FAST; - } - - /* Not require to look for fastest only two write cmds yet */ - if (params->flags & WR_QPP && spi->mode & SPI_TX_QUAD) - flash->write_cmd = CMD_QUAD_PAGE_PROGRAM; - else - /* Go for default supported write cmd */ - flash->write_cmd = CMD_PAGE_PROGRAM; - - /* Set the quad enable bit - only for quad commands */ - if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) || - (flash->read_cmd == CMD_READ_QUAD_IO_FAST) || - (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) { - ret = set_quad_mode(flash, idcode[0]); - if (ret) { - debug("SF: Fail to set QEB for %02x\n", idcode[0]); - return -EINVAL; - } - } - - /* Read dummy_byte: dummy byte is determined based on the - * dummy cycles of a particular command. - * Fast commands - dummy_byte = dummy_cycles/8 - * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8 - * For I/O commands except cmd[0] everything goes on no.of lines - * based on particular command but incase of fast commands except - * data all go on single line irrespective of command. - */ - switch (flash->read_cmd) { - case CMD_READ_QUAD_IO_FAST: - flash->dummy_byte = 2; - break; - case CMD_READ_ARRAY_SLOW: - flash->dummy_byte = 0; - break; - default: - flash->dummy_byte = 1; - } - -#ifdef CONFIG_SPI_FLASH_STMICRO - if (params->flags & E_FSR) - flash->flags |= SNOR_F_USE_FSR; -#endif - - /* Configure the BAR - discover bank cmds and read current bank */ -#ifdef CONFIG_SPI_FLASH_BAR - ret = spi_flash_read_bar(flash, idcode[0]); - if (ret < 0) - return ret; -#endif - -#if CONFIG_IS_ENABLED(OF_CONTROL) - ret = spi_flash_decode_fdt(gd->fdt_blob, flash); - if (ret) { - debug("SF: FDT decode error\n"); - return -EINVAL; - } -#endif - -#ifndef CONFIG_SPL_BUILD - printf("SF: Detected %s with page size ", flash->name); - print_size(flash->page_size, ", erase size "); - print_size(flash->erasesize, ", total "); - print_size(flash->size, ""); - if (flash->memory_map) - printf(", mapped at %p", flash->memory_map); - puts("\n"); -#endif - -#ifndef CONFIG_SPI_FLASH_BAR - if (((flash->dual_flash == SF_SINGLE_FLASH) && - (flash->size > SPI_FLASH_16MB_BOUN)) || - ((flash->dual_flash > SF_SINGLE_FLASH) && - (flash->size > SPI_FLASH_16MB_BOUN << 1))) { - puts("SF: Warning - Only lower 16MiB accessible,"); - puts(" Full access #define CONFIG_SPI_FLASH_BAR\n"); - } -#endif - - return ret; -} diff --git a/drivers/mtd/spi/spi_spl_load.c b/drivers/mtd/spi/spi_spl_load.c deleted file mode 100644 index ca56fe9..0000000 --- a/drivers/mtd/spi/spi_spl_load.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 2011 OMICRON electronics GmbH - * - * based on drivers/mtd/nand/nand_spl_load.c - * - * Copyright (C) 2011 - * Heiko Schocher, DENX Software Engineering, hs@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <spi.h> -#include <spi_flash.h> -#include <errno.h> -#include <spl.h> - -#ifdef CONFIG_SPL_OS_BOOT -/* - * Load the kernel, check for a valid header we can parse, and if found load - * the kernel and then device tree. - */ -static int spi_load_image_os(struct spi_flash *flash, - struct image_header *header) -{ - /* Read for a header, parse or error out. */ - spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, 0x40, - (void *)header); - - if (image_get_magic(header) != IH_MAGIC) - return -1; - - spl_parse_image_header(header); - - spi_flash_read(flash, CONFIG_SYS_SPI_KERNEL_OFFS, - spl_image.size, (void *)spl_image.load_addr); - - /* Read device tree. */ - spi_flash_read(flash, CONFIG_SYS_SPI_ARGS_OFFS, - CONFIG_SYS_SPI_ARGS_SIZE, - (void *)CONFIG_SYS_SPL_ARGS_ADDR); - - return 0; -} -#endif - -/* - * The main entry for SPI booting. It's necessary that SDRAM is already - * configured and available since this code loads the main U-Boot image - * from SPI into SDRAM and starts it from there. - */ -int spl_spi_load_image(void) -{ - int err = 0; - struct spi_flash *flash; - struct image_header *header; - - /* - * Load U-Boot image from SPI flash into RAM - */ - - flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, - CONFIG_SF_DEFAULT_CS, - CONFIG_SF_DEFAULT_SPEED, - CONFIG_SF_DEFAULT_MODE); - if (!flash) { - puts("SPI probe failed.\n"); - return -ENODEV; - } - - /* use CONFIG_SYS_TEXT_BASE as temporary storage area */ - header = (struct image_header *)(CONFIG_SYS_TEXT_BASE); - -#ifdef CONFIG_SPL_OS_BOOT - if (spl_start_uboot() || spi_load_image_os(flash, header)) -#endif - { - /* Load u-boot, mkimage header is 64 bytes. */ - err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, 0x40, - (void *)header); - if (err) - return err; - - spl_parse_image_header(header); - err = spi_flash_read(flash, CONFIG_SYS_SPI_U_BOOT_OFFS, - spl_image.size, (void *)spl_image.load_addr); - } - - return err; -} diff --git a/include/spi_flash.h b/include/spi_flash.h index 29c07f5..aa82335 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -1,8 +1,9 @@ /* * Common SPI flash Interface * - * Copyright (C) 2008 Atmel Corporation + * Copyright (C) 2016 Jagan Teki jteki@openedev.com * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. + * Copyright (C) 2008 Atmel Corporation * * SPDX-License-Identifier: GPL-2.0 */ @@ -27,90 +28,6 @@ # define CONFIG_SF_DEFAULT_BUS 0 #endif
-struct spi_slave; - -/** - * struct spi_flash - SPI flash structure - * - * @spi: SPI slave - * @dev: SPI flash device - * @name: Name of SPI flash - * @dual_flash: Indicates dual flash memories - dual stacked, parallel - * @shift: Flash shift useful in dual parallel - * @flags: Indication of spi flash flags - * @size: Total flash size - * @page_size: Write (page) size - * @sector_size: Sector size - * @erasesize: Erase size - * @bank_read_cmd: Bank read cmd - * @bank_write_cmd: Bank write cmd - * @bank_curr: Current flash bank - * @erase_cmd: Erase cmd 4K, 32K, 64K - * @read_cmd: Read cmd - Array Fast, Extn read and quad read. - * @write_cmd: Write cmd - page and quad program. - * @dummy_byte: Dummy cycles for read operation. - * @memory_map: Address of read-only SPI flash access - * @flash_lock: lock a region of the SPI Flash - * @flash_unlock: unlock a region of the SPI Flash - * @flash_is_locked: check if a region of the SPI Flash is completely locked - * @read: Flash read ops: Read len bytes at offset into buf - * Supported cmds: Fast Array Read - * @write: Flash write ops: Write len bytes from buf into offset - * Supported cmds: Page Program - * @erase: Flash erase ops: Erase len bytes from offset - * Supported cmds: Sector erase 4K, 32K, 64K - * return 0 - Success, 1 - Failure - */ -struct spi_flash { - struct spi_slave *spi; -#ifdef CONFIG_DM_SPI_FLASH - struct udevice *dev; -#endif - const char *name; - u8 dual_flash; - u8 shift; - u16 flags; - - uint64_t size; - u32 page_size; - u32 sector_size; - u32 erasesize; -#ifdef CONFIG_SPI_FLASH_BAR - u8 bank_read_cmd; - u8 bank_write_cmd; - u8 bank_curr; -#endif - u8 erase_cmd; - u8 read_cmd; - u8 write_cmd; - u8 dummy_byte; - - void *memory_map; - - int (*flash_lock)(struct spi_flash *flash, u32 ofs, size_t len); - int (*flash_unlock)(struct spi_flash *flash, u32 ofs, size_t len); - int (*flash_is_locked)(struct spi_flash *flash, u32 ofs, size_t len); -#ifndef CONFIG_DM_SPI_FLASH - /* - * These are not strictly needed for driver model, but keep them here - * while the transition is in progress. - * - * Normally each driver would provide its own operations, but for - * SPI flash most chips use the same algorithms. One approach is - * to create a 'common' SPI flash device which knows how to talk - * to most devices, and then allow other drivers to be used instead - * if required, perhaps with a way of scanning through the list to - * find the driver that matches the device. - */ - int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf); - int (*write)(struct spi_flash *flash, u32 offset, size_t len, - const void *buf); - int (*erase)(struct spi_flash *flash, u32 offset, size_t len); -#endif -}; - -#ifdef CONFIG_MTD_SPI_NOR - typedef struct mtd_info spi_flash_t;
static inline int spi_flash_read(spi_flash_t *info, u32 offset, @@ -171,144 +88,6 @@ void spi_flash_free(spi_flash_t *flash);
#endif /* CONFIG_MTD_DM_SPI_NOR */
-#else - -typedef struct spi_flash spi_flash_t; - -static inline int spi_flash_protect(struct spi_flash *flash, u32 ofs, u32 len, - bool prot) -{ - if (!flash->flash_lock || !flash->flash_unlock) - return -EOPNOTSUPP; - - if (prot) - return flash->flash_lock(flash, ofs, len); - else - return flash->flash_unlock(flash, ofs, len); -} - -#endif /* CONFIG_MTD_SPI_NOR */ - -struct dm_spi_flash_ops { - int (*read)(struct udevice *dev, u32 offset, size_t len, void *buf); - int (*write)(struct udevice *dev, u32 offset, size_t len, - const void *buf); - int (*erase)(struct udevice *dev, u32 offset, size_t len); -}; - -/* Access the serial operations for a device */ -#define sf_get_ops(dev) ((struct dm_spi_flash_ops *)(dev)->driver->ops) - -#ifdef CONFIG_DM_SPI_FLASH -/** - * spi_flash_read_dm() - Read data from SPI flash - * - * @dev: SPI flash device - * @offset: Offset into device in bytes to read from - * @len: Number of bytes to read - * @buf: Buffer to put the data that is read - * @return 0 if OK, -ve on error - */ -int spi_flash_read_dm(struct udevice *dev, u32 offset, size_t len, void *buf); - -/** - * spi_flash_write_dm() - Write data to SPI flash - * - * @dev: SPI flash device - * @offset: Offset into device in bytes to write to - * @len: Number of bytes to write - * @buf: Buffer containing bytes to write - * @return 0 if OK, -ve on error - */ -int spi_flash_write_dm(struct udevice *dev, u32 offset, size_t len, - const void *buf); - -/** - * spi_flash_erase_dm() - Erase blocks of the SPI flash - * - * Note that @len must be a muiltiple of the flash sector size. - * - * @dev: SPI flash device - * @offset: Offset into device in bytes to start erasing - * @len: Number of bytes to erase - * @return 0 if OK, -ve on error - */ -int spi_flash_erase_dm(struct udevice *dev, u32 offset, size_t len); - -int spi_flash_probe_bus_cs(unsigned int busnum, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode, - struct udevice **devp); - -/* Compatibility function - this is the old U-Boot API */ -struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode); - -/* Compatibility function - this is the old U-Boot API */ -void spi_flash_free(struct spi_flash *flash); - -static inline int spi_flash_read(struct spi_flash *flash, u32 offset, - size_t len, void *buf) -{ - return spi_flash_read_dm(flash->dev, offset, len, buf); -} - -static inline int spi_flash_write(struct spi_flash *flash, u32 offset, - size_t len, const void *buf) -{ - return spi_flash_write_dm(flash->dev, offset, len, buf); -} - -static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, - size_t len) -{ - return spi_flash_erase_dm(flash->dev, offset, len); -} - -struct sandbox_state; - -int sandbox_sf_bind_emul(struct sandbox_state *state, int busnum, int cs, - struct udevice *bus, int of_offset, const char *spec); - -void sandbox_sf_unbind_emul(struct sandbox_state *state, int busnum, int cs); - -#elif !defined(CONFIG_MTD_SPI_NOR) - -struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, - unsigned int max_hz, unsigned int spi_mode); - -/** - * Set up a new SPI flash from an fdt node - * - * @param blob Device tree blob - * @param slave_node Pointer to this SPI slave node in the device tree - * @param spi_node Cached pointer to the SPI interface this node belongs - * to - * @return 0 if ok, -1 on error - */ -struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node, - int spi_node); - -void spi_flash_free(struct spi_flash *flash); - -static inline int spi_flash_read(struct spi_flash *flash, u32 offset, - size_t len, void *buf) -{ - return flash->read(flash, offset, len, buf); -} - -static inline int spi_flash_write(struct spi_flash *flash, u32 offset, - size_t len, const void *buf) -{ - return flash->write(flash, offset, len, buf); -} - -static inline int spi_flash_erase(struct spi_flash *flash, u32 offset, - size_t len) -{ - return flash->erase(flash, offset, len); -} -#endif - void spi_boot(void) __noreturn; void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst);

Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Signed-off-by: Jagan Teki jteki@openedev.com --- MAINTAINERS | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS index 4b23d18..e4a50ca 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -386,7 +386,15 @@ M: Jagan Teki jteki@openedev.com S: Maintained T: git git://git.denx.de/u-boot-spi.git F: drivers/spi/ -F: include/spi* +F: include/spi.h + +SPI NOR +M: Jagan Teki jteki@openedev.com +S: Maintained +T: git git://git.denx.de/u-boot-spi.git +F: drivers/mtd/spi-nor/ +F: include/spi_flash +F: include/linux/mtd/spi-nor.h
TQ GROUP M: Martin Krause martin.krause@tq-systems.de

Replace CONFIG_SPI_FLASH_USE_4K_SECTORS with CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
Cc: Simon Glass sjg@chromium.org Cc: Bin Meng bmeng.cn@gmail.com Cc: Mugunthan V N mugunthanvnm@ti.com Cc: Michal Simek michal.simek@xilinx.com Cc: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Jagan Teki jteki@openedev.com --- configs/socfpga_arria5_defconfig | 2 +- configs/socfpga_cyclone5_defconfig | 2 +- configs/socfpga_sockit_defconfig | 2 +- configs/socfpga_sr1500_defconfig | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index cfe05bc..a558894 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -26,4 +26,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index 82a1ad8..cebc7e9 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -26,4 +26,4 @@ CONFIG_DESIGNWARE_SPI=y CONFIG_DM_MMC=y CONFIG_USB=y CONFIG_DM_USB=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index 2ffd7bb..20e8f34 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -18,7 +18,7 @@ CONFIG_MTD_SPI_NOR=y CONFIG_MTD_M25P80=y CONFIG_SPI_NOR_SPANSION=y CONFIG_SPI_NOR_STMICRO=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index 2f104e7..8f7f8c4 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -19,4 +19,4 @@ CONFIG_DM_ETH=y CONFIG_ETH_DESIGNWARE=y CONFIG_SYS_NS16550=y CONFIG_DM_MMC=y -# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +# CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is not set
participants (2)
-
Bin Meng
-
Jagan Teki