[U-Boot] [RESEND 1/3] fsl_sec: fix register layout on Layerscape architectures
From: Laurentiu Tudor laurentiu.tudor@nxp.com
On Layerscape architectures the SEC memory map is 1MB and the register blocks contained in it are 64KB aligned, not 4KB as the ccsr_sec structure currently assumes. Fix the layout of the structure for these architectures.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com --- include/fsl_sec.h | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/include/fsl_sec.h b/include/fsl_sec.h index 16e3fcb5a1..be08a2b88b 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -121,10 +121,18 @@ typedef struct ccsr_sec { u32 chanum_ls; /* CHA Number Register, LS */ u32 secvid_ms; /* SEC Version ID Register, MS */ u32 secvid_ls; /* SEC Version ID Register, LS */ +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) + u8 res9[0x6f020]; +#else u8 res9[0x6020]; +#endif u32 qilcr_ms; /* Queue Interface LIODN CFG Register, MS */ u32 qilcr_ls; /* Queue Interface LIODN CFG Register, LS */ +#if defined(CONFIG_FSL_LSCH2) || defined(CONFIG_FSL_LSCH3) + u8 res10[0x8ffd8]; +#else u8 res10[0x8fd8]; +#endif } ccsr_sec_t;
#define SEC_CTPR_MS_AXI_LIODN 0x08000000
From: Laurentiu Tudor laurentiu.tudor@nxp.com
The SEC QI ICID setup in the QIIC_LS register is actually an offset that is being added to the ICID coming from the qman portal. Setting it with a non-zero value breaks SMMU setup as the resulting ICID is not known. On top of that, the SEC QI ICID must match the qman portal ICIDs in order to share the isolation context.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com --- arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c | 2 +- arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 3 +-- 3 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c index 0e8649427e..3bd993bebf 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1043_ids.c @@ -43,7 +43,7 @@ struct icid_id_table icid_tbl[] = { SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID), SET_QE_ICID(FSL_QE_STREAM_ID), #ifdef CONFIG_FSL_CAAM - SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2), + SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END), SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3), SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4), SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c index 2da9adab5b..abd847b5be 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046_ids.c @@ -41,7 +41,7 @@ struct icid_id_table icid_tbl[] = { SET_ETR_ICID(FSL_ETR_STREAM_ID), SET_DEBUG_ICID(FSL_DEBUG_STREAM_ID), #ifdef CONFIG_FSL_CAAM - SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_START + 2), + SET_SEC_QI_ICID(FSL_DPAA1_STREAM_ID_END), SET_SEC_JR_ICID_ENTRY(0, FSL_DPAA1_STREAM_ID_START + 3), SET_SEC_JR_ICID_ENTRY(1, FSL_DPAA1_STREAM_ID_START + 4), SET_SEC_JR_ICID_ENTRY(2, FSL_DPAA1_STREAM_ID_START + 5), diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h index f375fe7115..e7a8801262 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -93,8 +93,7 @@ void fdt_fixup_icid(void *blob);
#define SET_SEC_QI_ICID(streamid) \ SET_ICID_ENTRY("fsl,sec-v4.0", streamid, \ - (((streamid) << 16) | (streamid)), \ - offsetof(ccsr_sec_t, qilcr_ls) + \ + 0, offsetof(ccsr_sec_t, qilcr_ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \ CONFIG_SYS_FSL_SEC_ADDR)
From: Laurentiu Tudor laurentiu.tudor@nxp.com
sec_firmware reserves JR3 for it's own usage and deletes the JR3 node from the device tree. This causes this warning to be issued when doing the device tree fixup:
WARNING could not find node fsl,sec-v4.0-job-ring: FDT_ERR_NOTFOUND.
Fix it by excluding the device tree fixup for the JR reserved by sec_firmware.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com --- arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h index e7a8801262..f971af8d26 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h @@ -9,6 +9,7 @@ #include <asm/types.h> #include <fsl_qbman.h> #include <fsl_sec.h> +#include <asm/armv8/sec_firmware.h>
struct icid_id_table { const char *compat; @@ -98,7 +99,13 @@ void fdt_fixup_icid(void *blob); CONFIG_SYS_FSL_SEC_ADDR)
#define SET_SEC_JR_ICID_ENTRY(jr_num, streamid) \ - SET_ICID_ENTRY("fsl,sec-v4.0-job-ring", streamid, \ + SET_ICID_ENTRY( \ + (CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT && \ + (FSL_SEC_JR##jr_num##_OFFSET == \ + SEC_JR3_OFFSET + CONFIG_SYS_FSL_SEC_OFFSET) \ + ? NULL \ + : "fsl,sec-v4.0-job-ring"), \ + streamid, \ (((streamid) << 16) | (streamid)), \ offsetof(ccsr_sec_t, jrliodnr[jr_num].ls) + \ CONFIG_SYS_FSL_SEC_ADDR, \
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