[U-Boot] saveenv problems
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Hi,
i have a strange problem with the saveenv command, or maybe with my config :)
After booting a fresh compiled u-boot with the default environment i can save the env without any problems. U-boot unprotect, erase and write the flash. but after add a new env-variable, e.g. bootargs, saveenv will unprotect the flash, erase the flash but then u-boot will not write the flash because the "Flash not Erased" error.
Is there a different in addressing the env during boot-time, or read and write ?
#define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_SIZE 0x2000 // a 8k sector at the beginning of the flash #define CONFIG_ENV_SECT_SIZE 0x2000 #define CONFIG_SYS_ENV_OFFSET 0x0000 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_ENV_OFFSET)
TEXT_BASE = 0xFFC00000 CONFIG_SYS_FLASH_BASE = 0xFFC0000
Thanks Georg
Dear Georg,
In message 490AE49C.80304@team-ctech.de you wrote:
i have a strange problem with the saveenv command, or maybe with my config :)
After booting a fresh compiled u-boot with the default environment i can save the env without any problems. U-boot unprotect, erase and write the flash. but after add a new env-variable, e.g. bootargs, saveenv will unprotect the flash, erase the flash but then u-boot will not write the flash because the "Flash not Erased" error.
Is there a different in addressing the env during boot-time, or read and write ?
Timing...
You may see a problem similar to mine (patch just went into the CFI repo).
What exactly is your flash configuration? Bus width? Which flash chips? How can the bus be read? I mean, for example if you use 2 x 16 bit devices in parallel to provide a 32 bit bus, can your CPU actually perform an atomic 32 bit read from that bus? [Same for 16 or 64 instead of 32].
Best regards,
Wolfgang Denk
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Dear Wolfgang
You may see a problem similar to mine (patch just went into the CFI repo).
What exactly is your flash configuration? Bus width? Which flash chips? How can the bus be read? I mean, for example if you use 2 x 16 bit devices in parallel to provide a 32 bit bus, can your CPU actually perform an atomic 32 bit read from that bus? [Same for 16 or 64 instead of 32].
Best regards,
Wolfgang Denk
I forgot the cc to the list, so sorry for the double mail to you:
I use a ATMEL AT49BV322D parallel Flash with 16Bit Databus, 32Megabit (2Mx16 / 4Mx8)
With Debug enable
Georg
participants (2)
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Georg Schardt -
Wolfgang Denk