[U-Boot] [PATCH 3/3] board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Based upon git://git.denx.de/u-boot.git branch master
include/configs/C29XPCIE.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..6a1e145 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -189,13 +189,14 @@ | CSPR_MSEL_NAND \ | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_OOBSIZE 0x00000280 /* 640b */ #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ - | CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \ - | CSOR_NAND_PGS_2K /* Page Size = 2k */ \ - | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ - | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ + | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ + | CSOR_NAND_PGS_8K /* Page Size = 8K */ \ + | CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\ + | CSOR_NAND_PB(128)) /*128 Pages Per Block*/ #define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x01) | \ FTIM0_NAND_TWP(0x0c) | \ FTIM0_NAND_TWCHT(0x08) | \ @@ -222,6 +223,7 @@ #define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR #define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK #define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CSOR1_EXT CONFIG_SYS_NAND_OOBSIZE #define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 #define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 #define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2
-----Original Message----- From: u-boot-release-bounces@linux.freescale.net [mailto:u-boot-release- bounces@linux.freescale.net] On Behalf Of Kushwaha Prabhakar-B32579 Sent: Tuesday, September 24, 2013 4:17 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; Kushwaha Prabhakar-B32579 Subject: [u-boot-release] [PATCH 3/3] board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com
Based upon git://git.denx.de/u-boot.git branch master
include/configs/C29XPCIE.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..6a1e145 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -189,13 +189,14 @@ | CSPR_MSEL_NAND \ | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_OOBSIZE 0x00000280 /* 640b */ #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
| CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \| CSOR_NAND_PGS_2K /* Page Size = 2k */ \| CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \| CSOR_NAND_PB(64)) /* 64 Pages Per Block */
| CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \| CSOR_NAND_PGS_8K /* Page Size = 8K */ \| CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\| CSOR_NAND_PB(128)) /*128 Pages Per Block*/#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x01) | \ FTIM0_NAND_TWP(0x0c) | \ FTIM0_NAND_TWCHT(0x08) | \
Is it possible to do it with ONFI detection automatically instead of defining manually for different devices? such as what Linux driver does. -Shengzhou
On 09/25/2013 08:09 AM, Liu Shengzhou-B36685 wrote:
-----Original Message----- From: u-boot-release-bounces@linux.freescale.net [mailto:u-boot-release- bounces@linux.freescale.net] On Behalf Of Kushwaha Prabhakar-B32579 Sent: Tuesday, September 24, 2013 4:17 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; Kushwaha Prabhakar-B32579 Subject: [u-boot-release] [PATCH 3/3] board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com
Based upon git://git.denx.de/u-boot.git branch master
include/configs/C29XPCIE.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..6a1e145 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -189,13 +189,14 @@ | CSPR_MSEL_NAND \ | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_OOBSIZE 0x00000280 /* 640b */ #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
| CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \| CSOR_NAND_PGS_2K /* Page Size = 2k */ \| CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \| CSOR_NAND_PB(64)) /* 64 Pages Per Block */
| CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \| CSOR_NAND_PGS_8K /* Page Size = 8K */ \| CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\| CSOR_NAND_PB(128)) /*128 Pages Per Block*/Is it possible to do it with ONFI detection automatically instead of defining manually for different devices? such as what Linux driver does.
current mtd/nand/nand_base.c does in same way. We have to define CONFIG_SYS_NAND_ONFI_DETECTION. Once it is defined, it will check for normal flash detection followed by ONFI. Similar way as Linux doing.
do you have some other requirement.
Regards, Prabhakar
On Wed, 2013-09-25 at 09:52 +0530, Prabhakar Kushwaha wrote:
On 09/25/2013 08:09 AM, Liu Shengzhou-B36685 wrote:
-----Original Message----- From: u-boot-release-bounces@linux.freescale.net [mailto:u-boot-release- bounces@linux.freescale.net] On Behalf Of Kushwaha Prabhakar-B32579 Sent: Tuesday, September 24, 2013 4:17 PM To: u-boot@lists.denx.de Cc: Wood Scott-B07421; Kushwaha Prabhakar-B32579 Subject: [u-boot-release] [PATCH 3/3] board/c29xpcie: Add support of 8K page size NAND flash
Defines constants required to support 8K page size NAND flash.
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com
Based upon git://git.denx.de/u-boot.git branch master
include/configs/C29XPCIE.h | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..6a1e145 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -189,13 +189,14 @@ | CSPR_MSEL_NAND \ | CSPR_V) #define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_OOBSIZE 0x00000280 /* 640b */ #define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
| CSOR_NAND_RAL_2 /* RAL = 2 Bytes */ \| CSOR_NAND_PGS_2K /* Page Size = 2k */ \| CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \| CSOR_NAND_PB(64)) /* 64 Pages Per Block */
| CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \| CSOR_NAND_PGS_8K /* Page Size = 8K */ \| CSOR_NAND_SPRZ_CSOR_EXT /*oob in csor_ext*/\| CSOR_NAND_PB(128)) /*128 Pages Per Block*/Is it possible to do it with ONFI detection automatically instead of defining manually for different devices? such as what Linux driver does.
current mtd/nand/nand_base.c does in same way. We have to define CONFIG_SYS_NAND_ONFI_DETECTION. Once it is defined, it will check for normal flash detection followed by ONFI. Similar way as Linux doing.
do you have some other requirement.
Could you reword that response? I can't follow it.
-Scott
participants (3)
-
Liu Shengzhou-B36685 -
Prabhakar Kushwaha -
Scott Wood