On 2023/2/7 22:51, Johan Jonker wrote:

The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match.

Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Simon Glass sjg@chromium.org

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

Changed V2: reword

---

Note: Most drivers still assume that FDT and CPU capabilities are identical. In order to use these variables a cast is needed.

---

Kconfig | 8 ++++++++ include/fdtdec.h | 13 +++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/Kconfig b/Kconfig index a75cce7e..7697dade 100644 --- a/Kconfig +++ b/Kconfig @@ -422,11 +422,19 @@ endif # EXPERT

config PHYS_64BIT bool "64bit physical address support"

• select FDT_64BIT help Say Y here to support 64bit physical memory address. This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs.

+config FDT_64BIT

• bool "64bit fdt address support"
• help

•  Say Y here to support 64bit fdt addresses.
  

•  This can be used not only for 64bit SoCs, but also
  

•  for large address extensions on 32bit SoCs.
  

• config HAS_ROM bool select BINMAN

diff --git a/include/fdtdec.h b/include/fdtdec.h index 12355afd..af29ac0c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -18,15 +18,18 @@ #include <pci.h>

/*

• • A typedef for a physical address. Note that fdt data is always big

• • Support for 64bit fdt addresses.
• • This can be used not only for 64bit SoCs, but also
• • for large address extensions on 32bit SoCs.
• • Note that fdt data is always big
  • endian even on a litle endian machine.
  */

-typedef phys_addr_t fdt_addr_t; -typedef phys_size_t fdt_size_t;

#define FDT_SIZE_T_NONE (-1U)

-#ifdef CONFIG_PHYS_64BIT +#ifdef CONFIG_FDT_64BIT +typedef u64 fdt_addr_t; +typedef u64 fdt_size_t; #define FDT_ADDR_T_NONE ((ulong)(-1))

#define fdt_addr_to_cpu(reg) be64_to_cpu(reg) @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t; #define cpu_to_fdt_size(reg) cpu_to_be64(reg) typedef fdt64_t fdt_val_t; #else +typedef u32 fdt_addr_t; +typedef u32 fdt_size_t; #define FDT_ADDR_T_NONE (-1U)

#define fdt_addr_to_cpu(reg) be32_to_cpu(reg)

2.20.1

On 2023/2/7 22:52, Johan Jonker wrote:

When fdt_addr_t and phys_addr_t are split it turns out that the header don't match the functions, so fix the headers.

Signed-off-by: Johan Jonker jbx6244@gmail.com Reviewed-by: Simon Glass sjg@chromium.org

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

include/dm/ofnode.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h index fa986560..287b0c35 100644 --- a/include/dm/ofnode.h +++ b/include/dm/ofnode.h @@ -678,8 +678,8 @@ int ofnode_read_size(ofnode node, const char *propname);

• @size: Pointer to size of the address
• Return: address, or FDT_ADDR_T_NONE if not present or invalid

*/ -phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,

• 		       fdt_size_t *size);
  

+fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index,

• 		      fdt_size_t *size);
  
  

  /**

  • ofnode_get_addr_size_index_notrans() - get an address/size from a node

@@ -695,8 +695,8 @@ phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,

• @size: Pointer to size of the address
• Return: address, or FDT_ADDR_T_NONE if not present or invalid

*/ -phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,

• 			       fdt_size_t *size);
  

+fdt_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,

• 			      fdt_size_t *size);
  
  

  /**

  • ofnode_get_addr_index() - get an address from a node

@@ -707,7 +707,7 @@ phys_addr_t ofnode_get_addr_size_index_notrans(ofnode node, int index,

• @index: Index of address to read (0 for first)
• Return: address, or FDT_ADDR_T_NONE if not present or invalid

*/ -phys_addr_t ofnode_get_addr_index(ofnode node, int index); +fdt_addr_t ofnode_get_addr_index(ofnode node, int index);

/**

• ofnode_get_addr() - get an address from a node

@@ -717,7 +717,7 @@ phys_addr_t ofnode_get_addr_index(ofnode node, int index);

• @node: node to read from
• Return: address, or FDT_ADDR_T_NONE if not present or invalid

*/ -phys_addr_t ofnode_get_addr(ofnode node); +fdt_addr_t ofnode_get_addr(ofnode node);

/**

• ofnode_get_size() - get size from a node

@@ -1055,8 +1055,8 @@ const void *ofprop_get_property(const struct ofprop *prop,

• @sizep: place to put size value (on success)
• Return: address value, or FDT_ADDR_T_NONE on error

*/ -phys_addr_t ofnode_get_addr_size(ofnode node, const char *propname,

• 		 phys_size_t *sizep);
  

+fdt_addr_t ofnode_get_addr_size(ofnode node, const char *propname,

• 		fdt_size_t *sizep);
  
  

  /**

  • ofnode_read_u8_array_ptr() - find an 8-bit array

-- 2.20.1

On 2023/2/7 22:52, Johan Jonker wrote:

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert regmap_init_mem_plat() input to phys_addr_t in files that use this function.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/core/regmap.c | 2 +- drivers/core/syscon-uclass.c | 2 +- drivers/ram/rockchip/sdram_rk3066.c | 2 +- drivers/ram/rockchip/sdram_rk3188.c | 2 +- drivers/ram/rockchip/sdram_rk322x.c | 2 +- drivers/ram/rockchip/sdram_rk3288.c | 2 +- drivers/ram/rockchip/sdram_rk3328.c | 2 +- drivers/ram/rockchip/sdram_rk3399.c | 2 +- include/regmap.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index e33bb9d7..37da64b2 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -79,7 +79,7 @@ static struct regmap *regmap_alloc(int count) }

#if CONFIG_IS_ENABLED(OF_PLATDATA) -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count, +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count, struct regmap **mapp) { struct regmap_range *range; diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index 25fdb66e..69b66773 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -58,7 +58,7 @@ static int syscon_pre_probe(struct udevice *dev) #if CONFIG_IS_ENABLED(OF_PLATDATA) struct syscon_base_plat *plat = dev_get_plat(dev);

• return regmap_init_mem_plat(dev, plat->reg, ARRAY_SIZE(plat->reg),

• return regmap_init_mem_plat(dev, (phys_addr_t *)plat->reg, ARRAY_SIZE(plat->reg), &priv->regmap); #else return regmap_init_mem(dev_ofnode(dev), &priv->regmap);

diff --git a/drivers/ram/rockchip/sdram_rk3066.c b/drivers/ram/rockchip/sdram_rk3066.c index a2425f22..9bb26b64 100644 --- a/drivers/ram/rockchip/sdram_rk3066.c +++ b/drivers/ram/rockchip/sdram_rk3066.c @@ -801,7 +801,7 @@ static int rk3066_dmc_conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* RK3066 supports dual-channel, set default channel num to 2. */ plat->num_channels = 1;

• ret = regmap_init_mem_plat(dev, of_plat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 272b1b2d..1838985c 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -867,7 +867,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* rk3188 supports dual-channel, set default channel num to 2 */ plat->num_channels = 1;

• ret = regmap_init_mem_plat(dev, of_plat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c index 1b204fb5..33599dc5 100644 --- a/drivers/ram/rockchip/sdram_rk322x.c +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -769,7 +769,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base));

plat->num_channels = 1;

• ret = regmap_init_mem_plat(dev, of_plat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index 83778ad1..1a548da5 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -1029,7 +1029,7 @@ static int conv_of_plat(struct udevice *dev) memcpy(&plat->base, of_plat->rockchip_sdram_params, sizeof(plat->base)); /* Rk3288 supports dual-channel, set default channel num to 2 */ plat->num_channels = 2;

• ret = regmap_init_mem_plat(dev, of_plat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)of_plat->reg, ARRAY_SIZE(of_plat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c index b511c6bf..2427efe0 100644 --- a/drivers/ram/rockchip/sdram_rk3328.c +++ b/drivers/ram/rockchip/sdram_rk3328.c @@ -54,7 +54,7 @@ static int conv_of_plat(struct udevice *dev) struct dtd_rockchip_rk3328_dmc *dtplat = &plat->dtplat; int ret;

• ret = regmap_init_mem_plat(dev, dtplat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg, ARRAY_SIZE(dtplat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index 136e4ede..c88fdbb3 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3049,7 +3049,7 @@ static int conv_of_plat(struct udevice *dev) struct dtd_rockchip_rk3399_dmc *dtplat = &plat->dtplat; int ret;

• ret = regmap_init_mem_plat(dev, dtplat->reg,

• ret = regmap_init_mem_plat(dev, (phys_addr_t *)dtplat->reg, ARRAY_SIZE(dtplat->reg) / 2, &plat->map); if (ret) return ret;

diff --git a/include/regmap.h b/include/regmap.h index e81a3602..a274fb27 100644 --- a/include/regmap.h +++ b/include/regmap.h @@ -388,7 +388,7 @@ int regmap_init_mem(ofnode node, struct regmap **mapp);

• Use regmap_uninit() to free it.

*/ -int regmap_init_mem_plat(struct udevice *dev, fdt_val_t *reg, int count, +int regmap_init_mem_plat(struct udevice *dev, phys_addr_t *reg, int count, struct regmap **mapp);

int regmap_init_mem_index(ofnode node, struct regmap **mapp, int index);

2.20.1

On 2023/2/7 22:53, Johan Jonker wrote:

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so convert dev_read_addr output to phys_addr_t in the rockchip-saradc.c file.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/adc/rockchip-saradc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/adc/rockchip-saradc.c b/drivers/adc/rockchip-saradc.c index 760f8fe6..1ba7c483 100644 --- a/drivers/adc/rockchip-saradc.c +++ b/drivers/adc/rockchip-saradc.c @@ -145,7 +145,7 @@ int rockchip_saradc_of_to_plat(struct udevice *dev) struct rockchip_saradc_data *data;

data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);

• priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);

• priv->regs = (struct rockchip_saradc_regs *)((phys_addr_t)dev_read_addr(dev)); if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) { pr_err("Dev: %s - can't get address!", dev->name); return -ENODATA;

-- 2.20.1

On 2023/2/7 22:53, Johan Jonker wrote:

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so convert dev_read_addr output to phys_addr_t in the dw-apb-timer.c file.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/timer/dw-apb-timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/timer/dw-apb-timer.c b/drivers/timer/dw-apb-timer.c index 10f0a9f6..f55a3c54 100644 --- a/drivers/timer/dw-apb-timer.c +++ b/drivers/timer/dw-apb-timer.c @@ -23,7 +23,7 @@ #define DW_APB_CTRL 0x8

struct dw_apb_timer_priv {

• fdt_addr_t regs;

• phys_addr_t regs; struct reset_ctl_bulk resets; };

@@ -92,7 +92,7 @@ static int dw_apb_timer_of_to_plat(struct udevice *dev) if (CONFIG_IS_ENABLED(OF_REAL)) { struct dw_apb_timer_priv *priv = dev_get_priv(dev);

• priv->regs = dev_read_addr(dev);
  

• priv->regs = (phys_addr_t)dev_read_addr(dev);
  

  }

  return 0;

-- 2.20.1

Hi Johan

On Tue, Feb 7, 2023 at 3:54 PM Johan Jonker jbx6244@gmail.com wrote:

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expext 64-bit data from the device tree parser, so convert dev_read_addr output to phys_addr_t in the rockchip_nfc.c file.

Signed-off-by: Johan Jonker jbx6244@gmail.com

drivers/mtd/nand/raw/rockchip_nfc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index d016d255..78e2a691 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -1180,7 +1180,7 @@ static int rk_nfc_probe(struct udevice *dev) nfc->cfg = (void *)dev_get_driver_data(dev); nfc->dev = dev;

•   nfc->regs = (void *)dev_read_addr(dev);
  

•   nfc->regs = (void *)((phys_addr_t)dev_read_addr(dev));
  

Is phy_read_addr_ptr() family supposed to be used in this case?

Michael

    if (IS_ERR(nfc->regs)) {
            ret = PTR_ERR(nfc->regs);
            goto release_nfc;

-- 2.20.1

On 2023/2/7 22:54, Johan Jonker wrote:

The compatible string for rk3308 has as fallback string "rockchip,rv1108-nfc". As there is no logic in probe priority between the SoC orientated string and the fall back, so remove the compatible string "rockchip,rk3308-nfc" from the driver.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/mtd/nand/raw/rockchip_nfc.c | 4 ---- 1 file changed, 4 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 78e2a691..3809702e 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -1165,10 +1165,6 @@ static const struct udevice_id rk_nfc_id_table[] = { .compatible = "rockchip,rv1108-nfc", .data = (unsigned long)&nfc_v8_cfg },

• {

• .compatible = "rockchip,rk3308-nfc",
  

• .data = (unsigned long)&nfc_v8_cfg
  

• }, { /* sentinel */ } };

-- 2.20.1

Hi

On Tue, Feb 7, 2023 at 3:55 PM Johan Jonker jbx6244@gmail.com wrote:

The MTD framework in U-boot is not identical for drivers ported from Linux. The rockchip_nfc driver was ported with OOB ops functions while the framework expects a layout structure per chip. Fix by adding a structure with OOB data and remove unused functions.

Signed-off-by: Johan Jonker jbx6244@gmail.com

drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++++++++++------------------- 1 file changed, 20 insertions(+), 41 deletions(-)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 3809702e..5e2b8346 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -814,47 +814,9 @@ static void rk_nfc_disable_clks(struct rk_nfc *nfc) clk_disable_unprepare(nfc->ahb_clk); }

-static int rk_nfc_ooblayout_free(struct mtd_info *mtd, int section,

•                            struct mtd_oob_region *oob_region)
  

-{

•   struct nand_chip *chip = mtd_to_nand(mtd);
  

•   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
  

•   if (section)
  

•           return -ERANGE;
  

•   /*
  

•    * The beginning of the OOB area stores the reserved data for the NFC,
  

•    * the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
  

•    */
  

•   oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
  

•   oob_region->offset = NFC_SYS_DATA_SIZE + 2;
  

•   return 0;
  

-}

-static int rk_nfc_ooblayout_ecc(struct mtd_info *mtd, int section,

•                           struct mtd_oob_region *oob_region)
  

-{

•   struct nand_chip *chip = mtd_to_nand(mtd);
  

•   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
  

•   if (section)
  

•           return -ERANGE;
  

•   oob_region->length = mtd->oobsize - rknand->metadata_size;
  

•   oob_region->offset = rknand->metadata_size;
  

•   return 0;
  

-}

-static const struct mtd_ooblayout_ops rk_nfc_ooblayout_ops = {

•   .rfree = rk_nfc_ooblayout_free,
  

•   .ecc = rk_nfc_ooblayout_ecc,
  

-};

static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip) {

•   struct rk_nfc_nand_chip *rknand = rk_nfc_to_rknand(chip);
    const u8 *strengths = nfc->cfg->ecc_strengths;
    struct mtd_info *mtd = nand_to_mtd(chip);
    struct nand_ecc_ctrl *ecc = &chip->ecc;
  

@@ -892,6 +854,21 @@ static int rk_nfc_ecc_init(struct rk_nfc *nfc, struct nand_chip *chip) ecc->steps = mtd->writesize / ecc->size; ecc->bytes = DIV_ROUND_UP(ecc->strength * fls(8 * chip->ecc.size), 8);

•   if (ecc->bytes * ecc->steps > mtd->oobsize - rknand->metadata_size)
  

•           return -EINVAL;
  

•   ecc->layout = kzalloc(sizeof(*ecc->layout), GFP_KERNEL);
  

•   if (!ecc->layout)
  

•           return -ENOMEM;
  

•   ecc->layout->eccbytes = ecc->bytes * ecc->steps;
  

•   for (i = 0; i < ecc->layout->eccbytes; i++)
  

•           ecc->layout->eccpos[i] = rknand->metadata_size + i;
  

•   ecc->layout->oobfree[0].length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
  

•   ecc->layout->oobfree[0].offset = NFC_SYS_DATA_SIZE + 2;
  

•   return 0;
  

}

@@ -969,7 +946,6 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum) chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB; chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USE_BOUNCE_BUFFER;

•   mtd_set_ooblayout(mtd, &rk_nfc_ooblayout_ops);
    rk_nfc_hw_init(nfc);
    ret = nand_scan_ident(mtd, nsels, NULL);
    if (ret)
  

@@ -998,13 +974,16 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)

    if (!nfc->page_buf) {
            nfc->page_buf = kzalloc(NFC_MAX_PAGE_SIZE, GFP_KERNEL);

•           if (!nfc->page_buf)
  

•           if (!nfc->page_buf) {
  

•                   kfree(ecc->layout);
                    return -ENOMEM;
  

•           }
    }
  
    if (!nfc->oob_buf) {
            nfc->oob_buf = kzalloc(NFC_MAX_OOB_SIZE, GFP_KERNEL);
            if (!nfc->oob_buf) {
  

•                   kfree(ecc->layout);
                    kfree(nfc->page_buf);
                    nfc->page_buf = NULL;
                    return -ENOMEM;
  

-- 2.20.1

Reviewed-by: Michael Trimarchi michael@amarulasolutions.com

On 2023/2/7 22:55, Johan Jonker wrote:

Add flash_node to the rockchip_nfc driver chip stucture in order to find the partitions in the add_mtd_partitions_of() functions.

Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/mtd/nand/raw/rockchip_nfc.c | 1 + 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c b/drivers/mtd/nand/raw/rockchip_nfc.c index 5e2b8346..9e3a2533 100644 --- a/drivers/mtd/nand/raw/rockchip_nfc.c +++ b/drivers/mtd/nand/raw/rockchip_nfc.c @@ -934,6 +934,7 @@ static int rk_nfc_nand_chip_init(ofnode node, struct rk_nfc *nfc, int devnum)

nand_set_controller_data(chip, nfc);

• chip->flash_node = node; chip->chip_delay = NFC_RB_DELAY_US; chip->select_chip = rk_nfc_select_chip; chip->cmd_ctrl = rk_nfc_cmd;

-- 2.20.1

On 2023/2/7 22:56, Johan Jonker wrote:

Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write size and 40 bit ecc support

Signed-off-by: Paweł Jarosz paweljarosz3691@gmail.com Signed-off-by: Johan Jonker jbx6244@gmail.com

Reviewed-by: Kever Yang kever.yang@rock-chips.com

Thanks, - Kever

---

drivers/mtd/nand/raw/nand_ids.c | 3 +++ 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index d0cfacc6..22ea5e2f 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -48,6 +48,9 @@ struct nand_flash_dev nand_flash_ids[] = { {"TC58NVG6D2 64G 3.3V 8-bit", { .id = {0x98, 0xde, 0x94, 0x82, 0x76, 0x56, 0x04, 0x20} }, SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },

• {"SDTNQGAMA 64G 3.3V 8-bit",

• { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x57} },
  

•   SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
  

  {"SDTNRGAMA 64G 3.3V 8-bit", { .id = {0x45, 0xde, 0x94, 0x93, 0x76, 0x50} }, SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },

-- 2.20.1