[U-Boot] [PATCH v4 0/5] Added SPL support
This patch series is submitted to add support for MMC/SD along with SPL support. Also, fixed incorrect register offset of ddr and timer registers.
The patches have been compile tested and run on AM335X EVM.
The patches depends on previous patch series which was submitted for supporting AM33xx platform.
The patches are applies on uboot master branch.
Changes since v3: - Splitted 1st patch into 3 patches - Addressed review comments - Use of common bootmode functions for AM33XX platform
Changes since v2: - Added missing omap.h file in "Add SPL support for AM335X EVM" patch
Changes since v1: - Removed unwanted code from omap_hsmmc.c file - Changed CONFIG_AM335X to CONFIG_AM33XX - Rebased to master branch - Replaced am33xx lowleve_init.S with omap-common lowlevel_init.S in order to use common code for omap_bootmode.
Chandan Nath (5): ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XX ARM:AM33XX: Fix ddr and timer register offset ARM:AM33XX: Fixing AM335X config parameters ARM:AM33XX: Add mmc/sd support ARM:AM33XX: Add SPL support for AM335X EVM
Makefile | 2 +- arch/arm/cpu/armv7/am33xx/Makefile | 2 - arch/arm/cpu/armv7/am33xx/board.c | 66 ++++++++- arch/arm/cpu/armv7/am33xx/clock.c | 8 + arch/arm/cpu/armv7/am33xx/config.mk | 18 +++ arch/arm/cpu/armv7/am33xx/emif4.c | 2 +- arch/arm/cpu/armv7/am33xx/lowlevel_init.S | 72 ---------- arch/arm/cpu/armv7/omap-common/Makefile | 4 + arch/arm/cpu/armv7/omap-common/boot-common.c | 49 +++++++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 28 ---- arch/arm/include/asm/arch-am33xx/common_def.h | 22 +++ arch/arm/include/asm/arch-am33xx/cpu.h | 44 +++--- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 6 +- arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 164 +++++++++++++++++++++++ arch/arm/include/asm/arch-am33xx/omap.h | 59 ++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + arch/arm/include/asm/omap_common.h | 5 + board/ti/am335x/common_def.h | 24 ---- board/ti/am335x/evm.c | 2 +- board/ti/am335x/mux.c | 23 +++- include/configs/am335x_evm.h | 62 +++++++-- spl/Makefile | 13 +- 22 files changed, 495 insertions(+), 181 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/config.mk delete mode 100644 arch/arm/cpu/armv7/am33xx/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/omap-common/boot-common.c create mode 100644 arch/arm/include/asm/arch-am33xx/common_def.h create mode 100644 arch/arm/include/asm/arch-am33xx/mmc_host_def.h create mode 100644 arch/arm/include/asm/arch-am33xx/omap.h delete mode 100644 board/ti/am335x/common_def.h
This patch is added to replace CONFIG_AM335X symbol with CONFIG_AM333XX for AM33XX platforms.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com --- Changes since v3: - Splitted 1st patch into 3 patches - Addressed review comments
Changes since v2: - No change
Changes since v1: - Changed CONFIG_AM335X to CONFIG_AM33XX - Rebased to master branch
Makefile | 2 +- arch/arm/include/asm/arch-am33xx/cpu.h | 2 +- include/configs/am335x_evm.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile index 7e9491d..36246b6 100644 --- a/Makefile +++ b/Makefile @@ -294,7 +294,7 @@ LIBS += lib/libfdt/libfdt.o LIBS += api/libapi.o LIBS += post/libpost.o
-ifneq ($(CONFIG_AM335X)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS += $(CPUDIR)/omap-common/libomap-common.o endif
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index ad9156e..d18750a 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -51,7 +51,7 @@ | BIT(3) | BIT(4))
/* Reset control */ -#ifdef CONFIG_AM335X +#ifdef CONFIG_AM33XX #define PRM_RSTCTRL 0x44E00F00 #endif #define PRM_RSTCTRL_RESET 0x01 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 26a3c96..f737094 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -16,7 +16,7 @@ #ifndef __CONFIG_AM335X_EVM_H #define __CONFIG_AM335X_EVM_H
-#define CONFIG_AM335X +#define CONFIG_AM33XX #define CONFIG_CMD_MEMORY /* for mtest */ #undef CONFIG_GZIP #undef CONFIG_ZLIB
Hello Chandan,
On 10.01.2012 07:38, Chandan Nath wrote:
This patch is added to replace CONFIG_AM335X symbol with CONFIG_AM333XX for AM33XX platforms.
One 3 in CONFIG_AM333XX too much, but only in description. It runs on the Beaglebone. Tested-by: Thomas Weber weber@corscience.de
Thanks. Thomas
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com
Changes since v3:
- Splitted 1st patch into 3 patches
- Addressed review comments
Changes since v2:
- No change
Changes since v1:
- Changed CONFIG_AM335X to CONFIG_AM33XX
- Rebased to master branch
Makefile | 2 +- arch/arm/include/asm/arch-am33xx/cpu.h | 2 +- include/configs/am335x_evm.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/Makefile b/Makefile index 7e9491d..36246b6 100644 --- a/Makefile +++ b/Makefile @@ -294,7 +294,7 @@ LIBS += lib/libfdt/libfdt.o LIBS += api/libapi.o LIBS += post/libpost.o
-ifneq ($(CONFIG_AM335X)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS += $(CPUDIR)/omap-common/libomap-common.o endif
diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index ad9156e..d18750a 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -51,7 +51,7 @@ | BIT(3) | BIT(4))
/* Reset control */ -#ifdef CONFIG_AM335X +#ifdef CONFIG_AM33XX #define PRM_RSTCTRL 0x44E00F00 #endif #define PRM_RSTCTRL_RESET 0x01 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 26a3c96..f737094 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -16,7 +16,7 @@ #ifndef __CONFIG_AM335X_EVM_H #define __CONFIG_AM335X_EVM_H
-#define CONFIG_AM335X +#define CONFIG_AM33XX #define CONFIG_CMD_MEMORY /* for mtest */ #undef CONFIG_GZIP #undef CONFIG_ZLIB
This patch is added to update incorrect ddr and timer register offset.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com --- Changes since v3: - Splitted 1st patch into 3 patches - Addressed review comments
Changes since v2: - No change
Changes since v1: - Changed CONFIG_AM335X to CONFIG_AM33XX - Rebased to master branch
arch/arm/cpu/armv7/am33xx/board.c | 8 ++-- arch/arm/cpu/armv7/am33xx/clock.c | 3 ++ arch/arm/include/asm/arch-am33xx/cpu.h | 42 ++++++++++++++------------- arch/arm/include/asm/arch-am33xx/ddr_defs.h | 6 ++-- 4 files changed, 32 insertions(+), 27 deletions(-)
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 2d6d359..78db3a5 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -26,7 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; -struct timer_reg *timerreg = (struct timer_reg *)DM_TIMER2_BASE; +struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
/* * early system init of muxing and clocks. @@ -55,12 +55,12 @@ void s_init(u32 in_ddr) void init_timer(void) { /* Reset the Timer */ - writel(0x2, (&timerreg->tsicrreg)); + writel(0x2, (&timer_base->tscir));
/* Wait until the reset is done */ - while (readl(&timerreg->tiocpcfgreg) & 1) + while (readl(&timer_base->tiocp_cfg) & 1) ;
/* Start the Timer */ - writel(0x1, (&timerreg->tclrreg)); + writel(0x1, (&timer_base->tclr)); } diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 4ca6c45..7070e7d 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -101,6 +101,9 @@ static void enable_per_clocks(void) while (readl(&cmper->timer2clkctrl) != PRCM_MOD_EN) ;
+ /* Select the Master osc 24 MHZ as Timer2 clock source */ + writel(0x1, &cmdpll->clktimer2clk); + /* UART0 */ writel(PRCM_MOD_EN, &cmwkup->wkup_uart0ctrl); while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) diff --git a/arch/arm/include/asm/arch-am33xx/cpu.h b/arch/arm/include/asm/arch-am33xx/cpu.h index d18750a..25558a2 100644 --- a/arch/arm/include/asm/arch-am33xx/cpu.h +++ b/arch/arm/include/asm/arch-am33xx/cpu.h @@ -108,22 +108,36 @@ struct cm_perpll { unsigned int l3sclkstctrl; /* offset 0x04 */ unsigned int l4fwclkstctrl; /* offset 0x08 */ unsigned int l3clkstctrl; /* offset 0x0c */ - unsigned int resv1[6]; + unsigned int resv1; + unsigned int cpgmac0clkctrl; /* offset 0x14 */ + unsigned int resv2[4]; unsigned int emifclkctrl; /* offset 0x28 */ unsigned int ocmcramclkctrl; /* offset 0x2c */ - unsigned int resv2[12]; + unsigned int gpmcclkctrl; /* offset 0x30 */ + unsigned int resv3[2]; + unsigned int mmc0clkctrl; /* offset 0x3C */ + unsigned int elmclkctrl; /* offset 0x40 */ + unsigned int i2c2clkctrl; /* offset 0x44 */ + unsigned int i2c1clkctrl; /* offset 0x48 */ + unsigned int spi0clkctrl; /* offset 0x4C */ + unsigned int spi1clkctrl; /* offset 0x50 */ + unsigned int resv4[3]; unsigned int l4lsclkctrl; /* offset 0x60 */ unsigned int l4fwclkctrl; /* offset 0x64 */ - unsigned int resv3[6]; + unsigned int resv5[6]; unsigned int timer2clkctrl; /* offset 0x80 */ - unsigned int resv4[19]; + unsigned int resv6[11]; + unsigned int gpio2clkctrl; /* offset 0xB0 */ + unsigned int resv7[7]; unsigned int emiffwclkctrl; /* offset 0xD0 */ - unsigned int resv5[2]; + unsigned int resv8[2]; unsigned int l3instrclkctrl; /* offset 0xDC */ unsigned int l3clkctrl; /* Offset 0xE0 */ - unsigned int resv6[14]; + unsigned int resv9[14]; unsigned int l4hsclkstctrl; /* offset 0x11C */ unsigned int l4hsclkctrl; /* offset 0x120 */ + unsigned int resv10[8]; + unsigned int cpswclkctrl; /* offset 0x144 */ };
/* Encapsulating Display pll registers */ @@ -158,24 +172,12 @@ struct wd_timer { unsigned int wdt_unfr; /* offset 0x100 */ };
-/* Timer Registers */ -struct timer_reg { - unsigned int resv1[4]; - unsigned int tiocpcfgreg; /* offset 0x10 */ - unsigned int resv2[9]; - unsigned int tclrreg; /* offset 0x38 */ - unsigned int tcrrreg; /* offset 0x3C */ - unsigned int tldrreg; /* offset 0x40 */ - unsigned int resv3[4]; - unsigned int tsicrreg; /* offset 0x54 */ -}; - /* Timer 32 bit registers */ struct gptimer { unsigned int tidr; /* offset 0x00 */ - unsigned int res1[0xc]; + unsigned char res1[12]; unsigned int tiocp_cfg; /* offset 0x10 */ - unsigned int res2[0xc]; + unsigned char res2[12]; unsigned int tier; /* offset 0x20 */ unsigned int tistatr; /* offset 0x24 */ unsigned int tistat; /* offset 0x28 */ diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h b/arch/arm/include/asm/arch-am33xx/ddr_defs.h index 9638b4c..ba6b59b 100644 --- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h +++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h @@ -76,7 +76,7 @@ struct emif_regs { unsigned int sdrmcsr; /* offset 0x3C */ unsigned int res2[8]; unsigned int sdritr; /* offset 0x60 */ - unsigned int res3[20]; + unsigned int res3[32]; unsigned int ddrphycr; /* offset 0xE4 */ unsigned int ddrphycsr; /* offset 0xE8 */ unsigned int ddrphycr2; /* offset 0xEC */ @@ -161,10 +161,10 @@ struct ddr_regs { unsigned int dt0wiratio1; /* offset 0x0F4 */ unsigned int dt0giratio0; /* offset 0x0FC */ unsigned int dt0giratio1; /* offset 0x100 */ - unsigned int resv6[2]; + unsigned int resv6[1]; unsigned int dt0fwsratio0; /* offset 0x108 */ unsigned int dt0fwsratio1; /* offset 0x10C */ - unsigned int resv7[5]; + unsigned int resv7[4]; unsigned int dt0wrsratio0; /* offset 0x120 */ unsigned int dt0wrsratio1; /* offset 0x124 */ unsigned int resv8[3];
This patch is added to correct some of the AM335X config parameters which were incorrect along with some cleanup like removing unused code.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com --- Changes since v3: - Splitted 1st patch into 3 patches - Addressed review comments
Changes since v2: - No change
Changes since v1: - Changed CONFIG_AM335X to CONFIG_AM33XX - Rebased to master branch
include/configs/am335x_evm.h | 11 +++-------- 1 files changed, 3 insertions(+), 8 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index f737094..c189031 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -30,7 +30,7 @@ #define CONFIG_AM335X_CONFIG_DDR #define CONFIG_ENV_SIZE 0x400 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024)) -#define CONFIG_SYS_PROMPT "AM335X# " +#define CONFIG_SYS_PROMPT "U-Boot# " #define CONFIG_SYS_NO_FLASH #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM @@ -48,14 +48,12 @@
/* Clock Defines */ #define V_OSCK 24000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK >> 1) +#define V_SCLK (V_OSCK)
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for - initial data */ #define CONFIG_CMD_ECHO
/* max number of command args */ -#define CONFIG_SYS_MAXARGS 32 +#define CONFIG_SYS_MAXARGS 16
/* Console I/O Buffer Size */ #define CONFIG_SYS_CBSIZE 512 @@ -75,7 +73,6 @@ #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ + (8 * 1024 * 1024))
-#undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ #define CONFIG_SYS_HZ 1000 /* 1ms clock */
@@ -89,7 +86,6 @@ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \ GENERATED_GBL_DATA_SIZE) /* Platform/Board specific defs */ -#define CONFIG_SYS_CLK_FREQ 24000000 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ #define CONFIG_SYS_HZ 1000 @@ -100,7 +96,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ -#define CONFIG_SYS_NS16550_COM4 0x481A6000 /* UART3 on IA BOard */
#define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
This patch add supports for mmc/sd driver on AM335X platform. PLL and pinmux configurations for mmc/sd are configured in this patch.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com --- Changes since v3: - Addressed review comments
Changes since v2: - No change
Changes since v1: - Removed unwanted code from omap_hsmmc.c file - Rebased to master branch
arch/arm/cpu/armv7/am33xx/board.c | 7 + arch/arm/cpu/armv7/am33xx/clock.c | 5 + arch/arm/include/asm/arch-am33xx/mmc_host_def.h | 164 +++++++++++++++++++++++ board/ti/am335x/mux.c | 21 +++ include/configs/am335x_evm.h | 8 + 5 files changed, 205 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-am33xx/mmc_host_def.h
diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 78db3a5..312643c 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -64,3 +64,10 @@ void init_timer(void) /* Start the Timer */ writel(0x1, (&timer_base->tclr)); } + +#if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD) +int board_mmc_init(bd_t *bis) +{ + return omap_mmc_init(0); +} +#endif diff --git a/arch/arm/cpu/armv7/am33xx/clock.c b/arch/arm/cpu/armv7/am33xx/clock.c index 7070e7d..98cfd93 100644 --- a/arch/arm/cpu/armv7/am33xx/clock.c +++ b/arch/arm/cpu/armv7/am33xx/clock.c @@ -108,6 +108,11 @@ static void enable_per_clocks(void) writel(PRCM_MOD_EN, &cmwkup->wkup_uart0ctrl); while (readl(&cmwkup->wkup_uart0ctrl) != PRCM_MOD_EN) ; + + /* MMC0*/ + writel(PRCM_MOD_EN, &cmper->mmc0clkctrl); + while (readl(&cmper->mmc0clkctrl) != PRCM_MOD_EN) + ; }
static void mpu_pll_config(void) diff --git a/arch/arm/include/asm/arch-am33xx/mmc_host_def.h b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h new file mode 100644 index 0000000..5d7dd4b --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/mmc_host_def.h @@ -0,0 +1,164 @@ +/* + * mmc_host_def.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MMC_HOST_DEF_H +#define MMC_HOST_DEF_H + +/* + * OMAP HSMMC register definitions + */ +#define OMAP_HSMMC1_BASE 0x48060100 +#define OMAP_HSMMC2_BASE 0x481D8000 +#define OMAP_HSMMC3_BASE 0x47C24000 + +typedef struct hsmmc { + unsigned char res1[0x10]; + unsigned int sysconfig; /* 0x10 */ + unsigned int sysstatus; /* 0x14 */ + unsigned char res2[0x14]; + unsigned int con; /* 0x2C */ + unsigned char res3[0xD4]; + unsigned int blk; /* 0x104 */ + unsigned int arg; /* 0x108 */ + unsigned int cmd; /* 0x10C */ + unsigned int rsp10; /* 0x110 */ + unsigned int rsp32; /* 0x114 */ + unsigned int rsp54; /* 0x118 */ + unsigned int rsp76; /* 0x11C */ + unsigned int data; /* 0x120 */ + unsigned int pstate; /* 0x124 */ + unsigned int hctl; /* 0x128 */ + unsigned int sysctl; /* 0x12C */ + unsigned int stat; /* 0x130 */ + unsigned int ie; /* 0x134 */ + unsigned char res4[0x8]; + unsigned int capa; /* 0x140 */ +} hsmmc_t; + +/* + * OMAP HS MMC Bit definitions + */ +#define MMC_SOFTRESET (0x1 << 1) +#define RESETDONE (0x1 << 0) +#define NOOPENDRAIN (0x0 << 0) +#define OPENDRAIN (0x1 << 0) +#define OD (0x1 << 0) +#define INIT_NOINIT (0x0 << 1) +#define INIT_INITSTREAM (0x1 << 1) +#define HR_NOHOSTRESP (0x0 << 2) +#define STR_BLOCK (0x0 << 3) +#define MODE_FUNC (0x0 << 4) +#define DW8_1_4BITMODE (0x0 << 5) +#define MIT_CTO (0x0 << 6) +#define CDP_ACTIVEHIGH (0x0 << 7) +#define WPP_ACTIVEHIGH (0x0 << 8) +#define RESERVED_MASK (0x3 << 9) +#define CTPL_MMC_SD (0x0 << 11) +#define BLEN_512BYTESLEN (0x200 << 0) +#define NBLK_STPCNT (0x0 << 16) +#define DE_DISABLE (0x0 << 0) +#define BCE_DISABLE (0x0 << 1) +#define BCE_ENABLE (0x1 << 1) +#define ACEN_DISABLE (0x0 << 2) +#define DDIR_OFFSET (4) +#define DDIR_MASK (0x1 << 4) +#define DDIR_WRITE (0x0 << 4) +#define DDIR_READ (0x1 << 4) +#define MSBS_SGLEBLK (0x0 << 5) +#define MSBS_MULTIBLK (0x1 << 5) +#define RSP_TYPE_OFFSET (16) +#define RSP_TYPE_MASK (0x3 << 16) +#define RSP_TYPE_NORSP (0x0 << 16) +#define RSP_TYPE_LGHT136 (0x1 << 16) +#define RSP_TYPE_LGHT48 (0x2 << 16) +#define RSP_TYPE_LGHT48B (0x3 << 16) +#define CCCE_NOCHECK (0x0 << 19) +#define CCCE_CHECK (0x1 << 19) +#define CICE_NOCHECK (0x0 << 20) +#define CICE_CHECK (0x1 << 20) +#define DP_OFFSET (21) +#define DP_MASK (0x1 << 21) +#define DP_NO_DATA (0x0 << 21) +#define DP_DATA (0x1 << 21) +#define CMD_TYPE_NORMAL (0x0 << 22) +#define INDEX_OFFSET (24) +#define INDEX_MASK (0x3f << 24) +#define INDEX(i) (i << 24) +#define DATI_MASK (0x1 << 1) +#define DATI_CMDDIS (0x1 << 1) +#define DTW_1_BITMODE (0x0 << 1) +#define DTW_4_BITMODE (0x1 << 1) +#define DTW_8_BITMODE (0x1 << 5) /* CON[DW8]*/ +#define SDBP_PWROFF (0x0 << 8) +#define SDBP_PWRON (0x1 << 8) +#define SDVS_1V8 (0x5 << 9) +#define SDVS_3V0 (0x6 << 9) +#define ICE_MASK (0x1 << 0) +#define ICE_STOP (0x0 << 0) +#define ICS_MASK (0x1 << 1) +#define ICS_NOTREADY (0x0 << 1) +#define ICE_OSCILLATE (0x1 << 0) +#define CEN_MASK (0x1 << 2) +#define CEN_DISABLE (0x0 << 2) +#define CEN_ENABLE (0x1 << 2) +#define CLKD_OFFSET (6) +#define CLKD_MASK (0x3FF << 6) +#define DTO_MASK (0xF << 16) +#define DTO_15THDTO (0xE << 16) +#define SOFTRESETALL (0x1 << 24) +#define CC_MASK (0x1 << 0) +#define TC_MASK (0x1 << 1) +#define BWR_MASK (0x1 << 4) +#define BRR_MASK (0x1 << 5) +#define ERRI_MASK (0x1 << 15) +#define IE_CC (0x01 << 0) +#define IE_TC (0x01 << 1) +#define IE_BWR (0x01 << 4) +#define IE_BRR (0x01 << 5) +#define IE_CTO (0x01 << 16) +#define IE_CCRC (0x01 << 17) +#define IE_CEB (0x01 << 18) +#define IE_CIE (0x01 << 19) +#define IE_DTO (0x01 << 20) +#define IE_DCRC (0x01 << 21) +#define IE_DEB (0x01 << 22) +#define IE_CERR (0x01 << 28) +#define IE_BADA (0x01 << 29) + +#define VS30_3V0SUP (1 << 25) +#define VS18_1V8SUP (1 << 26) + +/* Driver definitions */ +#define MMCSD_SECTOR_SIZE 512 +#define MMC_CARD 0 +#define SD_CARD 1 +#define BYTE_MODE 0 +#define SECTOR_MODE 1 +#define CLK_INITSEQ 0 +#define CLK_400KHZ 1 +#define CLK_MISC 2 + +#define RSP_TYPE_NONE (RSP_TYPE_NORSP | CCCE_NOCHECK | CICE_NOCHECK) +#define MMC_CMD0 (INDEX(0) | RSP_TYPE_NONE | DP_NO_DATA | DDIR_WRITE) + +/* Clock Configurations and Macros */ +#define MMC_CLOCK_REFERENCE 96 /* MHz */ + +#define mmc_reg_out(addr, mask, val)\ + writel((readl(addr) & (~(mask))) | ((val) & (mask)), (addr)) + +int omap_mmc_init(int dev_index); + +#endif /* MMC_HOST_DEF_H */ diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 8f27409..27f5f30 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -258,6 +258,20 @@ static struct module_pin_mux uart0_pin_mux[] = { {-1}, };
+#ifdef CONFIG_MMC +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */ + {OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */ + {-1}, +}; +#endif + /* * Configure the pin mux for the module */ @@ -276,3 +290,10 @@ void enable_uart0_pin_mux(void) { configure_module_pin_mux(uart0_pin_mux); } + +#ifdef CONFIG_MMC +void enable_mmc0_pin_mux(void) +{ + configure_module_pin_mux(mmc0_pin_mux); +} +#endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index c189031..1a25eb3 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -76,6 +76,14 @@ #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ #define CONFIG_SYS_HZ 1000 /* 1ms clock */
+#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_OMAP_HSMMC +#define CONFIG_CMD_MMC +#define CONFIG_DOS_PARTITION +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
This patch is added to support SPL feature on AM335X platform. In this patch, MMC1 is configured as boot device for SPL and support for other devices will be added in the next patch series.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com --- Changes since v3: - Use of common bootmode functions for AM33XX platform
Changes since v2: - Added missing omap.h file
Changes since v1: - Rebased to master branch - Replaced am33xx lowleve_init.S with omap-common lowlevel_init.S in order to use common code for omap_bootmode.
arch/arm/cpu/armv7/am33xx/Makefile | 2 - arch/arm/cpu/armv7/am33xx/board.c | 51 +++++++++++++++- arch/arm/cpu/armv7/am33xx/config.mk | 18 ++++++ arch/arm/cpu/armv7/am33xx/emif4.c | 2 +- arch/arm/cpu/armv7/am33xx/lowlevel_init.S | 72 ------------------------ arch/arm/cpu/armv7/omap-common/Makefile | 4 + arch/arm/cpu/armv7/omap-common/boot-common.c | 49 ++++++++++++++++ arch/arm/cpu/armv7/omap-common/hwinit-common.c | 28 --------- arch/arm/include/asm/arch-am33xx/common_def.h | 22 +++++++ arch/arm/include/asm/arch-am33xx/omap.h | 59 +++++++++++++++++++ arch/arm/include/asm/arch-am33xx/sys_proto.h | 1 + arch/arm/include/asm/omap_common.h | 5 ++ board/ti/am335x/common_def.h | 24 -------- board/ti/am335x/evm.c | 2 +- board/ti/am335x/mux.c | 2 +- include/configs/am335x_evm.h | 41 ++++++++++++- spl/Makefile | 13 ++-- 17 files changed, 252 insertions(+), 143 deletions(-) create mode 100644 arch/arm/cpu/armv7/am33xx/config.mk delete mode 100644 arch/arm/cpu/armv7/am33xx/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/omap-common/boot-common.c create mode 100644 arch/arm/include/asm/arch-am33xx/common_def.h create mode 100644 arch/arm/include/asm/arch-am33xx/omap.h delete mode 100644 board/ti/am335x/common_def.h
diff --git a/arch/arm/cpu/armv7/am33xx/Makefile b/arch/arm/cpu/armv7/am33xx/Makefile index 6beafbb..7768912 100644 --- a/arch/arm/cpu/armv7/am33xx/Makefile +++ b/arch/arm/cpu/armv7/am33xx/Makefile @@ -16,8 +16,6 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).o
-SOBJS := lowlevel_init.o - COBJS += clock.o COBJS += sys_info.o COBJS += ddr.o diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 312643c..d64ae69 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -19,19 +19,31 @@ #include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/hardware.h> +#include <asm/arch/omap.h> #include <asm/arch/ddr_defs.h> #include <asm/arch/clock.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/common_def.h> #include <asm/io.h> +#include <asm/omap_common.h>
DECLARE_GLOBAL_DATA_PTR;
struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE; struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE; +struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE; + +/* UART Defines */ +#ifdef CONFIG_SPL_BUILD +#define UART_RESET (0x1 << 1) +#define UART_CLK_RUNNING_MASK 0x1 +#define UART_SMART_IDLE_EN (0x1 << 0x3) +#endif
/* * early system init of muxing and clocks. */ -void s_init(u32 in_ddr) +void s_init(void) { /* WDT1 is already running when the bootloader gets control * Disable it to avoid "random" resets @@ -43,12 +55,37 @@ void s_init(u32 in_ddr) while (readl(&wdtimer->wdtwwps) != 0x0) ;
+#ifdef CONFIG_SPL_BUILD /* Setup the PLLs and the clocks for the peripherals */ -#ifdef CONFIG_SETUP_PLL pll_init(); + + /* UART softreset */ + u32 regVal; + + enable_uart0_pin_mux(); + + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_RESET; + writel(regVal, &uart_base->uartsyscfg); + while ((readl(&uart_base->uartsyssts) & + UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) + ; + + /* Disable smart idle */ + regVal = readl(&uart_base->uartsyscfg); + regVal |= UART_SMART_IDLE_EN; + writel(regVal, &uart_base->uartsyscfg); + + /* Initialize the Timer */ + init_timer(); + + preloader_console_init(); + + config_ddr(); #endif - if (!in_ddr) - config_ddr(); + + /* Enable MMC0 */ + enable_mmc0_pin_mux(); }
/* Initialize timer */ @@ -71,3 +108,9 @@ int board_mmc_init(bd_t *bis) return omap_mmc_init(0); } #endif + +void setup_clocks_for_console(void) +{ + /* Not yet implemented */ + return; +} diff --git a/arch/arm/cpu/armv7/am33xx/config.mk b/arch/arm/cpu/armv7/am33xx/config.mk new file mode 100644 index 0000000..5750bbd --- /dev/null +++ b/arch/arm/cpu/armv7/am33xx/config.mk @@ -0,0 +1,18 @@ +# +# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed "as is" WITHOUT ANY WARRANTY of any +# kind, whether express or implied; without even the implied warranty +# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +ifdef CONFIG_SPL_BUILD +ALL-y += $(OBJTREE)/MLO +else +ALL-y += $(obj)u-boot.img +endif diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 1318365..2f4164d 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -46,7 +46,7 @@ void dram_init_banksize(void) }
-#ifdef CONFIG_AM335X_CONFIG_DDR +#ifdef CONFIG_SPL_BUILD static void data_macro_config(int dataMacroNum) { struct ddr_data data; diff --git a/arch/arm/cpu/armv7/am33xx/lowlevel_init.S b/arch/arm/cpu/armv7/am33xx/lowlevel_init.S deleted file mode 100644 index 17c962f..0000000 --- a/arch/arm/cpu/armv7/am33xx/lowlevel_init.S +++ /dev/null @@ -1,72 +0,0 @@ -/* - * lowlevel_init.S - * - * AM33XX low level initialization. - * - * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ - * - * Initial Code by: - * Mansoor Ahamed mansoor.ahamed@ti.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <config.h> -#include <asm/arch/hardware.h> - -_mark1: - .word mark1 -_lowlevel_init1: - .word lowlevel_init -_s_init_start: - .word s_init_start - -_TEXT_BASE: - .word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */ - -/***************************************************************************** - * lowlevel_init: - Platform low level init. - ****************************************************************************/ -.globl lowlevel_init -lowlevel_init: - - /* The link register is saved in ip by start.S */ - mov r6, ip - /* check if we are already running from RAM */ - ldr r2, _lowlevel_init1 - ldr r3, _TEXT_BASE - sub r4, r2, r3 - sub r0, pc, r4 - ldr sp, SRAM_STACK -mark1: - ldr r5, _mark1 - sub r5, r5, r2 /* bytes between mark1 and lowlevel_init */ - sub r0, r0, r5 /* r0 <- _start w.r.t current place of execution */ - mov r10, #0x0 /* r10 has in_ddr used by s_init() */ - - ands r0, r0, #0xC0000000 - /* MSB 2 bits <> 0 then we are in ocmc or DDR */ - cmp r0, #0x80000000 - bne s_init_start - mov r10, #0x01 - b s_init_start - -s_init_start: - mov r0, r10 /* passing in_ddr in r0 */ - bl s_init - /* back to arch calling code */ - mov pc, r6 - /* the literal pools origin */ - .ltorg - -SRAM_STACK: - /* Place stack at the top */ - .word LOW_LEVEL_SRAM_STACK diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile index a684611..3f7a0b2 100644 --- a/arch/arm/cpu/armv7/omap-common/Makefile +++ b/arch/arm/cpu/armv7/omap-common/Makefile @@ -37,6 +37,10 @@ ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) COBJS += hwinit-common.o COBJS += clocks-common.o COBJS += emif-common.o +endif + +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) +COBJS += boot-common.o SOBJS += lowlevel_init.o endif
diff --git a/arch/arm/cpu/armv7/omap-common/boot-common.c b/arch/arm/cpu/armv7/omap-common/boot-common.c new file mode 100644 index 0000000..f211f76 --- /dev/null +++ b/arch/arm/cpu/armv7/omap-common/boot-common.c @@ -0,0 +1,49 @@ +/* + * boot-common.c + * + * Common bootmode functions for omap based boards + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <common.h> +#include <asm/omap_common.h> +#include <asm/arch/omap.h> + +/* + * This is used to verify if the configuration header + * was executed by rom code prior to control of transfer + * to the bootloader. SPL is responsible for saving and + * passing the boot_params pointer to the u-boot. + */ +struct omap_boot_parameters boot_params __attribute__ ((section(".data"))); + +#ifdef CONFIG_SPL_BUILD +/* + * We use static variables because global data is not ready yet. + * Initialized data is available in SPL right from the beginning. + * We would not typically need to save these parameters in regular + * U-Boot. This is needed only in SPL at the moment. + */ +u32 omap_bootmode = MMCSD_MODE_FAT; + +u32 omap_boot_device(void) +{ + return (u32) (boot_params.omap_bootdevice); +} + +u32 omap_boot_mode(void) +{ + return omap_bootmode; +} +#endif diff --git a/arch/arm/cpu/armv7/omap-common/hwinit-common.c b/arch/arm/cpu/armv7/omap-common/hwinit-common.c index f65705d..da22f73 100644 --- a/arch/arm/cpu/armv7/omap-common/hwinit-common.c +++ b/arch/arm/cpu/armv7/omap-common/hwinit-common.c @@ -35,34 +35,6 @@
DECLARE_GLOBAL_DATA_PTR;
-/* - * This is used to verify if the configuration header - * was executed by rom code prior to control of transfer - * to the bootloader. SPL is responsible for saving and - * passing the boot_params pointer to the u-boot. - */ -struct omap_boot_parameters boot_params __attribute__ ((section(".data"))); - -#ifdef CONFIG_SPL_BUILD -/* - * We use static variables because global data is not ready yet. - * Initialized data is available in SPL right from the beginning. - * We would not typically need to save these parameters in regular - * U-Boot. This is needed only in SPL at the moment. - */ -u32 omap_bootmode = MMCSD_MODE_FAT; - -u32 omap_boot_device(void) -{ - return (u32) (boot_params.omap_bootdevice); -} - -u32 omap_boot_mode(void) -{ - return omap_bootmode; -} -#endif - void do_set_mux(u32 base, struct pad_conf_entry const *array, int size) { int i; diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h b/arch/arm/include/asm/arch-am33xx/common_def.h new file mode 100644 index 0000000..767932d --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/common_def.h @@ -0,0 +1,22 @@ +/* + * common_def.h + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __COMMON_DEF_H__ +#define __COMMON_DEF_H__ + +extern void enable_uart0_pin_mux(void); +extern void enable_mmc0_pin_mux(void); + +#endif/*__COMMON_DEF_H__ */ diff --git a/arch/arm/include/asm/arch-am33xx/omap.h b/arch/arm/include/asm/arch-am33xx/omap.h new file mode 100644 index 0000000..fc2b7a5 --- /dev/null +++ b/arch/arm/include/asm/arch-am33xx/omap.h @@ -0,0 +1,59 @@ +/* + * omap.h + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * Author: + * Chandan Nath chandan.nath@ti.com + * + * Derived from OMAP4 work by + * Aneesh V aneesh@ti.com + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _OMAP_H_ +#define _OMAP_H_ + +/* + * Non-secure SRAM Addresses + * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE + * at 0x40304000(EMU base) so that our code works for both EMU and GP + */ +#define NON_SECURE_SRAM_START 0x40304000 +#define NON_SECURE_SRAM_END 0x4030E000 +#define LOW_LEVEL_SRAM_STACK 0x4030B7FC + +/* ROM code defines */ +/* Boot device */ +#define BOOT_DEVICE_MASK 0xFF +#define BOOT_DEVICE_OFFSET 0x8 +#define DEV_DESC_PTR_OFFSET 0x4 +#define DEV_DATA_PTR_OFFSET 0x18 +#define BOOT_MODE_OFFSET 0x8 +#define RESET_REASON_OFFSET 0x9 +#define CH_FLAGS_OFFSET 0xA + +#define CH_FLAGS_CHSETTINGS (0x1 << 0) +#define CH_FLAGS_CHRAM (0x1 << 1) +#define CH_FLAGS_CHFLASH (0x1 << 2) +#define CH_FLAGS_CHMMCSD (0x1 << 3) + +#ifndef __ASSEMBLY__ +struct omap_boot_parameters { + char *boot_message; + unsigned int mem_boot_descriptor; + unsigned char omap_bootdevice; + unsigned char reset_reason; + unsigned char ch_flags; +}; +#endif +#endif diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h b/arch/arm/include/asm/arch-am33xx/sys_proto.h index 09ed650..6c58f1b 100644 --- a/arch/arm/include/asm/arch-am33xx/sys_proto.h +++ b/arch/arm/include/asm/arch-am33xx/sys_proto.h @@ -29,4 +29,5 @@ int print_cpuinfo(void); #endif
u32 get_device_type(void); +void setup_clocks_for_console(void); #endif diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 1ec651b..efbf646 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -62,6 +62,11 @@ void preloader_console_init(void); #define BOOT_DEVICE_MMC2 5 /*emmc*/ #define BOOT_DEVICE_MMC1 6 #define BOOT_DEVICE_XIPWAIT 7 +#elif defined(CONFIG_AM33XX) /* AM33XX */ +#define BOOT_DEVICE_NAND 5 +#define BOOT_DEVICE_MMC1 8 +#define BOOT_DEVICE_MMC2 0 +#define BOOT_DEVICE_UART 65 #endif
/* Boot type */ diff --git a/board/ti/am335x/common_def.h b/board/ti/am335x/common_def.h deleted file mode 100644 index 1696d60..0000000 --- a/board/ti/am335x/common_def.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * common_def.h - * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any - * kind, whether express or implied; without even the implied warranty - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __COMMON_DEF_H__ -#define __COMMON_DEF_H__ - -extern void enable_uart0_pin_mux(void); -extern void configure_evm_pin_mux(unsigned char daughter_board_id, - unsigned short daughter_board_profile, - unsigned char daughter_board_flag); - -#endif/*__COMMON_DEF_H__ */ diff --git a/board/ti/am335x/evm.c b/board/ti/am335x/evm.c index b4eddd8..6a9f788 100644 --- a/board/ti/am335x/evm.c +++ b/board/ti/am335x/evm.c @@ -16,7 +16,7 @@ #include <common.h> #include <asm/arch/cpu.h> #include <asm/arch/hardware.h> -#include "common_def.h" +#include <asm/arch/common_def.h> #include <serial.h>
DECLARE_GLOBAL_DATA_PTR; diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c index 27f5f30..4cb0cdf 100644 --- a/board/ti/am335x/mux.c +++ b/board/ti/am335x/mux.c @@ -14,7 +14,7 @@ */
#include <config.h> -#include "common_def.h" +#include <asm/arch/common_def.h> #include <asm/arch/hardware.h> #include <asm/io.h>
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 1a25eb3..2cea1f4 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -26,8 +26,6 @@ #include <asm/arch/cpu.h> #include <asm/arch/hardware.h>
-#define CONFIG_SETUP_PLL -#define CONFIG_AM335X_CONFIG_DDR #define CONFIG_ENV_SIZE 0x400 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 * 1024)) #define CONFIG_SYS_PROMPT "U-Boot# " @@ -118,7 +116,44 @@
#define CONFIG_ENV_IS_NOWHERE
-#define CONFIG_SYS_TEXT_BASE 0x402f0400 +/* Defines for SPL */ +#define CONFIG_SPL +#define CONFIG_SPL_TEXT_BASE 0x402F0400 +#define CONFIG_SPL_MAX_SIZE (46 * 1024) +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ + +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SPL_FAT_SUPPORT + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" + +/* + * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM + * 64 bytes before this address should be set aside for u-boot.img's + * header. That is 0x800FFFC0--0x80100000 should not be used for any + * other needs. + */ +#define CONFIG_SYS_TEXT_BASE 0x80800000 +#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 + +/* Since SPL did pll and ddr initialization for us, + * we don't need to do it twice. + */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_SKIP_LOWLEVEL_INIT +#endif
/* Unsupported features */ #undef CONFIG_USE_IRQ diff --git a/spl/Makefile b/spl/Makefile index 6ac42a2..3262e22 100644 --- a/spl/Makefile +++ b/spl/Makefile @@ -58,13 +58,7 @@ LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/libdma.o LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
-ifeq ($(SOC),omap3) -LIBS-y += $(CPUDIR)/omap-common/libomap-common.o -endif -ifeq ($(SOC),omap4) -LIBS-y += $(CPUDIR)/omap-common/libomap-common.o -endif -ifeq ($(SOC),omap5) +ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),) LIBS-y += $(CPUDIR)/omap-common/libomap-common.o endif
@@ -104,6 +98,11 @@ $(OBJTREE)/MLO: $(obj)u-boot-spl.bin $(OBJTREE)/tools/mkimage -T omapimage \ -a $(CONFIG_SPL_TEXT_BASE) -d $< $@ endif +ifdef CONFIG_AM33XX +$(OBJTREE)/MLO: $(obj)u-boot-spl.bin + $(OBJTREE)/tools/mkimage -T omapimage \ + -a $(CONFIG_SPL_TEXT_BASE) -d $< $@ +endif
ALL-y += $(obj)u-boot-spl.bin
Hi Chandan, Tom,
On 01/10/12 08:38, Chandan Nath wrote:
This patch is added to support SPL feature on AM335X platform. In this patch, MMC1 is configured as boot device for SPL and support for other devices will be added in the next patch series.
Signed-off-by: Chandan Nath chandan.nath@ti.com Signed-off-by: Tom Rini trini@ti.com
This version looks much better! The only thing got into my mind while looking at it is that I would split it to some more patches instead of one big patch, as it seems that you are mixing the generalization/cleanup with the actual addition of the SPL, otherwise
Acked-by: Igor Grinberg grinberg@compulab.co.il
On 01/09/2012 11:38 PM, Chandan Nath wrote:
This patch series is submitted to add support for MMC/SD along with SPL support. Also, fixed incorrect register offset of ddr and timer registers.
The patches have been compile tested and run on AM335X EVM.
The patches depends on previous patch series which was submitted for supporting AM33xx platform.
The patches are applies on uboot master branch.
As Thomas Weber notes, this now runs on Beaglebone too so in the future please make sure to test with both platforms. Thanks. And this looks good to me so I'm just now waiting for any further comments before putting this into u-boot-ti.
participants (4)
-
Chandan Nath -
Igor Grinberg -
Thomas Weber -
Tom Rini