From 99efc91f7a3d55bcf0e839ae30c286fd08166010 Mon Sep 17 00:00:00 2001

From: Alex Waterman awaterman@dawning.com Date: Thu, 19 May 2011 15:08:36 -0400 Subject: [PATCH] NAND: Add 16bit NAND support for the NDFC

This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added:

CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register.

Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian.

The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used.

Signed-off-by: Alex Waterman awaterman@dawning.com --- README | 8 ++++++++ drivers/mtd/nand/ndfc.c | 33 +++++++++++++++++++++++++++++---- nand_spl/nand_boot.c | 11 ++++++++--- 3 files changed, 45 insertions(+), 7 deletions(-)

Changes for v2: - Changes dynamic checking of chip options field to a compile time check. Changes for v3: - Revert back to dynamic checking of chip->options in the nand_spl code.

Note: For now I just went back to dynamic checking in the nand_spl code since that is easeir. I think its worth using a preprocessor directive to do this instead but that would require some more thought. Maybe when the next release is out I can look into that but for now I don't have as much time as I would like :(.

Sorry about that, silly typo I missed because I compiled a RAM boot version of my code not a NAND version. Whoops. This new patch now passes

$ MAKEALL -v amcc

diff --git a/README b/README index 8bb9c8d..9d33a2e 100644 --- a/README +++ b/README @@ -2918,6 +2918,14 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_SRIOn_MEM_SIZE: Size of SRIO port 'n' memory region

+- CONFIG_SYS_NDFC_16 + Defined to tell the NDFC that the NAND chip is using a + 16 bit bus. + +- CONFIG_SYS_NDFC_EBC0_CFG + Sets the EBC0_CFG register for the NDFC. If not defined + a default value will be used. + - CONFIG_SPD_EEPROM Get DDR timing information from an I2C EEPROM. Common with pluggable memory modules such as SODIMMs diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index 0729e0c..6ebbb5e 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c @@ -37,6 +37,13 @@ #include <asm/io.h> #include <asm/ppc4xx.h>

+#ifndef CONFIG_SYS_NAND_BCR +#define CONFIG_SYS_NAND_BCR 0x80002222 +#endif +#ifndef CONFIG_SYS_NDFC_EBC0_CFG +#define CONFIG_SYS_NDFC_EBC0_CFG 0xb8400000 +#endif + /* * We need to store the info, which chip-select (CS) is used for the * chip number. For example on Sequoia NAND chip #0 uses @@ -140,12 +147,25 @@ static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len

return 0; } -#endif /* #ifndef CONFIG_NAND_SPL */

-#ifndef CONFIG_SYS_NAND_BCR -#define CONFIG_SYS_NAND_BCR 0x80002222 +/* + * Read a byte from the NDFC. + */ +static uint8_t ndfc_read_byte(struct mtd_info *mtd) +{ + + struct nand_chip *chip = mtd->priv; + +#ifdef CONFIG_SYS_NDFC_16BIT + return (uint8_t) readw(chip->IO_ADDR_R); +#else + return readb(chip->IO_ADDR_R); #endif

+} + +#endif /* #ifndef CONFIG_NAND_SPL */ + void board_nand_select_device(struct nand_chip *nand, int chip) { /* @@ -198,16 +218,21 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.bytes = 3; nand->select_chip = ndfc_select_chip;

+#ifdef CONFIG_SYS_NDFC_16BIT + nand->options |= NAND_BUSWIDTH_16; +#endif + #ifndef CONFIG_NAND_SPL nand->write_buf = ndfc_write_buf; nand->verify_buf = ndfc_verify_buf; + nand->read_byte = ndfc_read_byte;

chip++; #else /* * Setup EBC (CS0 only right now) */ - mtebc(EBC0_CFG, 0xb8400000); + mtebc(EBC0_CFG, CONFIG_SYS_NDFC_EBC0_CFG);

mtebc(PB0CR, CONFIG_SYS_EBC_PB0CR); mtebc(PB0AP, CONFIG_SYS_EBC_PB0AP); diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index 9545a9a..4683c7c 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -122,10 +122,15 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block) nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);

/* - * Read one byte + * Read one byte (or two if it's a 16 bit chip). */ - if (readb(this->IO_ADDR_R) != 0xff) - return 1; + if (this->options & NAND_BUSWIDTH_16) { + if (readw(this->IO_ADDR_R) != 0xffff) + return 1; + } else { + if (readb(this->IO_ADDR_R) != 0xff) + return 1; + }

return 0; }