[U-Boot] [PATCH 0/5] sh4: fixes to SH7751 PCI host controller
This series fixes 2 bugs found in SH7751 PCI host controller driver, also it restores r2dplus defconfig and slightly simplifies the code related to the SH7751 PCI controller, more improvements may follow in future.
The change is independent on the following conversion to generic board, however it adds some bits to simplify porting of r2dplus board by moving board specific CONFIG_SYS_TEXT_BASE into P1 area,
Before the change even if rtl8139 driver is selected in a defconfig the device was unusable due to invalid phys to bus mapping (e.g. test with 'dhcp' command shows it), this most probably was caused by some unnoticed generic change in PCI driver framework, however now it is fixed by the series.
Vladimir Zapolskiy (5): sh4: pci: fix up PCI I/O space address pci: sh7751: map PCI memory space into SDRAM sh4: remove __io config options from r2dplus and r7780mp boards r2dplus: use P1 area space for text base and PCI system memory r2dplus: select rtl8139 driver in defconfig
arch/sh/include/asm/io.h | 10 ---------- configs/r2dplus_defconfig | 2 ++ drivers/pci/pci_sh7751.c | 12 +++++------- include/configs/r2dplus.h | 11 +++++------ include/configs/r7780mp.h | 1 - 5 files changed, 12 insertions(+), 24 deletions(-)
The change actually maps PCI I/O window to the same address on PCI bus as it is stated by a comment, before the change transfers to the PCI I/O space are failed due to misconfiguration of the most significant 14 bits of the PCI address in PCIIOBR (note that it is set to 0x0).
Most probably the problem remained unnoticed, because communcation to all tested PCI devices is done over PCI memory space only.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- drivers/pci/pci_sh7751.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index f189ed8..420ae81 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -164,7 +164,7 @@ int pci_sh7751_init(struct pci_controller *hose) p4_out(SH7751_PCI_MEM_BASE, SH7751_PCIMBR);
/* Map IO window to same address on PCI bus */ - p4_out(0x2000 & 0xfffc0000, SH7751_PCIIOBR); + p4_out(SH7751_PCI_IO_BASE, SH7751_PCIIOBR);
/* set BREQEN */ p4_out(inl(SH7751_BCR1) | 0x00080000, SH7751_BCR1);
For ease of use and accounting a condition that on SH4 pci_phys_to_bus() and pci_bus_to_phys() are one in one mappings due to unimplemented __iomem() conversion, this change fixes access to SDRAM memory by PCI devices.
This change also generalizes PCI system memory configuration, which is taken from board specific defines rather than hardcoded in the PCI host driver.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- drivers/pci/pci_sh7751.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index 420ae81..8a50445 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -66,9 +66,6 @@ #define SH7751_PCI_IO_BASE 0xFE240000 #define SH7751_PCI_IO_SIZE 0x00040000
-#define SH7751_CS3_BASE_ADDR 0x0C000000 -#define SH7751_P2CS3_BASE_ADDR 0xAC000000 - #define SH7751_PCIPAR (vu_long *)0xFE2001C0 #define SH7751_PCIPDR (vu_long *)0xFE200220
@@ -153,11 +150,12 @@ int pci_sh7751_init(struct pci_controller *hose)
/* Set up target memory mappings (for external DMA access) */ /* Map both P0 and P2 range to Area 3 RAM for ease of use */ - p4_out((64 - 1) << 20, SH7751_PCILSR0); - p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCILAR0); + p4_out(CONFIG_SYS_SDRAM_SIZE - 0x100000, SH7751_PCILSR0); + p4_out(CONFIG_SYS_SDRAM_BASE & 0x1FF00000, SH7751_PCILAR0); + p4_out(CONFIG_SYS_SDRAM_BASE & 0xFFF00000, SH7751_PCICONF5); + p4_out(0, SH7751_PCILSR1); p4_out(0, SH7751_PCILAR1); - p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCICONF5); p4_out(0xd0000000, SH7751_PCICONF6);
/* Map memory window to same address on PCI bus */
Defined __io is no-op for the SH architecture and it can be removed from board files without any functional change.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- arch/sh/include/asm/io.h | 10 ---------- include/configs/r2dplus.h | 1 - include/configs/r7780mp.h | 1 - 3 files changed, 12 deletions(-)
diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 5dc27be..5cb000c 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -68,13 +68,6 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen); #define __raw_base_readl(base, off) __arch_base_getl(base, off)
/* - * Now, pick up the machine-defined IO definitions - */ -#if 0 /* XXX###XXX */ -#include <asm/arch/io.h> -#endif /* XXX###XXX */ - -/* * IO port access primitives * ------------------------- * @@ -82,9 +75,6 @@ extern void __raw_readsl(unsigned int addr, void *data, int longlen); * mapped. Note that these are defined to perform little endian accesses * only. Their primary purpose is to access PCI and ISA peripherals. * - * The machine specific io.h include defines __io to translate an "IO" - * address to a memory address. - * * Note that we prevent GCC re-ordering or caching values in expressions * by introducing sequence points into the in*() definitions. Note that * __raw_* do not guarantee this behaviour. diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 1fc919b..4d51a0c 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -93,7 +93,6 @@ #define CONFIG_SH7751_PCI #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 -#define __io #define __mem_pci
#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ diff --git a/include/configs/r7780mp.h b/include/configs/r7780mp.h index bc01ae9..7b1625c 100644 --- a/include/configs/r7780mp.h +++ b/include/configs/r7780mp.h @@ -102,7 +102,6 @@ #define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW 1 -#define __io #define __mem_pci
#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
While both options are acceptable use P1 area physical addresses instead of external memory space of text base and PCI system memory for unification purposes, all other supported superh boards have the same selection.
This allows to easily ensure that CONFIG_SYS_TEXT_BASE is located within available DRAM.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- include/configs/r2dplus.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h index 4d51a0c..d9b116a 100644 --- a/include/configs/r2dplus.h +++ b/include/configs/r2dplus.h @@ -26,10 +26,10 @@ #define CONFIG_ENV_OVERWRITE 1
/* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE (0x8C000000) -#define CONFIG_SYS_SDRAM_SIZE (0x04000000) +#define CONFIG_SYS_SDRAM_BASE 0x8C000000 +#define CONFIG_SYS_SDRAM_SIZE 0x04000000
-#define CONFIG_SYS_TEXT_BASE 0x0FFC0000 +#define CONFIG_SYS_TEXT_BASE 0x8FFC0000 #define CONFIG_SYS_LONGHELP #define CONFIG_SYS_CBSIZE 256 #define CONFIG_SYS_PBSIZE 256 @@ -101,8 +101,8 @@ #define CONFIG_PCI_IO_BUS 0xFE240000 /* IO space base address */ #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS #define CONFIG_PCI_IO_SIZE 0x00040000 /* Size of IO window */ -#define CONFIG_PCI_SYS_BUS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) -#define CONFIG_PCI_SYS_PHYS (CONFIG_SYS_SDRAM_BASE & 0x1fffffff) +#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE #define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
#endif /* __CONFIG_H */
CONFIG_RTL8139 was moved to a board defconfig by a commit 86e9dc86b1a2 ("net: Move CONFIG_RTL8139 to Kconfig"), however it was done incorrectly due to a missing CONFIG_NETDEVICES selection, thus virtually it was just a removal of the driver compilation.
As an unlucky consequence the option was completely removed by a purge commit adad96e60d0e ("configs: Re-sync HUSH options"), restore the driver inclusion back.
Signed-off-by: Vladimir Zapolskiy vz@mleia.com --- configs/r2dplus_defconfig | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/configs/r2dplus_defconfig b/configs/r2dplus_defconfig index 1c1e304..e7e420c 100644 --- a/configs/r2dplus_defconfig +++ b/configs/r2dplus_defconfig @@ -5,4 +5,6 @@ CONFIG_BOOTDELAY=-1 CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y +CONFIG_NETDEVICES=y +CONFIG_RTL8139=y CONFIG_USE_PRIVATE_LIBGCC=y
participants (1)
-
Vladimir Zapolskiy