From: Wig Cheng wig.cheng@technexion.com

- Remove pinmux definition from pico-imx6ul.c - Enable NET_RANDOM_ETHADDR for temporary solution, because micrel_ksz8xxx driver does not support DM_ETH yet, so cannot read MAC address directly.

Before enable DM_ETH: Net: FEC [PRIME]

After enable DM_ETH: Net: Warning: using random MAC address - ca:3f:43:8f:67:d4 eth1: ethernet@20b4000

Here is the test commands: => dhcp BOOTP broadcast 1 DHCP client bound to address 10.88.88.94 (139 ms) *** ERROR: `serverip' not set Cannot autoload with TFTPGET => ping 8.8.8.8 Using ethernet@20b4000 device host 8.8.8.8 is alive

Signed-off-by: Wig Cheng wig.cheng@technexion.com --- board/technexion/pico-imx6ul/pico-imx6ul.c | 53 ---------------------- configs/pico-imx6ul_defconfig | 2 + 2 files changed, 2 insertions(+), 53 deletions(-)

diff --git a/board/technexion/pico-imx6ul/pico-imx6ul.c b/board/technexion/pico-imx6ul/pico-imx6ul.c index 5d6be26faa..126823fce0 100644 --- a/board/technexion/pico-imx6ul/pico-imx6ul.c +++ b/board/technexion/pico-imx6ul/pico-imx6ul.c @@ -18,7 +18,6 @@ #include <asm/io.h> #include <common.h> #include <miiphy.h> -#include <netdev.h> #include <linux/delay.h> #include <linux/sizes.h> #include <usb.h> @@ -39,61 +38,9 @@ DECLARE_GLOBAL_DATA_PTR; #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST | PAD_CTL_ODE)

-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ - PAD_CTL_SPEED_HIGH | \ - PAD_CTL_DSE_48ohm | PAD_CTL_SRE_FAST) - -#define ENET_CLK_PAD_CTRL (PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)

-#define RMII_PHY_RESET IMX_GPIO_NR(1, 28) - -static iomux_v3_cfg_t const fec_pads[] = { - MX6_PAD_ENET1_TX_EN__ENET2_MDC | MUX_PAD_CTRL(MDIO_PAD_CTRL), - MX6_PAD_ENET1_TX_DATA1__ENET2_MDIO | MUX_PAD_CTRL(MDIO_PAD_CTRL), - MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_TX_DATA1__ENET2_TDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(ENET_CLK_PAD_CTRL), - MX6_PAD_ENET2_TX_EN__ENET2_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_DATA0__ENET2_RDATA00 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_DATA1__ENET2_RDATA01 | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_EN__ENET2_RX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_ENET2_RX_ER__ENET2_RX_ER | MUX_PAD_CTRL(ENET_PAD_CTRL), - MX6_PAD_UART4_TX_DATA__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), -}; - -static void setup_iomux_fec(void) -{ - imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads)); -} - -int board_eth_init(struct bd_info *bis) -{ - setup_iomux_fec(); - - gpio_request(RMII_PHY_RESET, "enet_phy_reset"); - gpio_direction_output(RMII_PHY_RESET, 0); - /* - * According to KSZ8081MNX-RNB manual: - * For warm reset, the reset (RST#) pin should be asserted low for a - * minimum of 500μs. The strap-in pin values are read and updated - * at the de-assertion of reset. - */ - udelay(500); - - gpio_direction_output(RMII_PHY_RESET, 1); - /* - * According to KSZ8081MNX-RNB manual: - * After the de-assertion of reset, wait a minimum of 100μs before - * starting programming on the MIIM (MDC/MDIO) interface. - */ - udelay(100); - - return fecmxc_initialize(bis); -} - static int setup_fec(void) { struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig index 7f7a9f7a24..f95923aba0 100644 --- a/configs/pico-imx6ul_defconfig +++ b/configs/pico-imx6ul_defconfig @@ -44,6 +44,7 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y CONFIG_DFU_MMC=y CONFIG_USB_FUNCTION_FASTBOOT=y CONFIG_FASTBOOT_BUF_SIZE=0x10000000 @@ -57,6 +58,7 @@ CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ8XXX=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y