[PATCH v1 0/3] Arm: npcm: modify npcm8xx boot setting
Modify npcm8xx new boot design. Correct memory setting and set gpio default value.
Jim Liu (2): board: arbel: correct the dram bank size configs: arbel_evb: change env offset and boot address
Stanley Chu (1): pinctrl: npcm8xx: clear all gpio events
board/nuvoton/arbel_evb/arbel_evb.c | 8 ++++++-- configs/arbel_evb_defconfig | 4 ++-- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 18 ++++++++++++++++++ include/configs/arbel.h | 2 +- 4 files changed, 27 insertions(+), 5 deletions(-)
If CONFIG_SYS_MEM_TOP_HIDE is defined, gd->ram_size is reduced by CONFIG_SYS_MEM_TOP_HIDE. Need to correct the actual ram size in dram_init_banksize.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- board/nuvoton/arbel_evb/arbel_evb.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/board/nuvoton/arbel_evb/arbel_evb.c b/board/nuvoton/arbel_evb/arbel_evb.c index 1f519219e7..55e93a77f0 100644 --- a/board/nuvoton/arbel_evb/arbel_evb.c +++ b/board/nuvoton/arbel_evb/arbel_evb.c @@ -59,17 +59,21 @@ int dram_init(void)
int dram_init_banksize(void) { + phys_size_t ram_size = gd->ram_size;
gd->bd->bi_dram[0].start = 0;
- switch (gd->ram_size) { + #if defined(CONFIG_SYS_MEM_TOP_HIDE) + ram_size += CONFIG_SYS_MEM_TOP_HIDE; + #endif + switch (ram_size) { case DRAM_512MB_ECC_SIZE: case DRAM_512MB_SIZE: case DRAM_1GB_ECC_SIZE: case DRAM_1GB_SIZE: case DRAM_2GB_ECC_SIZE: case DRAM_2GB_SIZE: - gd->bd->bi_dram[0].size = gd->ram_size; + gd->bd->bi_dram[0].size = ram_size; gd->bd->bi_dram[1].start = 0; gd->bd->bi_dram[1].size = 0; break;
Change env offset and boot address for new design.
Signed-off-by: Jim Liu JJLIU0@nuvoton.com --- configs/arbel_evb_defconfig | 4 ++-- include/configs/arbel.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 08753aebc0..9983d3a58b 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -7,7 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x06208000 CONFIG_ENV_SIZE=0x40000 -CONFIG_ENV_OFFSET=0x3C0000 +CONFIG_ENV_OFFSET=0x7C0000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm845-evb" @@ -17,7 +17,7 @@ CONFIG_ARCH_NPCM8XX=y CONFIG_SYS_SKIP_UART_INIT=y CONFIG_TARGET_ARBEL_EVB=y CONFIG_SYS_LOAD_ADDR=0x06208000 -CONFIG_ENV_ADDR=0x803C0000 +CONFIG_ENV_ADDR=0x807C0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SYS_BOOTM_LEN=0x1400000 diff --git a/include/configs/arbel.h b/include/configs/arbel.h index 61f6a5e243..b5f684e88f 100644 --- a/include/configs/arbel.h +++ b/include/configs/arbel.h @@ -16,7 +16,7 @@ { 9600, 14400, 19200, 38400, 57600, 115200, 230400, 380400, 460800, 921600 }
/* Default environemnt variables */ -#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80400000\0" \ +#define CFG_EXTRA_ENV_SETTINGS "uimage_flash_addr=80800000\0" \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \
From: Stanley Chu yschu@nuvoton.com
Clear all gpio events to avoid unexpected interrupts during kernel booting.
Signed-off-by: Stanley Chu yschu@nuvoton.com --- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index ff49819b58..67e564f85c 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -48,6 +48,7 @@ #define GPIO_OES 0x70 /* Output Enable Set */ #define GPIO_OEC 0x74 /* Output Enable Clear */
+#define NPCM8XX_NUM_GPIO_BANK 8 #define NPCM8XX_GPIO_PER_BANK 32 #define GPIOX_OFFSET 16
@@ -967,6 +968,18 @@ static int npcm8xx_pinconf_set(struct udevice *dev, unsigned int selector, } #endif
+static void npcm8xx_pinctrl_clear_events(struct npcm8xx_pinctrl_priv *priv) +{ + void __iomem *base; + int i; + + for (i = 0; i < NPCM8XX_NUM_GPIO_BANK; i++) { + base = priv->gpio_base + (0x1000 * i); + clrbits_le32(base + GPIO_EVEN, 0xFFFFFFFF); + setbits_le32(base + GPIO_EVST, 0xFFFFFFFF); + } +} + static struct pinctrl_ops npcm8xx_pinctrl_ops = { .set_state = pinctrl_generic_set_state, .get_pins_count = npcm8xx_get_pins_count, @@ -1001,6 +1014,11 @@ static int npcm8xx_pinctrl_probe(struct udevice *dev) if (IS_ERR(priv->rst_regmap)) return -EINVAL;
+ /* + * Clear all previous gpio events, otherwise it may produce + * unexpected interrupts during kernel booting. + */ + npcm8xx_pinctrl_clear_events(priv); return 0; }
On Wed, 04 Sep 2024 10:41:03 +0800, Jim Liu wrote:
Modify npcm8xx new boot design. Correct memory setting and set gpio default value.
Jim Liu (2): board: arbel: correct the dram bank size configs: arbel_evb: change env offset and boot address
[...]
Applied to u-boot/next, thanks!
participants (2)
-
Jim Liu -
Tom Rini