[U-Boot] [PATCH 0/4] imx6: Engicam i.CoreM6 eMMC boot support
From: Jagan Teki jagan@amarulasolutions.com
This series support boot from eMMC on Engicam i.CoreM6 QDL boards.
i.CoreM6 QDL boards, support both eSD and eMMC this patch-set add eMMC support from SPL. but the issue is - SD card (eSD) is not detecting when booting from eMMC but - SD card along with eMMC is able to detect while booting from eSD
If any one tried this please help.
Log: --- U-Boot SPL 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16) Trying to boot from MMC2
U-Boot 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16 +0100)
CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 mmc_init: -70, time 38 *** Warning - MMC init failed, using default environment
In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl-rqs> icorem6qdl-rqs> mmc dev 0 mmc_init: -70, time 38 icorem6qdl-rqs> mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device icorem6qdl-rqs> mmcinfo Device: FSL_SDHC Manufacturer ID: fe OEM: 14e Name: MMC04 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.4.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 4-bit Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH icorem6qdl-rqs>
Jagan Teki (4): arm: dts: imx6qdl-icore-rqs: Add eMMC node imx6: Add imx6_src_get_boot_mode imx6: icorem6_rqs: Update SPL board boot order for mmc imx6: icorem6_rqs: Add eMMC boot support
arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++++++++++ arch/arm/imx-common/init.c | 22 ++++++++++++++ arch/arm/imx-common/spl.c | 6 ++-- arch/arm/include/asm/arch-mx6/sys_proto.h | 5 ++++ board/engicam/icorem6_rqs/MAINTAINERS | 1 + board/engicam/icorem6_rqs/icorem6_rqs.c | 50 +++++++++++++++++++++++++++++-- configs/imx6q_icore_rqs_emmc_defconfig | 38 +++++++++++++++++++++++ include/configs/imx6qdl_icore_rqs.h | 2 +- 8 files changed, 140 insertions(+), 6 deletions(-) create mode 100644 configs/imx6q_icore_rqs_emmc_defconfig
Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules.
eMMC Log: -------- icorem6qdl-rqs> mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device icorem6qdl-rqs> mmcinfo Device: FSL_SDHC Manufacturer ID: fe OEM: 14e Name: MMC04 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.4.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 4-bit Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/dts/imx6qdl-icore-rqs.dtsi index 750229b..8b9d5b4 100644 --- a/arch/arm/dts/imx6qdl-icore-rqs.dtsi +++ b/arch/arm/dts/imx6qdl-icore-rqs.dtsi @@ -107,6 +107,13 @@ status = "okay"; };
+&usdhc4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc4>; + no-1-8-v; + status = "okay"; +}; + &iomuxc { pinctrl_enet: enetgrp { fsl,pins = < @@ -167,4 +174,19 @@ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070 >; }; + + pinctrl_usdhc4: usdhc4grp { + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070 + >; + }; };
For i.MX6, the bootmode determine code is part of spl_boot_device, but there is might be a possibility for other part the code need to check the desired boot mode for adding new functionalities like modeboot env variable, or changing boot order etc.
So introduced imx6_src_get_boot_mode which actually reading the boot mode register for desired modes.
More cleanup will be add in future patches.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@openedev.com --- arch/arm/imx-common/init.c | 22 ++++++++++++++++++++++ arch/arm/imx-common/spl.c | 6 +++--- arch/arm/include/asm/arch-mx6/sys_proto.h | 5 +++++ 3 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/arch/arm/imx-common/init.c b/arch/arm/imx-common/init.c index e5dbd93..986c0d0 100644 --- a/arch/arm/imx-common/init.c +++ b/arch/arm/imx-common/init.c @@ -115,3 +115,25 @@ void boot_mode_apply(unsigned cfg_val) writel(reg, &psrc->gpr10); } #endif + +#if defined(CONFIG_MX6) +bool inline is_boot_device_from_gpr9(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + bool val; + + val = readl(&psrc->gpr10) & IMX6_SRC_GPR10_BMODE; + + return val; +} + +u32 imx6_src_get_boot_mode(void) +{ + struct src *psrc = (struct src *)SRC_BASE_ADDR; + + if (is_boot_device_from_gpr9()) + return readl(&psrc->gpr9); + else + return readl(&psrc->sbmr1); +} +#endif diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index c86b6f8..950c70d 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -10,6 +10,7 @@ #include <common.h> #include <asm/io.h> #include <asm/arch/imx-regs.h> +#include <asm/arch/sys_proto.h> #include <asm/spl.h> #include <spl.h> #include <asm/imx-common/hab.h> @@ -19,16 +20,15 @@ u32 spl_boot_device(void) { struct src *psrc = (struct src *)SRC_BASE_ADDR; - unsigned int gpr10_boot = readl(&psrc->gpr10) & (1 << 28); - unsigned reg = gpr10_boot ? readl(&psrc->gpr9) : readl(&psrc->sbmr1); unsigned int bmode = readl(&psrc->sbmr2); + u32 reg = imx6_src_get_boot_mode();
/* * Check for BMODE if serial downloader is enabled * BOOT_MODE - see IMX6DQRM Table 8-1 */ if ((((bmode >> 24) & 0x03) == 0x01) || /* Serial Downloader */ - (gpr10_boot && (reg == 1))) + (is_boot_device_from_gpr9() && (reg == 1))) return BOOT_DEVICE_UART; /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */ switch ((reg & 0x000000FF) >> 4) { diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 16c9b76..868f668 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -6,3 +6,8 @@ */
#include <asm/imx-common/sys_proto.h> + +#define IMX6_SRC_GPR10_BMODE BIT(28) + +bool is_boot_device_from_gpr9(void); +u32 imx6_src_get_boot_mode(void);
SPL mmc device index is get based on the boot device, like - BOOT_DEVICE_MMC1 for mmc device 0 - BOOT_DEVICE_MMC2 for mmc device 1
Currently BOOT_DEVICE_MMC1 is setting both SD/eSD and MMC/eMMC boot devices in i.MX, So u-boot is loading from mmc device 0 even "if the board booting from SD/eSD or MMC/eMMC"
So, this patch set BOOT_DEVICE_MMC2 for MMC/eMMC so for MMC/eMMC the u-boot is loading from mmc device 1 and the board file need to take care if the board have different mmc device order intialization.
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/icorem6_rqs.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+)
diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index 2769177..fc602a1 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -125,6 +125,32 @@ int board_mmc_init(bd_t *bis)
return 0; } + +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & 0x000000FF) >> 4) { + case 0x4: + case 0x5: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case 0x6: + case 0x7: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif #endif
/*
From: Jagan Teki jagan@amarulasolutions.com
Boot from eMMC: -------------- U-Boot SPL 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16) Trying to boot from MMC2
U-Boot 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16 +0100)
CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 mmc_init: -70, time 38 *** Warning - MMC init failed, using default environment
In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl-rqs>
Cc: Stefano Babic sbabic@denx.de Cc: Matteo Lisi matteo.lisi@engicam.com Cc: Michael Trimarchi michael@amarulasolutions.com Signed-off-by: Jagan Teki jagan@amarulasolutions.com --- board/engicam/icorem6_rqs/MAINTAINERS | 1 + board/engicam/icorem6_rqs/icorem6_rqs.c | 24 +++++++++++++++++++-- configs/imx6q_icore_rqs_emmc_defconfig | 38 +++++++++++++++++++++++++++++++++ include/configs/imx6qdl_icore_rqs.h | 2 +- 4 files changed, 62 insertions(+), 3 deletions(-) create mode 100644 configs/imx6q_icore_rqs_emmc_defconfig
diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS index 0556211..25ac83f 100644 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ b/board/engicam/icorem6_rqs/MAINTAINERS @@ -4,4 +4,5 @@ S: Maintained F: board/engicam/icorem6_rqs F: include/configs/imx6qdl_icore_rqs.h F: configs/imx6q_icore_rqs_mmc_defconfig +F: configs/imx6q_icore_rqs_emmc_defconfig F: configs/imx6dl_icore_rqs_mmc_defconfig diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index fc602a1..31a910c 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -77,8 +77,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), };
-struct fsl_esdhc_cfg usdhc_cfg[1] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR, 1, 4}, + {USDHC4_BASE_ADDR, 1, 8}, };
int board_mmc_getcd(struct mmc *mmc) @@ -88,6 +102,7 @@ int board_mmc_getcd(struct mmc *mmc)
switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: + case USDHC4_BASE_ADDR: ret = 1; break; } @@ -102,7 +117,8 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) - * mmc0 USDHC3 + * mmc0 USDHC3 + * mmc1 USDHC4 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -110,6 +126,10 @@ int board_mmc_init(bd_t *bis) SETUP_IOMUX_PADS(usdhc3_pads); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; + case 1: + SETUP_IOMUX_PADS(usdhc4_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/configs/imx6q_icore_rqs_emmc_defconfig b/configs/imx6q_icore_rqs_emmc_defconfig new file mode 100644 index 0000000..fc54b5a --- /dev/null +++ b/configs/imx6q_icore_rqs_emmc_defconfig @@ -0,0 +1,38 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6Q_ICORE_RQS=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6q-icore-rqs.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="icorem6qdl-rqs> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 6f7195d..cd94c5f 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -124,7 +124,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif
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Jagan Teki