[PATCH 0/2] imx8m: introduce high speed mode support in usdhc
This patch series is targeted to address issues that can be observed with various sd cards connected to i.MX8M derivatives.
Current configuration of usdhc dts nodes for imx8m SOC derivatives does experience issues with recognition and mode switch for various sd card types from different manufacturers, sometimes leading to an abrupted boot process, either during attempt to load kernel image from attached media or failure to recognize the sd card when switch to higher speed mode is performed.
Modifications in patches introduced are aimed to resolve those issue by introducing a short delay when mode switch in attempted, and enabling high speed mode quirks for all imx8m derivatives.
Andrey Zhizhikin (2): ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator ARM: dts: imx8m: add UHS or HS400/HS400ES properties
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 8 ++++++++ arch/arm/dts/imx8mq-evk.dts | 4 ++++ arch/arm/dts/imx8mq-phanbell.dts | 1 + 8 files changed, 39 insertions(+)
base-commit: 0719bf42931033c3109ecc6357e8adb567cb637b
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de --- arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 1 + arch/arm/dts/imx8mq-phanbell.dts | 1 + 6 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + ®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 55294ba9c8..9663683f69 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -39,6 +39,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; + u-boot,off-on-delay-us = <20000>; };
buck2_reg: regulator-buck2 { diff --git a/arch/arm/dts/imx8mq-phanbell.dts b/arch/arm/dts/imx8mq-phanbell.dts index 4892ad5ee1..bc6b2638ee 100644 --- a/arch/arm/dts/imx8mq-phanbell.dts +++ b/arch/arm/dts/imx8mq-phanbell.dts @@ -34,6 +34,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; + u-boot,off-on-delay-us = <20000>; }; };
On Tue, Dec 1, 2020 at 1:31 PM Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com wrote:
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 1 + arch/arm/dts/imx8mq-phanbell.dts | 1 + 6 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;+};
&fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;+};
&pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;+};
&pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>;+};
®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 55294ba9c8..9663683f69 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -39,6 +39,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>;
These should be going in the -u-boot.dtsi like the devices above. Why the two different ways of doing it? Also if all devices based on the imx8m[mnpq ] need this change it might be better putting it in the imx8m[mnpq]-u-boot.dtsi so any new boards that get added, like the recently posted imx8mm IoT Gate automatically benefit from this fix.
}; buck2_reg: regulator-buck2 {diff --git a/arch/arm/dts/imx8mq-phanbell.dts b/arch/arm/dts/imx8mq-phanbell.dts index 4892ad5ee1..bc6b2638ee 100644 --- a/arch/arm/dts/imx8mq-phanbell.dts +++ b/arch/arm/dts/imx8mq-phanbell.dts @@ -34,6 +34,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>; };};
-- 2.17.1
Hello Peter,
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Wednesday, December 2, 2020 9:45 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: u-boot@lists.denx.de; sbabic@denx.de Subject: Re: [PATCH 1/2] ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator
On Tue, Dec 1, 2020 at 1:31 PM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 1 + arch/arm/dts/imx8mq-phanbell.dts | 1 + 6 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 55294ba9c8..9663683f69 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -39,6 +39,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>;These should be going in the -u-boot.dtsi like the devices above. Why the two different ways of doing it?
imx8mq-evk-u-boot.dtsi is not provided in the source tree. Do you suggest I should create one and move those bindings there?
Also if all devices based on the imx8m[mnpq ] need this change it might be better putting it in the imx8m[mnpq]-u-boot.dtsi so any new boards that get added, like the recently posted imx8mm IoT Gate automatically benefit from this fix.
This might depend on the layout of the particular board. Some boards might include additional HW components to aid in solving sd card interface power cycle issue.
Introducing an additional delay for those boards which had this resolved in the layout might not be advisable, therefore I believe that target board vendors can decide for themselves if this fix is applicable to them.
Nevertheless, it is a good point: I was planning to propose Compulab to have a look at this patch as well to identify if this applies to their new IoT Gateway device as I saw patches from them yesterday on the list. Was just waiting for a general feedback on the patch itself.
}; buck2_reg: regulator-buck2 {diff --git a/arch/arm/dts/imx8mq-phanbell.dts b/arch/arm/dts/imx8mq-phanbell.dts index 4892ad5ee1..bc6b2638ee 100644 --- a/arch/arm/dts/imx8mq-phanbell.dts +++ b/arch/arm/dts/imx8mq-phanbell.dts @@ -34,6 +34,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>; };};
-- 2.17.1
Regards, Andrey
On Wed, Dec 2, 2020 at 10:08 AM ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com wrote:
Hello Peter,
-----Original Message----- From: Peter Robinson pbrobinson@gmail.com Sent: Wednesday, December 2, 2020 9:45 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: u-boot@lists.denx.de; sbabic@denx.de Subject: Re: [PATCH 1/2] ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator
On Tue, Dec 1, 2020 at 1:31 PM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 1 + arch/arm/dts/imx8mq-phanbell.dts | 1 + 6 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };&pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc {
u-boot,off-on-delay-us = <20000>; };®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 55294ba9c8..9663683f69 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -39,6 +39,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>;These should be going in the -u-boot.dtsi like the devices above. Why the two different ways of doing it?
imx8mq-evk-u-boot.dtsi is not provided in the source tree. Do you suggest I should create one and move those bindings there?
Yes, often the dts files are synced from Linux for various devices, anything U-Boot specific should be in a -u-boot.dtsi so it's either not lost or easily found what the deltra there is.
Also if all devices based on the imx8m[mnpq ] need this change it might be better putting it in the imx8m[mnpq]-u-boot.dtsi so any new boards that get added, like the recently posted imx8mm IoT Gate automatically benefit from this fix.
This might depend on the layout of the particular board. Some boards might include additional HW components to aid in solving sd card interface power cycle issue.
Introducing an additional delay for those boards which had this resolved in the layout might not be advisable, therefore I believe that target board vendors can decide for themselves if this fix is applicable to them.
Nevertheless, it is a good point: I was planning to propose Compulab to have a look at this patch as well to identify if this applies to their new IoT Gateway device as I saw patches from them yesterday on the list. Was just waiting for a general feedback on the patch itself.
}; buck2_reg: regulator-buck2 {diff --git a/arch/arm/dts/imx8mq-phanbell.dts b/arch/arm/dts/imx8mq-phanbell.dts index 4892ad5ee1..bc6b2638ee 100644 --- a/arch/arm/dts/imx8mq-phanbell.dts +++ b/arch/arm/dts/imx8mq-phanbell.dts @@ -34,6 +34,7 @@ regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high;
u-boot,off-on-delay-us = <20000>; };};
-- 2.17.1
Regards, Andrey
Some SD Card controller and power circuitry has increased capacitance, which keeps the internal logic remains powered after regulator is switch off. This is generally the case when card is switched to SD104 mode, where a power cycle should be performed. In case if the card internal logic remains powered, it causes a subsequent failure of mode transition, effectively leading to failed enumeration.
Introduce a delay of 20 msec in order to provide a possibility for internal card circuitry to drain voltages and perform a power cycle correctly.
Similar fix is done in commit c49d0ac38a76 ("ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator") targeted Renesas SOCs.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de --- Changes in v2: - Moved u-boot binding for imx8mq-evk and imx8mq-phanbell to separate autoincluded dtsi files
arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 5 +++++ arch/arm/dts/imx8mq-phanbell-u-boot.dtsi | 5 +++++ 6 files changed, 26 insertions(+) create mode 100644 arch/arm/dts/imx8mq-evk-u-boot.dtsi create mode 100644 arch/arm/dts/imx8mq-phanbell-u-boot.dtsi
diff --git a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi index fc1aebb2fe..6d80a529ae 100644 --- a/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-beacon-kit-u-boot.dtsi @@ -37,6 +37,10 @@ /delete-property/ assigned-clock-rates; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &fec1 { phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index b5c12105a9..9f77d3c6ff 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -46,6 +46,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_reg_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 4419679d4c..98b0b9891b 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -47,6 +47,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + &pinctrl_uart2 { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 24a93ac2d6..2452e9175c 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -48,6 +48,10 @@ u-boot,dm-spl; };
+®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; + ®_usdhc2_vmmc { u-boot,dm-spl; }; diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi new file mode 100644 index 0000000000..4712cf6a44 --- /dev/null +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +}; diff --git a/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi new file mode 100644 index 0000000000..4712cf6a44 --- /dev/null +++ b/arch/arm/dts/imx8mq-phanbell-u-boot.dtsi @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +®_usdhc2_vmmc { + u-boot,off-on-delay-us = <20000>; +};
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com --- arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio; + u-boot,mmc-hs400-1_8v; status = "okay"; };
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; status = "okay"; };
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com --- Changes in v2: - Moved u-boot binding for imx8mq-evk to separate autoincluded dtsi files
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 9 +++++++++ 6 files changed, 27 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; };
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; }; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl; + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; };
&usdhc3 { u-boot,dm-spl; + u-boot,mmc-hs400-1_8v; + u-boot,mmc-hs400-enhanced-strobe; };
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk-u-boot.dtsi index 4712cf6a44..d0fc64c433 100644 --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -3,3 +3,12 @@ ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; + +&usdhc1 { + u-boot,mmc-hs400-1_8v; +}; + +&usdhc2 { + u-boot,sd-uhs-sdr104; + u-boot,sd-uhs-ddr50; +};
Hello,
I've realized that this patch contains wrong bindings, "u-boot," prefix should be dropped.
Also, configuration values to enable high speed modes in eSDHC are missing from defconfigs - those has to be added as well.
Would sent a V3 for this series, please hold the review of this one.
Sorry for the miss and noise.
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Andrey Zhizhikin Sent: Wednesday, December 2, 2020 7:01 PM To: u-boot@lists.denx.de Cc: Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: [PATCH v2 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
This email is not from Hexagon’s Office 365 instance. Please be careful while clicking links, opening attachments, or replying to this email.
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
Changes in v2:
- Moved u-boot binding for imx8mq-evk to separate autoincluded dtsi files
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp- mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk-u-boot.dtsi | 9 +++++++++ 6 files changed, 27 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl- imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl- imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk- u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn- ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk- u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk-u-boot.dtsi b/arch/arm/dts/imx8mq-evk- u-boot.dtsi index 4712cf6a44..d0fc64c433 100644 --- a/arch/arm/dts/imx8mq-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mq-evk-u-boot.dtsi @@ -3,3 +3,12 @@ ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; };
+&usdhc1 {
u-boot,mmc-hs400-1_8v;+};
+&usdhc2 {
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;+};
2.17.1
-- andrey
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this. I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 1:43 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series: https://lists.denx.de/pipermail/u-boot/2020-December/434159.html
Thanks a lot for testing it though!
I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for imx8mm-beacon-kit.
As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files then.
Would there be any objections here?
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
-- andrey
On Sat, Dec 5, 2020 at 8:21 AM ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com wrote:
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 1:43 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series: https://lists.denx.de/pipermail/u-boot/2020-December/434159.html
Awesome!
Thanks a lot for testing it though!
I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for imx8mm-beacon-kit.
I wouldn't have even thought about it until I saw your patch, so thanks for bringing it to my attention. :-)
As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files then.
Would there be any objections here?
None from me.
If I understand correctly, we could add a imx8mm-u-boot-dtsi with these U-Boot additions, and all imx8mm boards would include them instead of modifying each board's u-boot-dtsi.
My only concern there is whether or not enabling hs400, hs200 or sdh104 on boards that don't have devices compatible with such flags. I would expect them to autonegotiate, but I have no way to test it.
In theory, we could also make those Kconfig options 'imply' HS400, HS200, etc. automatically in the Kconfig which would eliminate the need to modify each defconfig file. Implying that option would allow users to remove them in their respective defconfig files if they don't want the feature.
adam
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
-- andrey
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 3:31 PM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Sat, Dec 5, 2020 at 8:21 AM ZHIZHIKIN Andrey <andrey.zhizhikin@leica- geosystems.com> wrote:
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 1:43 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series: https://lists.denx.de/pipermail/u-boot/2020-December/434159.html
Awesome!
Thanks a lot for testing it though!
I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for
imx8mm-beacon-kit.
I wouldn't have even thought about it until I saw your patch, so thanks for bringing it to my attention. :-)
As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files
then.
Would there be any objections here?
None from me.
Great!
If I understand correctly, we could add a imx8mm-u-boot-dtsi with these U-Boot additions, and all imx8mm boards would include them instead of modifying each board's u-boot-dtsi.
I would make this change in the V3 then.
My only concern there is whether or not enabling hs400, hs200 or sdh104 on boards that don't have devices compatible with such flags. I would expect them to autonegotiate, but I have no way to test it.
According to the specification, the speed mode should be auto-negotiated so it should be safe to include those binding across.
In theory, we could also make those Kconfig options 'imply' HS400, HS200, etc. automatically in the Kconfig which would eliminate the need to modify each defconfig file. Implying that option would allow users to remove them in their respective defconfig files if they don't want the feature.
Looking at the way how high speed modes are enabled in U-Boot, it does require that both config options and DT bindings are to be turned on, with bindings providing a fine-grained control over which modes are supported.
I might look into this part further on, but would rather leave it outside of this series.
adam
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
-- Andrey
-- andrey
Hello Adam,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of ZHIZHIKIN Andrey Sent: Saturday, December 5, 2020 4:09 PM To: Adam Ford aford173@gmail.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: RE: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 3:31 PM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Sat, Dec 5, 2020 at 8:21 AM ZHIZHIKIN Andrey <andrey.zhizhikin@leica- geosystems.com> wrote:
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 1:43 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to
them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series:
Awesome!
Thanks a lot for testing it though!
I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for
imx8mm-beacon-kit.
I wouldn't have even thought about it until I saw your patch, so thanks for bringing it to my attention. :-)
As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files
then.
Would there be any objections here?
None from me.
Great!
If I understand correctly, we could add a imx8mm-u-boot-dtsi with these U-Boot additions, and all imx8mm boards would include them instead of modifying each board's u-boot-dtsi.
I would make this change in the V3 then.
This unfortunately would not work, since build system does not automatically pick up '-uboot.dtsi' if it does not match to the entry in Makefile. Only those DTS file names, which are explicitly present in the Makefile are searched for corresponding '-u-boot.dtsi' to be auto-included.
I would have to abandon this idea and go ahead with enabling those bindings only in '-u-boot.dtsi' files which have corresponding .dts files in the tree.
That would mean for all boards requiring to have high speed modes enabled - corresponding bindings should be introduced separately in their respective device trees.
My only concern there is whether or not enabling hs400, hs200 or sdh104 on boards that don't have devices compatible with such flags. I would expect them to autonegotiate, but I have no way to test it.
According to the specification, the speed mode should be auto-negotiated so it should be safe to include those binding across.
In theory, we could also make those Kconfig options 'imply' HS400, HS200, etc. automatically in the Kconfig which would eliminate the need to modify each defconfig file. Implying that option would allow users to remove them in their respective defconfig files if they don't want the feature.
Looking at the way how high speed modes are enabled in U-Boot, it does require that both config options and DT bindings are to be turned on, with bindings providing a fine-grained control over which modes are supported.
I might look into this part further on, but would rather leave it outside of this series.
adam
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
-- Andrey
-- andrey
-- andrey
On Sat, Dec 5, 2020 at 10:55 AM ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com wrote:
Hello Adam,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of ZHIZHIKIN Andrey Sent: Saturday, December 5, 2020 4:09 PM To: Adam Ford aford173@gmail.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: RE: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 3:31 PM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Sat, Dec 5, 2020 at 8:21 AM ZHIZHIKIN Andrey <andrey.zhizhikin@leica- geosystems.com> wrote:
Hello Adam,
-----Original Message----- From: Adam Ford aford173@gmail.com Sent: Saturday, December 5, 2020 1:43 AM To: ZHIZHIKIN Andrey andrey.zhizhikin@leica-geosystems.com Cc: U-Boot Mailing List u-boot@lists.denx.de; Stefano Babic sbabic@denx.de; Ye Li ye.li@nxp.com Subject: Re: [PATCH 2/2] ARM: dts: imx8m: add UHS or HS400/HS400ES properties
On Tue, Dec 1, 2020 at 7:32 AM Andrey Zhizhikin <andrey.zhizhikin@leica- geosystems.com> wrote:
i.MX8M series provide support for high speed grades in their usdhc controllers, which has eMMC and SDHC connected to them.
Enable this support across the entire i.MX8M family by providing quirks to usdhc controllers designated by storage media connected to
them.
Signed-off-by: Andrey Zhizhikin andrey.zhizhikin@leica-geosystems.com Cc: Stefano Babic sbabic@denx.de Cc: Ye Li ye.li@nxp.com
arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi | 3 +++ arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 3 +++ arch/arm/dts/imx8mm-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mp-evk-u-boot.dtsi | 4 ++++ arch/arm/dts/imx8mq-evk.dts | 3 +++ 6 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi index 80d6475b7c..2f86fcce3e 100644 --- a/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qm-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
I don't think the "u-boot," prefix is needed. Looking at other boards' device trees, they don't seem to have this.
Correct, I've already realized that and currently working on V3 of the series:
Awesome!
Thanks a lot for testing it though!
I tried it on the beacon imx8mm-beacon-kit, and it didn't work until I removed the "u-boot,"
I believe you had it tested with your patches on top, since it would also require additional config options to be set, which you introduced for
imx8mm-beacon-kit.
I wouldn't have even thought about it until I saw your patch, so thanks for bringing it to my attention. :-)
As I see it now - those changes might be useful and applicable to all imx8m* derivatives and I'm thinking to move those binding to base dtsi files
then.
Would there be any objections here?
None from me.
Great!
If I understand correctly, we could add a imx8mm-u-boot-dtsi with these U-Boot additions, and all imx8mm boards would include them instead of modifying each board's u-boot-dtsi.
I would make this change in the V3 then.
This unfortunately would not work, since build system does not automatically pick up '-uboot.dtsi' if it does not match to the entry in Makefile. Only those DTS file names, which are explicitly present in the Makefile are searched for corresponding '-u-boot.dtsi' to be auto-included.
I would have to abandon this idea and go ahead with enabling those bindings only in '-u-boot.dtsi' files which have corresponding .dts files in the tree.
That would mean for all boards requiring to have high speed modes enabled - corresponding bindings should be introduced separately in their respective device trees.
That's too bad.
I wonder if at some point we as 8mm users can create a imx8mm-u-boot.dtsi file and include it in each of the board -u-boot.dtsi files to reduce the redundant copies of all the same stuff. This way if a u-boot specific feature gets modified, added, or removed, we can fix the dt node in one place instead of multiple.
I'm not proposing that we do iit now, but just brainstorming ideas.
adam
My only concern there is whether or not enabling hs400, hs200 or sdh104 on boards that don't have devices compatible with such flags. I would expect them to autonegotiate, but I have no way to test it.
According to the specification, the speed mode should be auto-negotiated so it should be safe to include those binding across.
In theory, we could also make those Kconfig options 'imply' HS400, HS200, etc. automatically in the Kconfig which would eliminate the need to modify each defconfig file. Implying that option would allow users to remove them in their respective defconfig files if they don't want the feature.
Looking at the way how high speed modes are enabled in U-Boot, it does require that both config options and DT bindings are to be turned on, with bindings providing a fine-grained control over which modes are supported.
I might look into this part further on, but would rather leave it outside of this series.
adam
With that removed, I can get the following:
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 27 OEM: 5048 Name: SD32G Bus Speed: 200000000 Mode: UHS SDR104 (208MHz) Rd Block Len: 512 SD version 3.0 High Capacity: Yes Capacity: 29 GiB Bus Width: 4-bit Erase Group Size: 512 Bytes u-boot=>
and
u-boot=> mmc info Device: FSL_SDHC Manufacturer ID: 45 OEM: 100 Name: DG403 Bus Speed: 200000000 Mode: HS400 (200MHz) Rd Block Len: 512 MMC version 5.1 High Capacity: Yes Capacity: 29.1 GiB Bus Width: 8-bit DDR Erase Group Size: 512 KiB HC WP Group Size: 8 MiB User Capacity: 29.1 GiB WRREL Boot Capacity: 4 MiB ENH RPMB Capacity: 4 MiB ENH Boot area 0 is not write protected Boot area 1 is not write protected u-boot=>
adam
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi index 771ab635f1..f4332edac5 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi +++ b/arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi @@ -118,8 +118,11 @@
&usdhc1 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;};
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;}; diff --git a/arch/arm/dts/imx8mm-evk-u-boot.dtsi b/arch/arm/dts/imx8mm-evk-u-boot.dtsi index 9f77d3c6ff..67666a08ec 100644 --- a/arch/arm/dts/imx8mm-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mm-evk-u-boot.dtsi @@ -100,10 +100,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&i2c1 { diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi index 98b0b9891b..e03e635213 100644 --- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi @@ -97,10 +97,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 2452e9175c..0776b24a6e 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -126,10 +126,14 @@
&usdhc2 { u-boot,dm-spl;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50;};
&usdhc3 { u-boot,dm-spl;
u-boot,mmc-hs400-1_8v;u-boot,mmc-hs400-enhanced-strobe;};
&wdog1 { diff --git a/arch/arm/dts/imx8mq-evk.dts b/arch/arm/dts/imx8mq-evk.dts index 9663683f69..985e7e7f8b 100644 --- a/arch/arm/dts/imx8mq-evk.dts +++ b/arch/arm/dts/imx8mq-evk.dts @@ -291,6 +291,7 @@ non-removable; no-sd; no-sdio;
u-boot,mmc-hs400-1_8v; status = "okay";};
@@ -301,6 +302,8 @@ pinctrl-2 = <&pinctrl_usdhc2_200mhz>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>;
u-boot,sd-uhs-sdr104;u-boot,sd-uhs-ddr50; status = "okay";};
-- 2.17.1
-- Andrey
-- andrey
-- andrey
participants (4)
-
Adam Ford -
Andrey Zhizhikin -
Peter Robinson -
ZHIZHIKIN Andrey