Save and restore core registers from r4 to r12 so that PSCI code won't break their value.

Signed-off-by: Chenhui Zhao chenhui.zhao@nxp.com Signed-off-by: Alison Wang alison.wang@nxp.com Signed-off-by: Abhimanyu Saini abhimanyu.saini@nxp.com --- arch/arm/cpu/armv7/psci.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/psci.S b/arch/arm/cpu/armv7/psci.S index 6a36208..746297c 100644 --- a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ -152,7 +152,7 @@ _psci_table: .word 0

_smc_psci: - push {r4-r7,lr} + push {r4-r12,lr}

@ Switch to secure mrc p15, 0, r7, c1, c1, 0 @@ -175,7 +175,7 @@ _smc_psci: @ Switch back to non-secure 2: mcr p15, 0, r7, c1, c1, 0

- pop {r4-r7, lr} + pop {r4-r12, lr} movs pc, lr @ Return to the kernel

@ Requires dense and single-cluster CPU ID space