[U-Boot] [PATCH 1/1] MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com --- board/freescale/mx53ard/imximage_dd3.cfg | 2 +- board/freescale/mx53evk/imximage.cfg | 2 +- board/freescale/mx53loco/imximage.cfg | 2 +- board/freescale/mx53smd/imximage.cfg | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
I've tested on an mx53, but this needs much more testing before being applied.
diff --git a/board/freescale/mx53ard/imximage_dd3.cfg b/board/freescale/mx53ard/imximage_dd3.cfg index 50e05af..614d29e 100644 --- a/board/freescale/mx53ard/imximage_dd3.cfg +++ b/board/freescale/mx53ard/imximage_dd3.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901C 0x00000000 diff --git a/board/freescale/mx53evk/imximage.cfg b/board/freescale/mx53evk/imximage.cfg index dd7528c..915fb2c 100644 --- a/board/freescale/mx53evk/imximage.cfg +++ b/board/freescale/mx53evk/imximage.cfg @@ -108,5 +108,5 @@ DATA 4 0x63fd901c 0x00448039 DATA 4 0x63fd9020 0x00005800 DATA 4 0x63fd9058 0x00033335 DATA 4 0x63fd901c 0x00000000 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x53fa8004 0x00194005 diff --git a/board/freescale/mx53loco/imximage.cfg b/board/freescale/mx53loco/imximage.cfg index f30258e..2ce5f8d 100644 --- a/board/freescale/mx53loco/imximage.cfg +++ b/board/freescale/mx53loco/imximage.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901c 0x00000000 diff --git a/board/freescale/mx53smd/imximage.cfg b/board/freescale/mx53smd/imximage.cfg index 50e05af..614d29e 100644 --- a/board/freescale/mx53smd/imximage.cfg +++ b/board/freescale/mx53smd/imximage.cfg @@ -91,6 +91,6 @@ DATA 4 0x63fd901c 0x00028039 DATA 4 0x63fd901c 0x05208138 DATA 4 0x63fd901c 0x04008048 DATA 4 0x63fd9020 0x00005800 -DATA 4 0x63fd9040 0x04b80003 +DATA 4 0x63fd9040 0x05380003 DATA 4 0x63fd9058 0x00022227 DATA 4 0x63fd901C 0x00000000
On 3/22/2012 3:00 PM, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Typo, should say default of 0x02 - 128 cycles
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/mx53ard/imximage_dd3.cfg | 2 +- board/freescale/mx53evk/imximage.cfg | 2 +- board/freescale/mx53loco/imximage.cfg | 2 +- board/freescale/mx53smd/imximage.cfg | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
I've tested on an mx53, but this needs much more testing before being applied.
On 3/22/2012 6:47 PM, Troy Kisky wrote:
On 3/22/2012 3:00 PM, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Typo, should say default of 0x02 - 128 cycles
Possibly the manual is wrong, and the value of 0x01 corresponds to 64 cycles? My testing was on a DDR2 device where this field is not relevant.
Signed-off-by: Troy Kiskytroy.kisky@boundarydevices.com
board/freescale/mx53ard/imximage_dd3.cfg | 2 +- board/freescale/mx53evk/imximage.cfg | 2 +- board/freescale/mx53loco/imximage.cfg | 2 +- board/freescale/mx53smd/imximage.cfg | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-)
I've tested on an mx53, but this needs much more testing before being applied.
On 23/03/2012 04:25, Troy Kisky wrote:
On 3/22/2012 6:47 PM, Troy Kisky wrote:
On 3/22/2012 3:00 PM, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Typo, should say default of 0x02 - 128 cycles
Possibly the manual is wrong, and the value of 0x01 corresponds to 64 cycles? My testing was on a DDR2 device where this field is not relevant.
Is there someone who can answer to this question ? This patch fixes the value according to the manual, without doubts. But if the manual is wrong...
Best regards, Stefano Babic
Hi Stefano,
On Fri, Mar 23, 2012 at 6:34 AM, Stefano Babic sbabic@denx.de wrote:
Is there someone who can answer to this question ? This patch fixes the value according to the manual, without doubts. But if the manual is wrong...
We are checking this internally at Freescale and will keep the list updated.
Thanks,
Fabio Estevam
On 3/22/12, Troy Kisky troy.kisky@boundarydevices.com wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Confirmed with the design team that your patch is correct.
Thanks for catching this.
Acked-by: Fabio Estevam fabio.estevam@freescale.com
On 22/03/2012 23:00, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Thanks everybody to fix / explain this issue.
Applied to u-boot-imx(fix), thanks.
Best regards, Stefano Babic
On 3/28/12, Stefano Babic sbabic@denx.de wrote:
On 22/03/2012 23:00, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Thanks everybody to fix / explain this issue.
Applied to u-boot-imx(fix), thanks.
Just noticed in this thread that Troy reported a typo in his commit log: it should have said "default of 0x02 - 128 cycles"
On 28/03/2012 15:31, Fabio Estevam wrote:
On 3/28/12, Stefano Babic sbabic@denx.de wrote:
On 22/03/2012 23:00, Troy Kisky wrote:
Currently, board files are setting this field to 0x01 which the manual says is a reserved value. Change to use the default of 0x04 - 128 cycles.
Signed-off-by: Troy Kisky troy.kisky@boundarydevices.com
Thanks everybody to fix / explain this issue.
Applied to u-boot-imx(fix), thanks.
Just noticed in this thread that Troy reported a typo in his commit log: it should have said "default of 0x02 - 128 cycles"
Right - I have fixed it myself on the tree, thanks.
Stefano
participants (3)
-
Fabio Estevam -
Stefano Babic -
Troy Kisky