[PATCH] riscv: cpu: set gp before board_init_f_init_reserve
From: Nikita Shubin n.shubin@yadro.com
Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer.
Signed-off-by: Nikita Shubin n.shubin@yadro.com --- arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 76850ec9be..623de57551 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -142,6 +142,7 @@ call_harts_early_init: bnez tp, secondary_hart_loop #endif
+ mv a0, s0 jal board_init_f_init_reserve
SREG s1, GD_FIRMWARE_FDT_ADDR(gp)
On Fri, May 20, 2022 at 02:41:17PM +0300, Nikita Shubin wrote:
From: Nikita Shubin n.shubin@yadro.com
Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer.
Signed-off-by: Nikita Shubin n.shubin@yadro.com
arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang ycliang@andestech.com
Hello Leo!
On Wed, 1 Jun 2022 02:07:34 +0000 Leo Liang ycliang@andestech.com wrote:
On Fri, May 20, 2022 at 02:41:17PM +0300, Nikita Shubin wrote:
From: Nikita Shubin n.shubin@yadro.com
Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer.
Signed-off-by: Nikita Shubin n.shubin@yadro.com
arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang ycliang@andestech.com
Any further motion on this ?
Yours, Nikita Shubin.
Hi Nikita,
On Tue, Aug 02, 2022 at 01:29:24PM +0300, Nikita Shubin wrote:
Hello Leo!
On Wed, 1 Jun 2022 02:07:34 +0000 Leo Liang ycliang@andestech.com wrote:
On Fri, May 20, 2022 at 02:41:17PM +0300, Nikita Shubin wrote:
From: Nikita Shubin n.shubin@yadro.com
Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer.
Signed-off-by: Nikita Shubin n.shubin@yadro.com
arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+)
Reviewed-by: Leo Yu-Chi Liang ycliang@andestech.com
Any further motion on this ?
Sorry for keeping you waiting for so long. This patch is merged in riscv tree and PR will be sent ASAP once the CI result shows no issue.
Best regards, Leo
Yours, Nikita Shubin.
participants (2)
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Leo Liang -
Nikita Shubin