Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support enabling the eMMC.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- drivers/mmc/meson_gx_mmc.c | 51 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+)

diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c index 767dfff805..031cc79ccb 100644 --- a/drivers/mmc/meson_gx_mmc.c +++ b/drivers/mmc/meson_gx_mmc.c @@ -7,8 +7,10 @@ #include <dm.h> #include <fdtdec.h> #include <malloc.h> +#include <pwrseq.h> #include <mmc.h> #include <asm/io.h> +#include <asm/gpio.h> #include <asm/arch/sd_emmc.h> #include <linux/log2.h>

@@ -239,6 +241,10 @@ static int meson_mmc_probe(struct udevice *dev) struct mmc *mmc = &pdata->mmc; struct mmc_config *cfg = &pdata->cfg; uint32_t val; +#ifdef CONFIG_PWRSEQ + struct udevice *pwr_dev; + int ret; +#endif

cfg->voltages = MMC_VDD_33_34 | MMC_VDD_32_33 | MMC_VDD_31_32 | MMC_VDD_165_195; @@ -254,6 +260,17 @@ static int meson_mmc_probe(struct udevice *dev)

mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);

+#ifdef CONFIG_PWRSEQ + /* Enable power if needed */ + ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq", + &pwr_dev); + if (!ret) { + ret = pwrseq_set_power(pwr_dev, true); + if (ret) + return ret; + } +#endif + /* reset all status bits */ meson_write(mmc, STATUS_MASK, MESON_SD_EMMC_STATUS);

@@ -292,3 +309,37 @@ U_BOOT_DRIVER(meson_mmc) = { .ofdata_to_platdata = meson_mmc_ofdata_to_platdata, .platdata_auto_alloc_size = sizeof(struct meson_mmc_platdata), }; + +#ifdef CONFIG_PWRSEQ +static int meson_mmc_pwrseq_set_power(struct udevice *dev, bool enable) +{ + struct gpio_desc reset; + int ret; + + ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT); + if (ret) + return ret; + dm_gpio_set_value(&reset, 1); + udelay(1); + dm_gpio_set_value(&reset, 0); + udelay(200); + + return 0; +} + +static const struct pwrseq_ops meson_mmc_pwrseq_ops = { + .set_power = meson_mmc_pwrseq_set_power, +}; + +static const struct udevice_id meson_mmc_pwrseq_ids[] = { + { .compatible = "mmc-pwrseq-emmc" }, + { } +}; + +U_BOOT_DRIVER(meson_mmc_pwrseq_drv) = { + .name = "mmc_pwrseq_emmc", + .id = UCLASS_PWRSEQ, + .of_match = meson_mmc_pwrseq_ids, + .ops = &meson_mmc_pwrseq_ops, +}; +#endif

Import the Amlogic SM1 DT and the SEI610 board DT from [1]

[1] da0c9ea146cb ("Linux 5.4-rc2")

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- arch/arm/dts/Makefile | 3 +- arch/arm/dts/meson-sm1-sei610.dts | 383 ++++++++++++++++++++ arch/arm/dts/meson-sm1.dtsi | 147 ++++++++ include/dt-bindings/power/meson-sm1-power.h | 18 + 4 files changed, 550 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/meson-sm1-sei610.dts create mode 100644 arch/arm/dts/meson-sm1.dtsi create mode 100644 include/dt-bindings/power/meson-sm1-power.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index aac3d21ef8..f5b9286fdf 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -142,7 +142,8 @@ dtb-$(CONFIG_ARCH_MESON) += \ meson-g12a-u200.dtb \ meson-g12a-sei510.dtb \ meson-g12b-odroid-n2.dtb \ - meson-g12b-a311d-khadas-vim3.dtb + meson-g12b-a311d-khadas-vim3.dtb \ + meson-sm1-sei610.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts new file mode 100644 index 0000000000..3435aaa4e8 --- /dev/null +++ b/arch/arm/dts/meson-sm1-sei610.dts @@ -0,0 +1,383 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre SAS. All rights reserved. + */ + +/dts-v1/; + +#include "meson-sm1.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/gpio/meson-g12a-gpio.h> + +/ { + compatible = "seirobotics,sei610", "amlogic,sm1"; + model = "SEI Robotics SEI610"; + + aliases { + serial0 = &uart_AO; + ethernet0 = &ethmac; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; + }; + + gpio-keys { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + + key1 { + label = "A"; + linux,code = <BTN_0>; + gpios = <&gpio GPIOH_6 GPIO_ACTIVE_LOW>; + }; + + key2 { + label = "B"; + linux,code = <BTN_1>; + gpios = <&gpio GPIOH_7 GPIO_ACTIVE_LOW>; + }; + + key3 { + label = "C"; + linux,code = <BTN_2>; + gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; + }; + }; + + hdmi-connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&hdmi_tx_tmds_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + bluetooth { + label = "sei610:blue:bt"; + gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + default-state = "off"; + }; + }; + + pwmleds { + compatible = "pwm-leds"; + + power { + label = "sei610:red:power"; + pwms = <&pwm_AO_ab 0 30518 0>; + max-brightness = <255>; + linux,default-trigger = "default-on"; + active-low; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + ao_5v: regulator-ao_5v { + compatible = "regulator-fixed"; + regulator-name = "AO_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + dc_in: regulator-dc_in { + compatible = "regulator-fixed"; + regulator-name = "DC_IN"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + emmc_1v8: regulator-emmc_1v8 { + compatible = "regulator-fixed"; + regulator-name = "EMMC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_in>; + regulator-always-on; + }; + + /* Used by Tuner, RGB Led & IR Emitter LED array */ + vddao_3v3_t: regulator-vddao_3v3_t { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3_T"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vddao_3v3>; + gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; + enable-active-low; + regulator-always-on; + }; + + vddcpu: regulator-vddcpu { + /* + * SY8120B1ABC DC/DC Regulator. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU"; + regulator-min-microvolt = <690000>; + regulator-max-microvolt = <1050000>; + + vin-supply = <&dc_in>; + + pwms = <&pwm_AO_cd 1 1500 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; + + vddio_ao1v8: regulator-vddio_ao1v8 { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; + regulator-always-on; + }; + + reserved-memory { + /* TEE Reserved Memory */ + bl32_reserved: bl32@5000000 { + reg = <0x0 0x05300000 0x0 0x2000000>; + no-map; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; +}; + +&cec_AO { + pinctrl-0 = <&cec_ao_a_h_pins>; + pinctrl-names = "default"; + status = "disabled"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cecb_AO { + pinctrl-0 = <&cec_ao_b_h_pins>; + pinctrl-names = "default"; + status = "okay"; + hdmi-phandle = <&hdmi_tx>; +}; + +&cpu0 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU_CLK>; + clock-latency = <50000>; +}; + +&cpu1 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU1_CLK>; + clock-latency = <50000>; +}; + +&cpu2 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU2_CLK>; + clock-latency = <50000>; +}; + +&cpu3 { + cpu-supply = <&vddcpu>; + operating-points-v2 = <&cpu_opp_table>; + clocks = <&clkc CLKID_CPU3_CLK>; + clock-latency = <50000>; +}; + +&ethmac { + status = "okay"; + phy-handle = <&internal_ephy>; + phy-mode = "rmii"; +}; + +&hdmi_tx { + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; +}; + +&hdmi_tx_tmds_port { + hdmi_tx_tmds_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; +}; + +&i2c3 { + status = "okay"; + pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; + pinctrl-names = "default"; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + +&pwm_AO_ab { + status = "okay"; + pinctrl-0 = <&pwm_ao_a_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; +}; + +&pwm_AO_cd { + pinctrl-0 = <&pwm_ao_d_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin1"; + status = "okay"; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&xtal>; + clock-names = "clkin0"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vddio_ao1v8>; +}; + +/* SDIO */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-1 = <&sdio_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr50; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_ao1v8>; + + brcmf: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_c_pins>; + pinctrl-1 = <&sdcard_clk_gate_c_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <50000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddao_3v3>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + + bus-width = <8>; + cap-mmc-highspeed; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; + non-removable; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&emmc_1v8>; +}; + +&uart_A { + status = "okay"; + pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>; + pinctrl-names = "default"; + uart-has-rtscts; + + bluetooth { + compatible = "brcm,bcm43438-bt"; + shutdown-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; + vbat-supply = <&vddao_3v3>; + vddio-supply = <&vddio_ao1v8>; + }; +}; + +/* Exposed via the on-board USB to Serial FT232RL IC */ +&uart_AO { + status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; +}; + +&usb { + status = "okay"; + dr_mode = "otg"; +}; diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi new file mode 100644 index 0000000000..521573f3a5 --- /dev/null +++ b/arch/arm/dts/meson-sm1.dtsi @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong narmstrong@baylibre.com + */ + +#include "meson-g12-common.dtsi" +#include <dt-bindings/power/meson-sm1-power.h> + +/ { + compatible = "amlogic,sm1"; + + cpus { + #address-cells = <0x2>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x1>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x2>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x3>; + enable-method = "psci"; + next-level-cache = <&l2>; + }; + + l2: l2-cache0 { + compatible = "cache"; + }; + }; + + cpu_opp_table: opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <730000>; + }; + + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <730000>; + }; + + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <730000>; + }; + + opp-667000000 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <750000>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <770000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <780000>; + }; + + opp-1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <790000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <800000>; + }; + + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <810000>; + }; + + opp-1704000000 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <850000>; + }; + + opp-1800000000 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <900000>; + }; + + opp-1908000000 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <950000>; + }; + }; +}; + +&cecb_AO { + compatible = "amlogic,meson-sm1-ao-cec"; +}; + +&clk_msr { + compatible = "amlogic,meson-sm1-clk-measure"; +}; + + +&clkc { + compatible = "amlogic,sm1-clkc"; +}; + +&ethmac { + power-domains = <&pwrc PWRC_SM1_ETH_ID>; +}; + +&pwrc { + compatible = "amlogic,meson-sm1-pwrc"; +}; + +&vpu { + power-domains = <&pwrc PWRC_SM1_VPU_ID>; +}; + +&usb { + power-domains = <&pwrc PWRC_SM1_USB_ID>; +}; diff --git a/include/dt-bindings/power/meson-sm1-power.h b/include/dt-bindings/power/meson-sm1-power.h new file mode 100644 index 0000000000..a020ab00c1 --- /dev/null +++ b/include/dt-bindings/power/meson-sm1-power.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2019 BayLibre, SAS + * Author: Neil Armstrong narmstrong@baylibre.com + */ + +#ifndef _DT_BINDINGS_MESON_SM1_POWER_H +#define _DT_BINDINGS_MESON_SM1_POWER_H + +#define PWRC_SM1_VPU_ID 0 +#define PWRC_SM1_NNA_ID 1 +#define PWRC_SM1_USB_ID 2 +#define PWRC_SM1_PCIE_ID 3 +#define PWRC_SM1_GE2D_ID 4 +#define PWRC_SM1_AUDIO_ID 5 +#define PWRC_SM1_ETH_ID 6 + +#endif

Add support for the customer board SEI610 manufactured by SEI Robotics with the following specifications: - Amlogic S905X3 ARM Cortex-A35 quad-core SoC - 2GB DDR4 SDRAM - 10/100 Ethernet (Internal PHY) - 1 x USB 3.0 Host - 1 x USB Type-C DRD - 1 x FTDI USB Serial Debug Interface - eMMC - SDcard - Infrared receiver - SDIO WiFi Module

Like it's SEI510 counterpart, the boot flow is designed to boot Android AOSP built for the Yukawa Android device.

Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- board/amlogic/sei610/MAINTAINERS | 6 ++ board/amlogic/sei610/Makefile | 6 ++ board/amlogic/sei610/README | 119 +++++++++++++++++++++++++++++++ board/amlogic/sei610/sei610.c | 26 +++++++ configs/sei610_defconfig | 76 ++++++++++++++++++++ 5 files changed, 233 insertions(+) create mode 100644 board/amlogic/sei610/MAINTAINERS create mode 100644 board/amlogic/sei610/Makefile create mode 100644 board/amlogic/sei610/README create mode 100644 board/amlogic/sei610/sei610.c create mode 100644 configs/sei610_defconfig

diff --git a/board/amlogic/sei610/MAINTAINERS b/board/amlogic/sei610/MAINTAINERS new file mode 100644 index 0000000000..20f12334e9 --- /dev/null +++ b/board/amlogic/sei610/MAINTAINERS @@ -0,0 +1,6 @@ +SEI610 +M: Neil Armstrong narmstrong@baylibre.com +S: Maintained +L: u-boot-amlogic@groups.io +F: board/amlogic/sei610/ +F: configs/sei610_defconfig diff --git a/board/amlogic/sei610/Makefile b/board/amlogic/sei610/Makefile new file mode 100644 index 0000000000..428792afea --- /dev/null +++ b/board/amlogic/sei610/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2016 BayLibre, SAS +# Author: Neil Armstrong narmstrong@baylibre.com + +obj-y := sei610.o diff --git a/board/amlogic/sei610/README b/board/amlogic/sei610/README new file mode 100644 index 0000000000..836809ccdb --- /dev/null +++ b/board/amlogic/sei610/README @@ -0,0 +1,119 @@ +U-Boot for Amlogic SEI610 +======================= + +SEI610 is a customer board manufactured by SEI Robotics with the following +specifications: + + - Amlogic S905X3 ARM Cortex-A35 quad-core SoC + - 2GB DDR4 SDRAM + - 10/100 Ethernet (Internal PHY) + - 1 x USB 3.0 Host + - 1 x USB Type-C DRD + - 1 x FTDI USB Serial Debug Interface + - eMMC + - SDcard + - Infrared receiver + - SDIO WiFi Module + +u-boot compilation +================== + + > export ARCH=arm + > export CROSS_COMPILE=aarch64-none-elf- + > make sei610_defconfig + > make + +Image creation +============== + +Amlogic doesn't provide sources for the firmware and for tools needed +to create the bootloader image, so it is necessary to obtain them from +the git tree published by the board vendor: + + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-... + > wget https://releases.linaro.org/archive/13.11/components/toolchain/binaries/gcc-... + > tar xvfJ gcc-linaro-aarch64-none-elf-4.8-2013.11_linux.tar.xz + > tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz + > export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH + > git clone https://github.com/BayLibre/u-boot.git -b buildroot-openlinux-4.9-g12a-201904 amlogic-u-boot + > cd amlogic-u-boot + > make sm1_ac200_v1_defconfig + > make + > export UBOOTDIR=$PWD + +Download the latest Amlogic Buildroot package, and extract it : + > wget http://openlinux2.amlogic.com:8000/ARM/filesystem/buildroot-openlinux-A113-2... + > tar xfz buildroot-openlinux-A113-201901.tgz buildroot-openlinux-A113-201901/bootloader + > export BRDIR=$PWD/buildroot-openlinux-A113-201901 + > export FIPDIR=$BRDIR/bootloader/uboot-repo/fip + +Go back to mainline U-Boot source tree then : + > mkdir fip + + > wget https://github.com/BayLibre/u-boot/releases/download/v2017.11-libretech-cc/b... -O fip/blx_fix.sh + > cp $UBOOTDIR/build/scp_task/bl301.bin fip/ + > cp $UBOOTDIR/build/board/amlogic/g12a_u200_v1/firmware/acs.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl2/bin/g12a/bl2.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl30/bin/g12a/bl30.bin fip/ + > cp $BRDIR/bootloader/uboot-repo/bl31_1.3/bin/g12a/bl31.img fip/ + > cp $FIPDIR/g12a/ddr3_1d.fw fip/ + > cp $FIPDIR/g12a/ddr4_1d.fw fip/ + > cp $FIPDIR/g12a/ddr4_2d.fw fip/ + > cp $FIPDIR/g12a/diag_lpddr4.fw fip/ + > cp $FIPDIR/g12a/lpddr4_1d.fw fip/ + > cp $FIPDIR/g12a/lpddr4_2d.fw fip/ + > cp $FIPDIR/g12a/piei.fw fip/ + > cp u-boot.bin fip/bl33.bin + + > sh fip/blx_fix.sh \ + fip/bl30.bin \ + fip/zero_tmp \ + fip/bl30_zero.bin \ + fip/bl301.bin \ + fip/bl301_zero.bin \ + fip/bl30_new.bin \ + bl30 + + > sh fip/blx_fix.sh \ + fip/bl2.bin \ + fip/zero_tmp \ + fip/bl2_zero.bin \ + fip/acs.bin \ + fip/bl21_zero.bin \ + fip/bl2_new.bin \ + bl2 + + > $FIPDIR/g12a/aml_encrypt_g12a --bl30sig --input fip/bl30_new.bin \ + --output fip/bl30_new.bin.g12a.enc \ + --level v3 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl30_new.bin.g12a.enc \ + --output fip/bl30_new.bin.enc \ + --level v3 --type bl30 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl31.img \ + --output fip/bl31.img.enc \ + --level v3 --type bl31 + > $FIPDIR/g12a/aml_encrypt_g12a --bl3sig --input fip/bl33.bin --compress lz4 \ + --output fip/bl33.bin.enc \ + --level v3 --type bl33 + > $FIPDIR/g12a/aml_encrypt_g12a --bl2sig --input fip/bl2_new.bin \ + --output fip/bl2.n.bin.sig + > $FIPDIR/g12a/aml_encrypt_g12a --bootmk \ + --output fip/u-boot.bin \ + --bl2 fip/bl2.n.bin.sig \ + --bl30 fip/bl30_new.bin.enc \ + --bl31 fip/bl31.img.enc \ + --bl33 fip/bl33.bin.enc \ + --ddrfw1 fip/ddr4_1d.fw \ + --ddrfw2 fip/ddr4_2d.fw \ + --ddrfw3 fip/ddr3_1d.fw \ + --ddrfw4 fip/piei.fw \ + --ddrfw5 fip/lpddr4_1d.fw \ + --ddrfw6 fip/lpddr4_2d.fw \ + --ddrfw7 fip/diag_lpddr4.fw \ + --level v3 + +and then write the image to SD with: + + > DEV=/dev/your_sd_device + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=512 skip=1 seek=1 + > dd if=fip/u-boot.bin.sd.bin of=$DEV conv=fsync,notrunc bs=1 count=444 diff --git a/board/amlogic/sei610/sei610.c b/board/amlogic/sei610/sei610.c new file mode 100644 index 0000000000..b17eb9ef55 --- /dev/null +++ b/board/amlogic/sei610/sei610.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong narmstrong@baylibre.com + */ + +#include <common.h> +#include <dm.h> +#include <env_internal.h> +#include <asm/io.h> +#include <asm/arch/axg.h> +#include <asm/arch/sm.h> +#include <asm/arch/eth.h> +#include <asm/arch/mem.h> + +int misc_init_r(void) +{ + meson_eth_init(PHY_INTERFACE_MODE_RMII, + MESON_USE_INTERNAL_RMII_PHY); + + meson_generate_serial_ethaddr(); + + env_set("serial#", "AMLG12ASEI610"); + + return 0; +} diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig new file mode 100644 index 0000000000..89e7bd7bab --- /dev/null +++ b/configs/sei610_defconfig @@ -0,0 +1,76 @@ +CONFIG_ARM=y +CONFIG_SYS_BOARD="sei610" +CONFIG_SYS_CONFIG_NAME="sei510" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_MESON_G12A=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_IDENT_STRING=" sei610" +# CONFIG_PSCI_RESET is not set +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_USE_PREBOOT=y +CONFIG_PREBOOT="run load_logo" +# CONFIG_CONSOLE_MUX is not set +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +# CONFIG_CMD_BDI is not set +# CONFIG_CMD_IMI is not set +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_BMP=y +CONFIG_CMD_REGULATOR=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_USB_FUNCTION_FASTBOOT=y +CONFIG_FASTBOOT_BUF_ADDR=0x6000000 +CONFIG_FASTBOOT_FLASH=y +CONFIG_FASTBOOT_FLASH_MMC_DEV=2 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_DM_GPIO=y +# CONFIG_INPUT is not set +CONFIG_PWRSEQ=y +CONFIG_DM_MMC=y +CONFIG_MMC_MESON_GX=y +CONFIG_PHY_ADDR_ENABLE=y +CONFIG_PHY_ADDR=8 +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_POWER_DOMAIN=y +CONFIG_MESON_EE_POWER_DOMAIN=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_RESET=y +CONFIG_DEBUG_UART_MESON=y +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_MESON_SERIAL=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y +CONFIG_DM_VIDEO=y +CONFIG_SYS_WHITE_ON_BLACK=y +CONFIG_VIDEO_MESON=y +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_LZ4=y +CONFIG_OF_LIBFDT_OVERLAY=y

From: Guillaume La Roque glaroque@baylibre.com

Move android generic config and boot sequence in meson64_android header and fix size of userdata to use all eMMC on SEI510.

Signed-off-by: Guillaume La Roque glaroque@baylibre.com Signed-off-by: Neil Armstrong narmstrong@baylibre.com --- MAINTAINERS | 1 + include/configs/meson64_android.h | 136 ++++++++++++++++++++++++++++++ include/configs/sei510.h | 121 +------------------------- 3 files changed, 139 insertions(+), 119 deletions(-) create mode 100644 include/configs/meson64_android.h

diff --git a/MAINTAINERS b/MAINTAINERS index c53656695a..e874a44c31 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,6 +137,7 @@ F: drivers/pinctrl/meson/ F: drivers/power/domain/meson-gx-pwrc-vpu.c F: drivers/video/meson/ F: include/configs/meson64.h +F: include/configs/meson64_android.h N: meson

ARM BROADCOM BCM283X diff --git a/include/configs/meson64_android.h b/include/configs/meson64_android.h new file mode 100644 index 0000000000..055fb44e93 --- /dev/null +++ b/include/configs/meson64_android.h @@ -0,0 +1,136 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Android Amlogic Meson 64bits SoCs + * + * Copyright (C) 2019 Baylibre, SAS + * Author: Jerome Brunet jbrunet@baylibre.com + */ + +#ifndef __MESON64_ANDROID_CONFIG_H +#define __MESON64_ANDROID_CONFIG_H + +#define CONFIG_SYS_MMC_ENV_DEV 2 +#define CONFIG_SYS_MMC_ENV_PART 1 +#define CONFIG_ENV_SIZE 0x10000 +#define CONFIG_ENV_OFFSET (-0x10000) + + +#define BOOTENV_DEV_FASTBOOT(devtypeu, devtypel, instance) \ + "bootcmd_fastboot=" \ + "sm reboot_reason reason;" \ + "setenv run_fastboot 0;" \ + "if test "${boot_source}" = "usb"; then " \ + "echo Fastboot forced by usb rom boot;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if gpt verify mmc ${mmcdev} ${partitions}; then; " \ + "else " \ + "echo Broken MMC partition scheme;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${reason}" = "bootloader" -o " \ + ""${reason}" = "fastboot"; then " \ + "echo Fastboot asked by reboot reason;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${skip_fastboot}" -eq 1; then " \ + "echo Fastboot skipped by environment;" \ + "setenv run_fastboot 0;" \ + "fi;" \ + "if test "${force_fastboot}" -eq 1; then " \ + "echo Fastboot forced by environment;" \ + "setenv run_fastboot 1;" \ + "fi;" \ + "if test "${run_fastboot}" -eq 1; then " \ + "echo Running Fastboot...;" \ + "fastboot 0;" \ + "fi\0" + +#define BOOTENV_DEV_NAME_FASTBOOT(devtypeu, devtypel, instance) \ + "fastboot " + +/* TOFIX: Run actual recovery instead of fastboot */ +#define BOOTENV_DEV_RECOVERY(devtypeu, devtypel, instance) \ + "bootcmd_recovery=" \ + "pinmux dev pinctrl@14;" \ + "pinmux dev pinctrl@40;" \ + "sm reboot_reason reason;" \ + "setenv run_recovery 0;" \ + "if run check_button; then " \ + "echo Recovery button is pressed;" \ + "setenv run_recovery 1;" \ + "elif test "${reason}" = "recovery" -o " \ + ""${reason}" = "update"; then " \ + "echo Recovery asked by reboot reason;" \ + "setenv run_recovery 1;" \ + "fi;" \ + "if test "${skip_recovery}" -eq 1; then " \ + "echo Recovery skipped by environment;" \ + "setenv run_recovery 0;" \ + "fi;" \ + "if test "${force_recovery}" -eq 1; then " \ + "echo Recovery forced by environment;" \ + "setenv run_recovery 1;" \ + "fi;" \ + "if test "${run_recovery}" -eq 1; then " \ + "echo Running Recovery...;" \ + "fastboot 0;" \ + "fi\0" + +#define BOOTENV_DEV_NAME_RECOVERY(devtypeu, devtypel, instance) \ + "recovery " + +#define BOOTENV_DEV_SYSTEM(devtypeu, devtypel, instance) \ + "bootcmd_system=" \ + "echo Loading Android boot partition...;" \ + "mmc dev ${mmcdev};" \ + "setenv bootargs ${bootargs} console=${console} androidboot.serialno=${serial#};" \ + "part start mmc ${mmcdev} ${bootpart} boot_start;" \ + "part size mmc ${mmcdev} ${bootpart} boot_size;" \ + "if mmc read ${loadaddr} ${boot_start} ${boot_size}; then " \ + "echo Running Android...;" \ + "bootm ${loadaddr};" \ + "fi;" \ + "echo Failed to boot Android...;" \ + "reset\0" + +#define BOOTENV_DEV_NAME_SYSTEM(devtypeu, devtypel, instance) \ + "system " + +#define BOOT_TARGET_DEVICES(func) \ + func(FASTBOOT, fastboot, na) \ + func(RECOVERY, recovery, na) \ + func(SYSTEM, system, na) \ + +#define PREBOOT_LOAD_LOGO \ + "mmc dev ${mmcdev};" \ + "part start mmc ${mmcdev} ${logopart} boot_start;" \ + "part size mmc ${mmcdev} ${logopart} boot_size;" \ + "if mmc read ${loadaddr} ${boot_start} ${boot_size}; then " \ + "bmp display ${loadaddr} m m;" \ + "fi;" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "partitions=" PARTS_DEFAULT "\0" \ + "mmcdev=2\0" \ + "bootpart=1\0" \ + "logopart=2\0" \ + "gpio_recovery=88\0" \ + "check_button=gpio input ${gpio_recovery};test $? -eq 0;\0" \ + "load_logo=" PREBOOT_LOAD_LOGO "\0" \ + "console=/dev/ttyAML0\0" \ + "bootargs=no_console_suspend\0" \ + "stdin=" STDIN_CFG "\0" \ + "stdout=" STDOUT_CFG "\0" \ + "stderr=" STDOUT_CFG "\0" \ + "loadaddr=0x01000000\0" \ + "fdt_addr_r=0x01000000\0" \ + "scriptaddr=0x08000000\0" \ + "kernel_addr_r=0x01080000\0" \ + "pxefile_addr_r=0x01080000\0" \ + "ramdisk_addr_r=0x13000000\0" \ + "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" BOOTENV + +#include <configs/meson64.h> + +#endif /* __MESON64_ANDROID_CONFIG_H */ diff --git a/include/configs/sei510.h b/include/configs/sei510.h index 5bf982cada..d37b4c6405 100644 --- a/include/configs/sei510.h +++ b/include/configs/sei510.h @@ -9,11 +9,6 @@ #ifndef __CONFIG_H #define __CONFIG_H

-#define CONFIG_SYS_MMC_ENV_DEV 2 -#define CONFIG_SYS_MMC_ENV_PART 1 -#define CONFIG_ENV_SIZE 0x10000 -#define CONFIG_ENV_OFFSET (-0x10000) - #define LOGO_UUID "43a3305d-150f-4cc9-bd3b-38fca8693846;" #define CACHE_UUID "99207ae6-5207-11e9-999e-6f77a3612069;" #define SYSTEM_UUID "99f9b7ac-5207-11e9-8507-c3c037e393f3;" @@ -28,122 +23,10 @@ "name=cache,size=256M,uuid=" CACHE_UUID \ "name=system,size=1536M,uuid=" SYSTEM_UUID \ "name=vendor,size=256M,uuid=" VENDOR_UUID \ - "name=userdata,size=4746M,uuid=" USERDATA_UUID \ + "name=userdata,size=5341M,uuid=" USERDATA_UUID \ "name=rootfs,size=-,uuid=" ROOT_UUID

-#define BOOTENV_DEV_FASTBOOT(devtypeu, devtypel, instance) \ - "bootcmd_fastboot=" \ - "sm reboot_reason reason;" \ - "setenv run_fastboot 0;" \ - "if gpt verify mmc ${mmcdev} ${partitions}; then; " \ - "else " \ - "echo Broken MMC partition scheme;" \ - "setenv run_fastboot 1;" \ - "fi;" \ - "if test "${reason}" = "bootloader" -o " \ - ""${reason}" = "fastboot"; then " \ - "echo Fastboot asked by reboot reason;" \ - "setenv run_fastboot 1;" \ - "fi;" \ - "if test "${skip_fastboot}" -eq 1; then " \ - "echo Fastboot skipped by environment;" \ - "setenv run_fastboot 0;" \ - "fi;" \ - "if test "${force_fastboot}" -eq 1; then " \ - "echo Fastboot forced by environment;" \ - "setenv run_fastboot 1;" \ - "fi;" \ - "if test "${run_fastboot}" -eq 1; then " \ - "echo Running Fastboot...;" \ - "fastboot 0;" \ - "fi\0" - -#define BOOTENV_DEV_NAME_FASTBOOT(devtypeu, devtypel, instance) \ - "fastboot " - -/* TOFIX: Run actual recovery instead of fastboot */ -#define BOOTENV_DEV_RECOVERY(devtypeu, devtypel, instance) \ - "bootcmd_recovery=" \ - "pinmux dev pinctrl@14;" \ - "pinmux dev pinctrl@40;" \ - "sm reboot_reason reason;" \ - "setenv run_recovery 0;" \ - "if run check_button; then " \ - "echo Recovery button is pressed;" \ - "setenv run_recovery 1;" \ - "elif test "${reason}" = "recovery" -o " \ - ""${reason}" = "update"; then " \ - "echo Recovery asked by reboot reason;" \ - "setenv run_recovery 1;" \ - "fi;" \ - "if test "${skip_recovery}" -eq 1; then " \ - "echo Recovery skipped by environment;" \ - "setenv run_recovery 0;" \ - "fi;" \ - "if test "${force_recovery}" -eq 1; then " \ - "echo Recovery forced by environment;" \ - "setenv run_recovery 1;" \ - "fi;" \ - "if test "${run_recovery}" -eq 1; then " \ - "echo Running Recovery...;" \ - "fastboot 0;" \ - "fi\0" - -#define BOOTENV_DEV_NAME_RECOVERY(devtypeu, devtypel, instance) \ - "recovery " - -#define BOOTENV_DEV_SYSTEM(devtypeu, devtypel, instance) \ - "bootcmd_system=" \ - "echo Loading Android boot partition...;" \ - "mmc dev ${mmcdev};" \ - "setenv bootargs ${bootargs} console=${console} androidboot.serialno=${serial#};" \ - "part start mmc ${mmcdev} ${bootpart} boot_start;" \ - "part size mmc ${mmcdev} ${bootpart} boot_size;" \ - "if mmc read ${loadaddr} ${boot_start} ${boot_size}; then " \ - "echo Running Android...;" \ - "bootm ${loadaddr};" \ - "fi;" \ - "echo Failed to boot Android...;" \ - "reset\0" - -#define BOOTENV_DEV_NAME_SYSTEM(devtypeu, devtypel, instance) \ - "system " - -#define BOOT_TARGET_DEVICES(func) \ - func(ROMUSB, romusb, na) \ - func(FASTBOOT, fastboot, na) \ - func(RECOVERY, recovery, na) \ - func(SYSTEM, system, na) \ - -#define PREBOOT_LOAD_LOGO \ - "mmc dev ${mmcdev};" \ - "part start mmc ${mmcdev} ${logopart} boot_start;" \ - "part size mmc ${mmcdev} ${logopart} boot_size;" \ - "if mmc read ${loadaddr} ${boot_start} ${boot_size}; then " \ - "bmp display ${loadaddr} m m;" \ - "fi;" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "partitions=" PARTS_DEFAULT "\0" \ - "mmcdev=2\0" \ - "bootpart=1\0" \ - "logopart=2\0" \ - "gpio_recovery=88\0" \ - "check_button=gpio input ${gpio_recovery};test $? -eq 0;\0" \ - "load_logo=" PREBOOT_LOAD_LOGO "\0" \ - "console=/dev/ttyAML0\0" \ - "bootargs=no_console_suspend\0" \ - "stdin=" STDIN_CFG "\0" \ - "stdout=" STDOUT_CFG "\0" \ - "stderr=" STDOUT_CFG "\0" \ - "loadaddr=0x01000000\0" \ - "fdt_addr_r=0x01000000\0" \ - "scriptaddr=0x08000000\0" \ - "kernel_addr_r=0x01080000\0" \ - "pxefile_addr_r=0x01080000\0" \ - "ramdisk_addr_r=0x13000000\0" \ - "fdtfile=amlogic/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" BOOTENV

-#include <configs/meson64.h> +#include <configs/meson64_android.h>

#endif /* __CONFIG_H */