[U-Boot] [PATCH 1/4] ARM: dts: rmobile: Add AVB pinmux on V3M Eagle
Add EtherAVB pinmux node on V3M Eagle to set the pinmux configuration.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/arm/dts/r8a77970-eagle.dts | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts index b75f38581c..0c555b8dde 100644 --- a/arch/arm/dts/r8a77970-eagle.dts +++ b/arch/arm/dts/r8a77970-eagle.dts @@ -32,6 +32,8 @@ };
&avb { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; renesas,no-ether-link; phy-handle = <&phy0>; phy-mode = "rgmii-id"; @@ -69,6 +71,13 @@ };
&pfc { + avb0_pins: avb { + mux { + groups = "avb0_link", "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk"; + function = "avb0"; + }; + }; + i2c0_pins: i2c0 { groups = "i2c0"; function = "i2c0";
Add EtherAVB PHY reset on V3M Eagle to let the AVB driver unreset the PHY.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- arch/arm/dts/r8a77970-eagle.dts | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/r8a77970-eagle.dts b/arch/arm/dts/r8a77970-eagle.dts index 0c555b8dde..5b8b2f8704 100644 --- a/arch/arm/dts/r8a77970-eagle.dts +++ b/arch/arm/dts/r8a77970-eagle.dts @@ -8,6 +8,7 @@
/dts-v1/; #include "r8a77970.dtsi" +#include <dt-bindings/gpio/gpio.h>
/ { model = "Renesas Eagle board based on r8a77970"; @@ -38,6 +39,7 @@ phy-handle = <&phy0>; phy-mode = "rgmii-id"; status = "okay"; + reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
phy0: ethernet-phy@0 { rxc-skew-ps = <1500>;
Fix the CPGWPR/CPGWPCR register address on V3M Eagle to unlock access to the CPG clock control registers.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- board/renesas/eagle/eagle.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/board/renesas/eagle/eagle.c b/board/renesas/eagle/eagle.c index 4bf0a202e0..7b89c10cc7 100644 --- a/board/renesas/eagle/eagle.c +++ b/board/renesas/eagle/eagle.c @@ -26,8 +26,8 @@
DECLARE_GLOBAL_DATA_PTR;
+#define CPGWPR 0xE6150900 #define CPGWPCR 0xE6150904 -#define CPGWPR 0xE615090C
/* PLL */ #define PLL0CR 0xE61500D8 @@ -54,8 +54,9 @@ void s_init(void)
int board_early_init_f(void) { - writel(0xA5A5FFFF, CPGWPCR); - writel(0x5A5A0000, CPGWPR); + /* Unlock CPG access */ + writel(0xA5A5FFFF, CPGWPR); + writel(0x5A5A0000, CPGWPCR);
/* TMU0 */ mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125);
Turning the cache off can help when experimenting with bare metal applications, enable the cache command on V3M Eagle to make that easier.
Signed-off-by: Marek Vasut marek.vasut+renesas@gmail.com Cc: Nobuhiro Iwamatsu iwamatsu@nigauri.org --- configs/r8a77970_eagle_defconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 40801651d4..f1e2ecaa0e 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -25,6 +25,7 @@ CONFIG_CMD_USB=y CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y
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Marek Vasut