Hi Tom,

Please pull the following patch from u-boot-riscv into your tree. Thanks!

The following changes since commit 5830791d91d1200854ef78fcb32f808c8080f0f0:

Merge tag 'pull-tg18' of git://git.denx.de/u-boot-dm (2018-11-23 17:25:27 -0500)

are available in the Git repository at:

git://git.denx.de/u-boot-riscv.git

for you to fetch changes up to 52923c6db7f00e0197ec894c8c1bb8a7681974bb:

riscv: cache: Implement i/dcache [status, enable, disable] (2018-11-26 13:58:01 +0800)

---------------------------------------------------------------- Bin Meng (1): Drop CONFIG_INIT_CRITICAL

Lukas Auer (27): tools: .gitignore: add prelink-riscv dts: riscv: update makefile to also clean the RISC-V dts directory riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I riscv: select CONFIG_PHYS_64BIT on RV64I systems riscv: add Kconfig entries for the C and A ISA extensions riscv: set -march and -mabi based on the Kconfig configuration riscv: enable -fdata-sections riscv: fix use of incorrectly sized variables riscv: make use of the barrier functions from Linux riscv: do not reimplement generic io functions riscv: complete the list of exception codes riscv: treat undefined exception codes as reserved riscv: hang on unhandled exceptions riscv: implement the invalidate_icache_* functions riscv: fix inconsistent use of spaces and tabs in start.S riscv: align mtvec on a 4-byte boundary riscv: remove unused labels in start.S riscv: do not blindly modify the mstatus CSR riscv: save hart ID and device tree passed by prior boot stage riscv: qemu: use device tree passed by prior boot stage riscv: qemu: support booting Linux riscv: align bootm implementation with that of other architectures distro_bootcmd: add VirtIO distro boot command riscv: qemu: enable distro boot dm: core: add missing prototype for ofnode_read_u64 riscv: qemu: detect and boot the kernel passed by QEMU riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

Rick Chen (4): riscv: dts: Sync to Linux Kernel ae350 dts. configs: ax25-ae350: Separate ax25-ae350 for RV32/64I. riscv: dts: Add ae350_32.dts for RV32I riscv: cache: Implement i/dcache [status, enable, disable]

arch/nds32/cpu/n1213/start.S | 51 -------------- arch/riscv/Kconfig | 34 ++++++--- arch/riscv/Makefile | 20 ++++++ arch/riscv/config.mk | 7 +- arch/riscv/cpu/ax25/Kconfig | 7 ++ arch/riscv/cpu/ax25/Makefile | 1 + arch/riscv/cpu/ax25/cache.c | 95 +++++++++++++++++++++++++ arch/riscv/cpu/ax25/cpu.c | 4 ++ arch/riscv/cpu/cpu.c | 6 ++ arch/riscv/cpu/qemu/cpu.c | 2 +- arch/riscv/cpu/start.S | 346 +++++++++++++++++++++++++++++++++++++++++++++----------------------------------------------- arch/riscv/dts/Makefile | 1 - arch/riscv/dts/ae350.dts | 107 +++++++++++++++++++++++++---- arch/riscv/dts/ae350_32.dts | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/dts/ae350_64.dts | 229 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ arch/riscv/include/asm/barrier.h | 67 ++++++++++++++++++ arch/riscv/include/asm/cache.h | 3 + arch/riscv/include/asm/io.h | 48 +++---------- arch/riscv/include/asm/posix_types.h | 6 +- arch/riscv/include/asm/types.h | 4 ++ arch/riscv/lib/bootm.c | 97 ++++++++++++++++++-------- arch/riscv/lib/cache.c | 36 ++++++++-- arch/riscv/lib/interrupts.c | 31 +++++++-- arch/riscv/lib/setjmp.S | 2 +- board/armltd/integrator/README | 4 +- board/emulation/qemu-riscv/Kconfig | 2 + board/emulation/qemu-riscv/qemu-riscv.c | 73 +++++++++++++++++--- configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} | 3 +- configs/ax25-ae350_64_defconfig | 37 ++++++++++ configs/qemu-riscv32_defconfig | 5 +- configs/qemu-riscv64_defconfig | 7 +- doc/README.distro | 3 +- dts/Makefile | 2 +- include/common.h | 5 -- include/config_distro_bootcmd.h | 21 ++++-- include/configs/qemu-riscv.h | 28 ++++++++ include/dm/ofnode.h | 10 +++ scripts/config_whitelist.txt | 1 - tools/.gitignore | 1 + 39 files changed, 1267 insertions(+), 368 deletions(-) create mode 100644 arch/riscv/cpu/ax25/Kconfig create mode 100644 arch/riscv/cpu/ax25/cache.c create mode 100644 arch/riscv/dts/ae350_32.dts create mode 100644 arch/riscv/dts/ae350_64.dts create mode 100644 arch/riscv/include/asm/barrier.h rename configs/{ax25-ae350_defconfig => a25-ae350_32_defconfig} (93%) create mode 100644 configs/ax25-ae350_64_defconfig