[U-Boot-Users] [PATCH v2 1/2] Add support for a Freescale non-CPM SPI controller

This patch adds support for the SPI controller found on Freescale PowerPC processors such as the MCP834x family. Additionally, a new config option, CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren biggerbadderben@gmail.com --- Makefile | 2 + README | 8 +++ drivers/spi/Makefile | 46 ++++++++++++++ drivers/spi/mpc8xxx_spi.c | 138 +++++++++++++++++++++++++++++++++++++++++ include/asm-ppc/immap_83xx.h | 9 ++- include/asm-ppc/mpc8xxx_spi.h | 49 +++++++++++++++ lib_ppc/board.c | 16 +++++ 7 files changed, 264 insertions(+), 4 deletions(-) create mode 100644 drivers/spi/Makefile create mode 100644 drivers/spi/mpc8xxx_spi.c create mode 100644 include/asm-ppc/mpc8xxx_spi.h
diff --git a/Makefile b/Makefile index 1b3d2e6..8eb2a59 100644 --- a/Makefile +++ b/Makefile @@ -230,6 +230,7 @@ LIBS += drivers/net/libnet.a LIBS += drivers/net/sk98lin/libsk98lin.a LIBS += drivers/pci/libpci.a LIBS += drivers/pcmcia/libpcmcia.a +LIBS += drivers/spi/libspi.a ifeq ($(CPU),mpc83xx) LIBS += drivers/qe/qe.a endif @@ -377,6 +378,7 @@ TAG_SUBDIRS += drivers/pcmcia TAG_SUBDIRS += drivers/qe TAG_SUBDIRS += drivers/rtc TAG_SUBDIRS += drivers/serial +TAG_SUBDIRS += drivers/spi TAG_SUBDIRS += drivers/usb TAG_SUBDIRS += drivers/video
diff --git a/README b/README index f2a4914..9a9e4de 100644 --- a/README +++ b/README @@ -1377,6 +1377,14 @@ The following options need to be configured: SPI configuration items (port pins to use, etc). For an example, see include/configs/sacsng.h.
+ CONFIG_HARD_SPI + + Enables a hardware SPI driver for general-purpose reads + and writes. As with CONFIG_SOFT_SPI, the board configuration + must define a list of chip-select function pointers. + Currently supported on some MPC8xxx processors. For an + example, see include/configs/mpc8349emds.h. + - FPGA Support: CONFIG_FPGA
Enables FPGA subsystem. diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile new file mode 100644 index 0000000..6b3898b --- /dev/null +++ b/drivers/spi/Makefile @@ -0,0 +1,46 @@ +# +# (C) Copyright 2000-2007 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB := $(obj)libspi.a + +COBJS-y += mpc8xxx_spi.o + +COBJS := $(COBJS-y) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +all: $(LIB) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c new file mode 100644 index 0000000..db29f84 --- /dev/null +++ b/drivers/spi/mpc8xxx_spi.c @@ -0,0 +1,138 @@ +/* + * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. + * With help from the common/soft_spi and cpu/mpc8260 drivers + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <spi.h> +#include <asm/mpc8xxx_spi.h> + +#ifdef CONFIG_HARD_SPI + +#define SPI_EV_NE 0x80000000 >> 22 /* Receiver Not Empty */ +#define SPI_EV_NF 0x80000000 >> 23 /* Transmitter Not Full */ + +#define SPI_MODE_LOOP 0x80000000 >> 1 /* Loopback mode */ +#define SPI_MODE_REV 0x80000000 >> 5 /* Reverse mode - MSB first */ +#define SPI_MODE_MS 0x80000000 >> 6 /* Always master */ +#define SPI_MODE_EN 0x80000000 >> 7 /* Enable interface */ + +#define SPI_PRESCALER(reg, div) (reg)=((reg) & 0xfff0ffff) | ((div)<<16) +#define SPI_CHARLENGTH(reg, div) (reg)=((reg) & 0xff0fffff) | ((div)<<20) + +#define SPI_TIMEOUT 1000 + +void spi_init(void) +{ + volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; + + /* ------------------------------------------------ + * SPI pins on the MPC83xx are not muxed, so all we do is initialize + * some registers + * ------------------------------------------------ */ + spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; + SPI_PRESCALER(spi->mode, 1); /* Use SYSCLK / 8 (16.67MHz typ.) */ + spi->event = 0xffffffff; /* Clear all SPI events */ + spi->mask = 0x00000000; /* Mask all SPI interrupts */ + spi->com = 0; /* LST bit doesn't do anything, so disregard */ +} + +int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) +{ + volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; + unsigned int tmpdout, tmpdin, event; + int numBlks = bitlen / 32 + (bitlen % 32 ? 1 : 0); + int tm, isRead = 0; + unsigned char charSize = 32; + + debug("spi_xfer: chipsel %08X dout %08X din %08X bitlen %d\n", + (int)chipsel, *(uint *) dout, *(uint *) din, bitlen); + + if (chipsel != NULL) + (*chipsel) (1); /* select the target chip */ + + spi->event = 0xffffffff; /* Clear all SPI events */ + + /* handle data in 32-bit chunks */ + while (numBlks--) { + tmpdout = 0; + charSize = (bitlen >= 32 ? 32 : bitlen); + + /* Shift data so it's msb-justified */ + tmpdout = *(u32 *) dout >> (32 - charSize); + + /* The LEN field of the SPMODE register is set as follows: + * + * Bit length setting + * l <= 4 3 + * 4 < l <= 16 l - 1 + * l > 16 0 + */ + + if (bitlen <= 16) + SPI_CHARLENGTH(spi->mode, bitlen <= 4 ? 3 : bitlen - 1); + else { + SPI_CHARLENGTH(spi->mode, 0); + /* Set up the next iteration if sending > 32 bits */ + bitlen -= 32; + dout += 4; + } + + spi->tx = tmpdout; /* Write the data out */ + debug("*** spi_xfer: ... %08x written\n", tmpdout); + + /* -------------------------------- + * Wait for SPI transmit to get out + * or time out (1 second = 1000 ms) + * The NE event must be read and cleared first + * -------------------------------- */ + for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { + event = spi->event; + if (event & SPI_EV_NE) { + tmpdin = spi->rx; + spi->event |= SPI_EV_NE; + isRead = 1; + + *(u32 *) din = (tmpdin << (32 - charSize)); + if (charSize == 32) { + /* Advance output buffer by 32 bits */ + din += 4; + } + } + /* Only bail when we've had both NE and NF events. + * This will cause timeouts on RO devices, so maybe + * in the future put an arbitrary delay after writing + * the device. Arbitrary delays suck, though... */ + if (isRead && (event & SPI_EV_NF)) + break; + } + if (tm >= SPI_TIMEOUT) + puts("*** spi_xfer: Time out during SPI transfer"); + + debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); + } + + if (chipsel != NULL) + (*chipsel) (0); /* deselect the target chip */ + return 0; +} + +#endif /* CONFIG_HARD_SPI */ diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h index 34ea295..c16a098 100644 --- a/include/asm-ppc/immap_83xx.h +++ b/include/asm-ppc/immap_83xx.h @@ -30,6 +30,7 @@
#include <asm/types.h> #include <asm/fsl_i2c.h> +#include <asm/mpc8xxx_spi.h>
/* * Local Access Window @@ -627,7 +628,7 @@ typedef struct immap { u8 res3[0x900]; lbus83xx_t lbus; /* Local Bus Controller Registers */ u8 res4[0x1000]; - spi83xx_t spi; /* Serial Peripheral Interface */ + spi8xxx_t spi; /* Serial Peripheral Interface */ dma83xx_t dma; /* DMA */ pciconf83xx_t pci_conf[2]; /* PCI Software Configuration Registers */ ios83xx_t ios; /* Sequencer */ @@ -661,7 +662,7 @@ typedef struct immap { u8 res2[0x900]; lbus83xx_t lbus; /* Local Bus Controller Registers */ u8 res3[0x1000]; - spi83xx_t spi; /* Serial Peripheral Interface */ + spi8xxx_t spi; /* Serial Peripheral Interface */ dma83xx_t dma; /* DMA */ pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */ u8 res4[0x80]; @@ -696,7 +697,7 @@ typedef struct immap { u8 res2[0x900]; lbus83xx_t lbus; /* Local Bus Controller Registers */ u8 res3[0x1000]; - spi83xx_t spi; /* Serial Peripheral Interface */ + spi8xxx_t spi; /* Serial Peripheral Interface */ dma83xx_t dma; /* DMA */ pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */ u8 res4[0x80]; @@ -741,7 +742,7 @@ typedef struct immap { u8 res2[0x900]; lbus83xx_t lbus; /* Local Bus Controller Registers */ u8 res3[0x1000]; - spi83xx_t spi; /* Serial Peripheral Interface */ + spi8xxx_t spi; /* Serial Peripheral Interface */ dma83xx_t dma; /* DMA */ pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */ u8 res4[0x80]; diff --git a/include/asm-ppc/mpc8xxx_spi.h b/include/asm-ppc/mpc8xxx_spi.h new file mode 100644 index 0000000..38f12b9 --- /dev/null +++ b/include/asm-ppc/mpc8xxx_spi.h @@ -0,0 +1,49 @@ +/* + * Freescale non-CPM SPI Controller + * + * Copyright 2008 Qstreams Networks, Inc. + * + * This software may be used and distributed according to the + * terms of the GNU Public License, Version 2, incorporated + * herein by reference. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * Version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ASM_MPC8XXX_SPI_H_ +#define _ASM_MPC8XXX_SPI_H_ + +#include <asm/types.h> + +#if defined(CONFIG_MPC834X) || \ + defined(CONFIG_MPC8313) || \ + defined(CONFIG_MPC8315) || \ + defined(CONFIG_MPC837X) + +typedef struct spi8xxx +{ + u8 res0[0x20]; /* 0x0-0x01f reserved */ + u32 mode; /* mode register */ + u32 event; /* event register */ + u32 mask; /* mask register */ + u32 com; /* command register */ + u32 tx; /* transmit register */ + u32 rx; /* receive register */ + u8 res1[0xC8]; /* fill up to 0x100 */ +} spi8xxx_t; + +#endif + +#endif /* _ASM_MPC8XXX_SPI_H_ */ diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 7b95246..8b4095c 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -87,6 +87,9 @@ void doc_init (void); defined(CONFIG_SOFT_I2C) #include <i2c.h> #endif +#if defined(CONFIG_HARD_SPI) +#include <spi.h> +#endif #if defined(CONFIG_CMD_NAND) void nand_init (void); #endif @@ -247,6 +250,16 @@ static int init_func_i2c (void) } #endif
+#if defined(CONFIG_HARD_SPI) +static int init_func_spi (void) +{ + puts ("SPI: "); + spi_init (); + puts ("ready\n"); + return (0); +} +#endif + /***********************************************************************/
#if defined(CONFIG_WATCHDOG) @@ -329,6 +342,9 @@ init_fnc_t *init_sequence[] = { #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) init_func_i2c, #endif +#if defined(CONFIG_HARD_SPI) + init_func_spi, +#endif #if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */ dtt_init, #endif

On Wed, 16 Jan 2008 22:37:35 -0500 Ben Warren biggerbadderben@gmail.com wrote:
This patch adds support for the SPI controller found on Freescale PowerPC processors such as the MCP834x family. Additionally, a new config option, CONFIG_HARD_SPI, is added for general purpose SPI controller use.
Signed-off-by: Ben Warren biggerbadderben@gmail.com
Makefile | 2 + README | 8 +++ drivers/spi/Makefile | 46 ++++++++++++++ drivers/spi/mpc8xxx_spi.c | 138 +++++++++++++++++++++++++++++++++++++++++
so, I just caught up on this spi stuff, turns out the mpc8610 has SPI, too, so mpc8xxx nomenclature seems ok (at least for now).
Only issues I noticed were CodingStyle related, so here are my comments, conveniently supplied in diff form :) :
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 6b3898b..0b7a2df 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -23,13 +23,13 @@
include $(TOPDIR)/config.mk
-LIB := $(obj)libspi.a +LIB := $(obj)libspi.a
COBJS-y += mpc8xxx_spi.o
COBJS := $(COBJS-y) -SRCS := $(COBJS:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS)) +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index 18e68d3..a3d1c95 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -27,16 +27,13 @@
#ifdef CONFIG_HARD_SPI
-#define SPI_EV_NE 0x80000000 >> 22 /* Receiver Not Empty */ -#define SPI_EV_NF 0x80000000 >> 23 /* Transmitter Not Full */ +#define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ +#define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */
-#define SPI_MODE_LOOP 0x80000000 >> 1 /* Loopback mode */ -#define SPI_MODE_REV 0x80000000 >> 5 /* Reverse mode - MSB first */ -#define SPI_MODE_MS 0x80000000 >> 6 /* Always master */ -#define SPI_MODE_EN 0x80000000 >> 7 /* Enable interface */ - -#define SPI_PRESCALER(reg, div) (reg)=((reg) & 0xfff0ffff) | ((div)<<16) -#define SPI_CHARLENGTH(reg, div) (reg)=((reg) & 0xff0fffff) | ((div)<<20) +#define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ +#define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ +#define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ +#define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */
#define SPI_TIMEOUT 1000
@@ -44,18 +41,19 @@ void spi_init(void) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi;
- /* ------------------------------------------------ + /* * SPI pins on the MPC83xx are not muxed, so all we do is initialize * some registers - * ------------------------------------------------ */ + */ spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; - SPI_PRESCALER(spi->mode, 1); /* Use SYSCLK / 8 (16.67MHz typ.) */ + spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8 + (16.67MHz typ.) */ spi->event = 0xffffffff; /* Clear all SPI events */ spi->mask = 0x00000000; /* Mask all SPI interrupts */ spi->com = 0; /* LST bit doesn't do anything, so disregard */ }
-int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) +int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din) { volatile spi8xxx_t *spi = &((immap_t *) (CFG_IMMR))->spi; unsigned int tmpdout, tmpdin, event; @@ -81,16 +79,21 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din)
/* The LEN field of the SPMODE register is set as follows: * - * Bit length setting - * l <= 4 3 - * 4 < l <= 16 l - 1 - * l > 16 0 + * Bit length setting + * len <= 4 3 + * 4 < len <= 16 len - 1 + * len > 16 0 */
- if (bitlen <= 16) - SPI_CHARLENGTH(spi->mode, bitlen <= 4 ? 3 : bitlen - 1); - else { - SPI_CHARLENGTH(spi->mode, 0); + if (bitlen <= 16) { + if (bitlen <= 4) + spi->mode = (spi->mode & 0xff0fffff) | + (3 << 20); + else + spi->mode = (spi->mode & 0xff0fffff) | + ((bitlen - 1) << 20); + } else { + spi->mode = (spi->mode & 0xff0fffff); /* Set up the next iteration if sending > 32 bits */ bitlen -= 32; dout += 4; @@ -99,11 +102,11 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) spi->tx = tmpdout; /* Write the data out */ debug("*** spi_xfer: ... %08x written\n", tmpdout);
- /* -------------------------------- + /* * Wait for SPI transmit to get out * or time out (1 second = 1000 ms) * The NE event must be read and cleared first - * -------------------------------- */ + */ for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { event = spi->event; if (event & SPI_EV_NE) { @@ -117,10 +120,12 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din) din += 4; } } - /* Only bail when we've had both NE and NF events. + /* + * Only bail when we've had both NE and NF events. * This will cause timeouts on RO devices, so maybe * in the future put an arbitrary delay after writing - * the device. Arbitrary delays suck, though... */ + * the device. Arbitrary delays suck, though... + */ if (isRead && (event & SPI_EV_NF)) break; } @@ -132,7 +137,7 @@ int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar * dout, uchar * din)
if (chipsel != NULL) (*chipsel) (0); /* deselect the target chip */ + return 0; } - #endif /* CONFIG_HARD_SPI */ diff --git a/include/asm-ppc/mpc8xxx_spi.h b/include/asm-ppc/mpc8xxx_spi.h index 38f12b9..053d11e 100644 --- a/include/asm-ppc/mpc8xxx_spi.h +++ b/include/asm-ppc/mpc8xxx_spi.h @@ -32,8 +32,7 @@ defined(CONFIG_MPC8315) || \ defined(CONFIG_MPC837X)
-typedef struct spi8xxx -{ +typedef struct spi8xxx { u8 res0[0x20]; /* 0x0-0x01f reserved */ u32 mode; /* mode register */ u32 event; /* event register */
Kim

+#if defined(CONFIG_MPC834X) || \
- defined(CONFIG_MPC8313) || \
- defined(CONFIG_MPC8315) || \
- defined(CONFIG_MPC837X)
+typedef struct spi8xxx +{
- u8 res0[0x20]; /* 0x0-0x01f reserved */
- u32 mode; /* mode register */
- u32 event; /* event register */
- u32 mask; /* mask register */
- u32 com; /* command register */
- u32 tx; /* transmit register */
- u32 rx; /* receive register */
- u8 res1[0xC8]; /* fill up to 0x100 */
+} spi8xxx_t;
Ben, the sizeof(struct spi8xxx_t) should be 0x1000, So, This will break 83xx immap, the DMA and PCI will be failed. I will send one patch to fix it.
Thanks, Dave

Liu Dave wrote:
+#if defined(CONFIG_MPC834X) || \
- defined(CONFIG_MPC8313) || \
- defined(CONFIG_MPC8315) || \
- defined(CONFIG_MPC837X)
+typedef struct spi8xxx +{
- u8 res0[0x20]; /* 0x0-0x01f reserved */
- u32 mode; /* mode register */
- u32 event; /* event register */
- u32 mask; /* mask register */
- u32 com; /* command register */
- u32 tx; /* transmit register */
- u32 rx; /* receive register */
- u8 res1[0xC8]; /* fill up to 0x100 */
+} spi8xxx_t;
Ben, the sizeof(struct spi8xxx_t) should be 0x1000, So, This will break 83xx immap, the DMA and PCI will be failed. I will send one patch to fix it.
Oh jeez. Sorry. I guess it should be res1[0xfc8]. Thanks for taking care of this Dave.
regards, Ben
participants (3)
-
Ben Warren
-
Kim Phillips
-
Liu Dave